92fe35fb9c
If the nested indirect/execute limit (INDMAX, XCTMAX) is set to 0, the simulator will loop indefinitely in an indirect address or execute loop, testing for interrupts before each memory reference. Thus, on an infinite loop, the simulator will never complete the instruction, but the instruction is interruptible. So for example, under TOPS-10: .r ddt 1/ 0 jrstf @1 1$g ^C ^C . The JRSTF will never finish, but it can be interrupted by any device, and double ^C will return control to the command line. If INDMAX or XCTMAX is non-zero, the previous behavior of limiting loops to a specific depth is retained. However, the default value is now 0. This closes issue #218. Conflicts: doc/pdp10_doc.doc
28 lines
1.2 KiB
Text
28 lines
1.2 KiB
Text
Bugs Found and Fixed During Simulator Debug
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1. pushj cleared T2 after setting it
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2. if timer autoadjust is enabled, timer diagnostic may fail,
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depending on host CPU speed
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3. DFAD/DFSB should use FP_ONES instead of ONES
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4. TLB physical address max = 1MW, tested in diagnostic
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5. DPB does read/write, not read-modify/write
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6. Fetch error takes priority over traps, due to prefetching
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of next instruction
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7. HSB is 36b, was 32b
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8. CPU and PAG devices had mismatched types
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9. non-zero sections in Tops-20 paging section indirect may
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cause non-existent memory error, due to microcode "error"
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10. PXCT test for user mode was backward
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11. Timer interrupts were not implemented in Tops-20 indirect
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chains
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12. epta/upta hit known bug in VC++ implementation of 64b
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data types
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13. final W calculation in Tops-20 paging was incorrect
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14. Timer representation lost sub msec values
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15. UBA initialization reset the UBA itself
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16. RHCS1: writing IE cannot trigger an interrupt
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17. Tape bootstrap was set to 800bpi instead of 1600bpi
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18. FIXR off by 1 in testing for lower limit to process
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19. Indirect loops and XCT loops should run indefinitely,
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test for interrupts on each memory reference
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