604 lines
21 KiB
C
604 lines
21 KiB
C
/* nova_mta.c: NOVA magnetic tape simulator
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Copyright (c) 1993-2001, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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mta magnetic tape
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26-Apr-01 RMS Added device enable/disable support
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18-Apr-01 RMS Changed to rewind tape before boot
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10-Dec-00 RMS Added Eclipse support from Charles Owen
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15-Oct-00 RMS Editorial changes
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11-Nov-98 CEO Removed clear of mta_ma on iopC
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04-Oct-98 RMS V2.4 magtape format
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18-Jan-97 RMS V2.3 magtape format
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29-Jun-96 RMS Added unit enable/disable support
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Magnetic tapes are represented as a series of variable records
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of the form:
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32b byte count byte count is little endian
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byte 0
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byte 1
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:
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byte n-2
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byte n-1
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32b byte count
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If the byte count is odd, the record is padded with an extra byte
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of junk. File marks are represented by a byte count of 0 and are
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not duplicated; end of tape by end of file.
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*/
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#include "nova_defs.h"
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#define MTA_NUMDR 8 /* #drives */
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#define UNIT_V_WLK (UNIT_V_UF + 0) /* write locked */
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#define UNIT_W_UF 2 /* saved flags width */
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#define UNIT_WLK 1 << UNIT_V_WLK
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#define USTAT u3 /* unit status */
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#define UNUM u4 /* unit number */
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#define DTSIZE (1 << 14) /* max data xfer */
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#define DTMASK (DTSIZE - 1)
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/* Command/unit */
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#define CU_CI 0100000 /* clear interrupt */
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#define CU_EP 0002000 /* poll enable */
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#define CU_DE 0001000 /* disable erase */
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#define CU_DA 0000400 /* disable autoretry */
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#define CU_PE 0000400 /* PE mode */
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#define CU_V_CMD 3 /* command */
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#define CU_M_CMD 027
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#define CU_READ 000
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#define CU_REWIND 001
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#define CU_CMODE 002
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#define CU_SPACEF 003
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#define CU_SPACER 004
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#define CU_WRITE 005
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#define CU_WREOF 006
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#define CU_ERASE 007
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#define CU_READNS 020
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#define CU_UNLOAD 021
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#define CU_DMODE 022
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#define CU_V_UNIT 0 /* unit */
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#define CU_M_UNIT 07
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#define GET_CMD(x) (((x) >> CU_V_CMD) & CU_M_CMD)
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#define GET_UNIT(x) (((x) >> CU_V_UNIT) & CU_M_UNIT)
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/* Status 1 - stored in mta_sta<31:16> or (*) uptr -> USTAT<31:16> */
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#define STA_ERR1 (0100000u << 16) /* error */
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#define STA_DLT (0040000 << 16) /* data late */
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#define STA_REW (0020000 << 16) /* *rewinding */
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#define STA_ILL (0010000 << 16) /* illegal */
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#define STA_HDN (0004000 << 16) /* high density */
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#define STA_DAE (0002000 << 16) /* data error */
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#define STA_EOT (0001000 << 16) /* *end of tape */
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#define STA_EOF (0000400 << 16) /* *end of file */
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#define STA_BOT (0000200 << 16) /* *start of tape */
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#define STA_9TK (0000100 << 16) /* nine track */
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#define STA_BAT (0000040 << 16) /* bad tape */
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#define STA_CHG (0000010 << 16) /* status change */
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#define STA_WLK (0000004 << 16) /* *write lock */
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#define STA_ODD (0000002 << 16) /* odd character */
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#define STA_RDY (0000001 << 16) /* *drive ready */
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/* Status 2 - stored in mta_sta<15:0> or (*) uptr -> USTAT<15:0> */
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#define STA_ERR2 0100000 /* error */
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#define STA_RWY 0040000 /* runaway tape */
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#define STA_FGP 0020000 /* false gap */
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#define STA_CDL 0004000 /* corrected dlt */
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#define STA_V_UNIT 8
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#define STA_M_UNIT 07 /* unit */
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#define STA_WCO 0000200 /* word count ovflo */
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#define STA_BDS 0000100 /* bad signal */
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#define STA_OVS 0000040 /* overskew */
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#define STA_CRC 0000020 /* check error */
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#define STA_STE 0000010 /* single trk error */
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#define STA_FPR 0000004 /* false preamble */
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#define STA_FMT 0000002 /* format error */
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#define STA_PEM 0000001 /* *PE mode */
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#define STA_EFLGS1 (STA_DLT | STA_ILL | STA_DAE | STA_EOT | \
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STA_EOF | STA_BOT | STA_BAT | STA_ODD)
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#define STA_EFLGS2 (STA_FGP | STA_CDL | STA_BDS | STA_OVS | \
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STA_CRC | STA_FPR | STA_FPR) /* set error 2 */
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#define STA_CLR ((020 << 16) | 0010000) /* always clear */
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#define STA_SET (STA_HDN | STA_9TK) /* always set */
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#define STA_DYN (STA_REW | STA_EOT | STA_EOF | STA_BOT | \
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STA_WLK | STA_RDY | STA_PEM) /* kept in USTAT */
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#define STA_MON (STA_REW | STA_BOT | STA_WLK | STA_RDY | \
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STA_PEM) /* set status chg */
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extern uint16 M[];
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extern UNIT cpu_unit;
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extern int32 int_req, dev_busy, dev_done, dev_disable, iot_enb;
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int32 mta_ma = 0; /* memory address */
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int32 mta_wc = 0; /* word count */
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int32 mta_cu = 0; /* command/unit */
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int32 mta_sta = 0; /* status register */
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int32 mta_ep = 0; /* enable polling */
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int32 mta_cwait = 100; /* command latency */
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int32 mta_rwait = 100; /* record latency */
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t_stat mta_svc (UNIT *uptr);
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t_stat mta_reset (DEVICE *dptr);
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t_stat mta_boot (int32 unitno);
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t_stat mta_attach (UNIT *uptr, char *cptr);
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t_stat mta_detach (UNIT *uptr);
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int32 mta_updcsta (UNIT *uptr);
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void mta_upddsta (UNIT *uptr, int32 newsta);
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t_stat mta_vlock (UNIT *uptr, int32 val);
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#if defined (ECLIPSE)
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extern int32 MapAddr (int32 map, int32 addr);
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#else
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#define MapAddr(m,a) (a)
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#endif
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static const int ctype[32] = { /* c vs r timing */
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0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
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0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1 };
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/* MTA data structures
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mta_dev MTA device descriptor
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mta_unit MTA unit list
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mta_reg MTA register list
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mta_mod MTA modifier list
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*/
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UNIT mta_unit[] = {
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) },
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{ UDATA (&mta_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) } };
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REG mta_reg[] = {
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{ ORDATA (CU, mta_cu, 16) },
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{ ORDATA (MA, mta_ma, 16) },
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{ ORDATA (WC, mta_wc, 16) },
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{ GRDATA (STA1, mta_sta, 8, 16, 16) },
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{ ORDATA (STA2, mta_sta, 16) },
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{ FLDATA (EP, mta_ep, 0) },
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{ FLDATA (BUSY, dev_busy, INT_V_MTA) },
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{ FLDATA (DONE, dev_done, INT_V_MTA) },
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{ FLDATA (DISABLE, dev_disable, INT_V_MTA) },
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{ FLDATA (INT, int_req, INT_V_MTA) },
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{ DRDATA (CTIME, mta_cwait, 24), PV_LEFT },
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{ DRDATA (RTIME, mta_rwait, 24), PV_LEFT },
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{ ORDATA (UST0, mta_unit[0].USTAT, 32) },
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{ ORDATA (UST1, mta_unit[1].USTAT, 32) },
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{ ORDATA (UST2, mta_unit[2].USTAT, 32) },
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{ ORDATA (UST3, mta_unit[3].USTAT, 32) },
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{ ORDATA (UST4, mta_unit[4].USTAT, 32) },
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{ ORDATA (UST5, mta_unit[5].USTAT, 32) },
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{ ORDATA (UST6, mta_unit[6].USTAT, 32) },
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{ ORDATA (UST7, mta_unit[7].USTAT, 32) },
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{ DRDATA (POS0, mta_unit[0].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS1, mta_unit[1].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS2, mta_unit[2].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS3, mta_unit[3].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS4, mta_unit[4].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS5, mta_unit[5].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS6, mta_unit[6].pos, 31), REG_RO + PV_LEFT },
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{ DRDATA (POS7, mta_unit[7].pos, 31), REG_RO + PV_LEFT },
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{ GRDATA (FLG0, mta_unit[0].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG1, mta_unit[1].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG2, mta_unit[2].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG3, mta_unit[3].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG4, mta_unit[4].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG5, mta_unit[5].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG6, mta_unit[6].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ GRDATA (FLG7, mta_unit[7].flags, 8, UNIT_W_UF, UNIT_V_UF - 1),
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REG_HRO },
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{ FLDATA (*DEVENB, iot_enb, INT_V_MTA), REG_HRO },
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{ NULL } };
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MTAB mta_mod[] = {
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{ UNIT_WLK, 0, "write enabled", "ENABLED", &mta_vlock },
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{ UNIT_WLK, UNIT_WLK, "write locked", "LOCKED", &mta_vlock },
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{ 0 } };
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DEVICE mta_dev = {
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"MT", mta_unit, mta_reg, mta_mod,
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MTA_NUMDR, 10, 31, 1, 8, 8,
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NULL, NULL, &mta_reset,
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&mta_boot, &mta_attach, &mta_detach };
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/* IOT routine */
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int32 mta (int32 pulse, int32 code, int32 AC)
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{
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UNIT *uptr;
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int32 u, c, rval;
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rval = 0;
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uptr = mta_dev.units + GET_UNIT(mta_cu); /* get unit */
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switch (code) { /* decode IR<5:7> */
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case ioDIA: /* DIA */
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rval = (mta_updcsta (uptr) >> 16) & DMASK; /* return status 1 */
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break;
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case ioDOA: /* DOA */
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/* if (AC & CU_CI) ... clear ep int */
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mta_cu = AC; /* save cmd/unit */
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uptr = mta_dev.units + GET_UNIT(mta_cu); /* get unit */
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mta_updcsta (uptr); /* update status */
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break;
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case ioDIB: /* DIB */
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rval = mta_ma & AMASK; /* return ma */
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break;
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case ioDOB: /* DOB */
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mta_ma = AC & AMASK; /* save ma */
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break;
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case ioDIC: /* DIC */
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rval = mta_updcsta (uptr) & DMASK; /* return status 2 */
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break;
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case ioDOC: /* DOC */
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mta_wc = ((AC & 040000) << 1) | (AC & 077777); /* save wc */
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break; } /* end switch code */
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/* IOT, continued */
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switch (pulse) { /* decode IR<8:9> */
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case iopS: /* start */
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c = GET_CMD (mta_cu); /* get command */
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if (dev_busy & INT_MTA) break; /* ignore if busy */
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if ((uptr -> USTAT & STA_RDY) == 0) { /* drive not ready? */
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mta_sta = mta_sta | STA_ILL; /* illegal op */
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dev_busy = dev_busy & ~INT_MTA; /* clear busy */
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dev_done = dev_done | INT_MTA; /* set done */
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int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable); }
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else if ((c == CU_REWIND) || (c == CU_UNLOAD)) { /* rewind, unload? */
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mta_upddsta (uptr, (uptr -> USTAT & /* update status */
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~(STA_BOT | STA_EOF | STA_EOT | STA_RDY)) | STA_REW);
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sim_activate (uptr, mta_rwait); /* start IO */
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if (c == CU_UNLOAD) detach_unit (uptr); }
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else { mta_sta = 0; /* clear errors */
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dev_busy = dev_busy | INT_MTA; /* set busy */
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dev_done = dev_done & ~INT_MTA; /* clear done */
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int_req = int_req & ~INT_MTA; /* clear int */
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if (ctype[c]) sim_activate (uptr, mta_cwait);
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else { mta_upddsta (uptr, uptr -> USTAT &
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~(STA_BOT | STA_EOF | STA_EOT | STA_RDY));
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sim_activate (uptr, mta_rwait); } }
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mta_updcsta (uptr); /* update status */
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break;
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case iopC: /* clear */
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for (u = 0; u < MTA_NUMDR; u++) { /* loop thru units */
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uptr = mta_dev.units + u; /* cancel IO */
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if (sim_is_active (uptr) && !(uptr -> USTAT & STA_REW)) {
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mta_upddsta (uptr, uptr -> USTAT | STA_RDY);
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sim_cancel (uptr); } }
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dev_busy = dev_busy & ~INT_MTA; /* clear busy */
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dev_done = dev_done & ~INT_MTA; /* clear done */
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int_req = int_req & ~INT_MTA; /* clear int */
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mta_sta = mta_cu = 0; /* clear registers */
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mta_updcsta (&mta_unit[0]); /* update status */
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break; } /* end case pulse */
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return rval;
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}
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/* Unit service
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If rewind done, reposition to start of tape, set status
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else, do operation, clear busy, set done, interrupt
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*/
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t_stat mta_svc (UNIT *uptr)
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{
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int32 c, i, p, u, pa, err;
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t_stat rval;
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t_mtrlnt cbc, tbc, wc;
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uint16 c1, c2;
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static uint8 dbuf[2 * DTSIZE];
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static t_mtrlnt bceof = { 0 };
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rval = SCPE_OK;
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u = uptr -> UNUM; /* get unit number */
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if (uptr -> USTAT & STA_REW) { /* rewind? */
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uptr -> pos = 0; /* update position */
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mta_upddsta (uptr, (uptr -> USTAT & ~STA_REW) | STA_BOT | STA_RDY);
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if (u == GET_UNIT (mta_cu)) mta_updcsta (uptr);
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return rval; }
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err = 0;
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c = GET_CMD (mta_cu); /* command */
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wc = DTSIZE - (mta_wc & DTMASK); /* io wc */
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if ((uptr -> flags & UNIT_ATT) == 0) { /* not attached? */
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mta_upddsta (uptr, 0); /* unit off line */
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mta_sta = mta_sta | STA_ILL; } /* illegal operation */
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else if ((uptr -> flags & UNIT_WLK) && /* write locked? */
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((c == CU_WRITE) || (c == CU_WREOF) || (c == CU_ERASE))) {
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mta_upddsta (uptr, uptr -> USTAT | STA_WLK | STA_RDY);
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mta_sta = mta_sta | STA_ILL; } /* illegal operation */
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else switch (c) { /* case on command */
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case CU_CMODE: /* controller mode */
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mta_ep = mta_cu & CU_EP;
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break;
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case CU_DMODE: /* drive mode */
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if (uptr -> pos) mta_sta = mta_sta | STA_ILL; /* must be BOT */
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else mta_upddsta (uptr, (mta_cu & CU_PE)? /* update drv status */
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uptr -> USTAT | STA_PEM: uptr -> USTAT & ~ STA_PEM);
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break;
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/* Unit service, continued */
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case CU_READ: /* read */
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case CU_READNS: /* read non-stop */
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fseek (uptr -> fileref, uptr -> pos, SEEK_SET);
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fxread (&tbc, sizeof (t_mtrlnt), 1, uptr -> fileref); /* read byte count */
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if ((err = ferror (uptr -> fileref)) || /* error or eof? */
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(feof (uptr -> fileref))) {
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mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_EOT);
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break; }
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if (tbc == 0) { /* tape mark? */
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mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_EOF);
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uptr -> pos = uptr -> pos + sizeof (t_mtrlnt);
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break; }
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tbc = MTRL (tbc); /* ignore error flag */
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cbc = wc * 2; /* expected bc */
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if (tbc & 1) mta_sta = mta_sta | STA_ODD; /* odd byte count? */
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if (tbc > cbc) mta_sta = mta_sta | STA_WCO; /* too big? */
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else { cbc = tbc; /* no, use it */
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wc = (cbc + 1) / 2; } /* adjust wc */
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i = fxread (dbuf, sizeof (int8), cbc, uptr -> fileref);
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for ( ; i < cbc; i++) dbuf[i] = 0;
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err = ferror (uptr -> fileref);
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for (i = p = 0; i < wc; i++) { /* copy buf to mem */
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||
c1 = dbuf[p++];
|
||
c2 = dbuf[p++];
|
||
pa = MapAddr (0, mta_ma); /* map address */
|
||
if (MEM_ADDR_OK (pa)) M[pa] = (c1 << 8) | c2;
|
||
mta_ma = (mta_ma + 1) & AMASK; }
|
||
mta_wc = (mta_wc + wc) & DMASK;
|
||
uptr -> pos = uptr -> pos + ((tbc + 1) & ~1) +
|
||
(2 * sizeof (t_mtrlnt));
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY);
|
||
break;
|
||
case CU_WRITE: /* write */
|
||
fseek (uptr -> fileref, uptr -> pos, SEEK_SET);
|
||
tbc = wc * 2; /* io byte count */
|
||
fxwrite (&tbc, sizeof (t_mtrlnt), 1, uptr -> fileref);
|
||
for (i = p = 0; i < wc; i++) { /* copy to buffer */
|
||
pa = MapAddr (0, mta_ma); /* map address */
|
||
dbuf[p++] = (M[pa] >> 8) & 0377;
|
||
dbuf[p++] = M[pa] & 0377;
|
||
mta_ma = (mta_ma + 1) & AMASK; }
|
||
fxwrite (dbuf, sizeof (int8), tbc, uptr -> fileref);
|
||
fxwrite (&tbc, sizeof (t_mtrlnt), 1, uptr -> fileref);
|
||
err = ferror (uptr -> fileref);
|
||
mta_wc = 0;
|
||
uptr -> pos = uptr -> pos + tbc + (2 * sizeof (t_mtrlnt));
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY);
|
||
break;
|
||
case CU_WREOF: /* write eof */
|
||
fseek (uptr -> fileref, uptr -> pos, SEEK_SET);
|
||
fxwrite (&bceof, sizeof (t_mtrlnt), 1, uptr -> fileref);
|
||
err = ferror (uptr -> fileref);
|
||
uptr -> pos = uptr -> pos + sizeof (t_mtrlnt);
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_EOF | STA_RDY);
|
||
break;
|
||
case CU_ERASE: /* erase */
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY);
|
||
break;
|
||
|
||
/* Unit service, continued */
|
||
|
||
case CU_SPACEF: /* space forward */
|
||
do { mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
|
||
fseek (uptr -> fileref, uptr -> pos, SEEK_SET);
|
||
fxread (&tbc, sizeof (t_mtrlnt), 1, uptr -> fileref);
|
||
if ((err = ferror (uptr -> fileref)) || /* error or eof? */
|
||
(feof (uptr -> fileref))) {
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_EOT);
|
||
break; }
|
||
if (tbc == 0) { /* zero bc? */
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_EOF);
|
||
uptr -> pos = uptr -> pos + sizeof (t_mtrlnt);
|
||
break; }
|
||
uptr -> pos = uptr -> pos + ((MTRL (tbc) + 1) & ~1) +
|
||
(2 * sizeof (t_mtrlnt)); }
|
||
while (mta_wc != 0);
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY);
|
||
break;
|
||
case CU_SPACER: /* space reverse */
|
||
if (uptr -> pos == 0) { /* at BOT? */
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_BOT);
|
||
break; }
|
||
do { mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
|
||
fseek (uptr -> fileref, uptr -> pos - sizeof (t_mtrlnt),
|
||
SEEK_SET); /* bs to reclnt */
|
||
fxread (&tbc, sizeof (t_mtrlnt), 1, uptr -> fileref);
|
||
if ((err = ferror (uptr -> fileref)) || /* error or eof? */
|
||
(feof (uptr -> fileref))) {
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_BOT);
|
||
uptr -> pos = 0;
|
||
break; }
|
||
if (tbc == 0) { /* zero bc? */
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_EOF);
|
||
uptr -> pos = uptr -> pos - sizeof (t_mtrlnt);
|
||
break; }
|
||
uptr -> pos = uptr -> pos - ((MTRL (tbc) + 1) & ~1) -
|
||
(2 * sizeof (t_mtrlnt));
|
||
if (uptr -> pos == 0) { /* start of tape? */
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY | STA_BOT);
|
||
break; } }
|
||
while (mta_wc != 0);
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_RDY);
|
||
break;
|
||
default: /* reserved */
|
||
mta_sta = mta_sta | STA_ILL;
|
||
break; } /* end case */
|
||
|
||
/* Unit service, continued */
|
||
|
||
if (err != 0) { /* I/O error */
|
||
mta_sta = mta_sta | STA_DAE; /* flag error */
|
||
perror ("MTA I/O error");
|
||
rval = SCPE_IOERR;
|
||
clearerr (uptr -> fileref); }
|
||
mta_updcsta (uptr); /* update status */
|
||
dev_busy = dev_busy & ~INT_MTA; /* clear busy */
|
||
dev_done = dev_done | INT_MTA; /* set done */
|
||
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
|
||
return rval;
|
||
}
|
||
|
||
/* Update controller status */
|
||
|
||
int32 mta_updcsta (UNIT *uptr) /* update ctrl */
|
||
{
|
||
mta_sta = (mta_sta & ~(STA_DYN | STA_CLR | STA_ERR1 | STA_ERR2)) |
|
||
(uptr -> USTAT & STA_DYN) | STA_SET;
|
||
if (mta_sta & STA_EFLGS1) mta_sta = mta_sta | STA_ERR1;
|
||
if (mta_sta & STA_EFLGS2) mta_sta = mta_sta | STA_ERR2;
|
||
return mta_sta;
|
||
}
|
||
|
||
/* Update drive status */
|
||
|
||
void mta_upddsta (UNIT *uptr, int32 newsta) /* drive status */
|
||
{
|
||
int32 change;
|
||
|
||
if ((uptr -> flags & UNIT_ATT) == 0) newsta = 0; /* offline? */
|
||
change = (uptr -> USTAT ^ newsta) & STA_MON; /* changes? */
|
||
uptr -> USTAT = newsta & STA_DYN; /* update status */
|
||
if (change) {
|
||
/* if (mta_ep) { /* if polling */
|
||
/* u = uptr -> UNUM; /* unit num */
|
||
/* mta_sta = (mta_sta & ~STA_UNIT) | (u << STA_V_UNIT);
|
||
/* set polling interupt... } */
|
||
mta_sta = mta_sta | STA_CHG; } /* flag change */
|
||
return;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat mta_reset (DEVICE *dptr)
|
||
{
|
||
int32 u;
|
||
UNIT *uptr;
|
||
|
||
dev_busy = dev_busy & ~INT_MTA; /* clear busy */
|
||
dev_done = dev_done & ~INT_MTA; /* clear done, int */
|
||
int_req = int_req & ~INT_MTA;
|
||
mta_cu = mta_wc = mta_ma = mta_sta = 0; /* clear registers */
|
||
mta_ep = 0;
|
||
for (u = 0; u < MTA_NUMDR; u++) { /* loop thru units */
|
||
uptr = mta_dev.units + u;
|
||
sim_cancel (uptr); /* cancel activity */
|
||
uptr -> UNUM = u;
|
||
if (uptr -> flags & UNIT_ATT) uptr -> USTAT = STA_RDY |
|
||
(uptr -> USTAT & STA_PEM) |
|
||
((uptr -> flags & UNIT_WLK)? STA_WLK: 0) |
|
||
((uptr -> pos)? 0: STA_BOT);
|
||
else uptr -> USTAT = 0; }
|
||
mta_updcsta (&mta_unit[0]); /* update status */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Attach routine */
|
||
|
||
t_stat mta_attach (UNIT *uptr, char *cptr)
|
||
{
|
||
t_stat r;
|
||
|
||
r = attach_unit (uptr, cptr);
|
||
if (r != SCPE_OK) return r;
|
||
if (!sim_is_active (uptr)) mta_upddsta (uptr, STA_RDY | STA_BOT | STA_PEM |
|
||
((uptr -> flags & UNIT_WLK)? STA_WLK: 0));
|
||
return r;
|
||
}
|
||
|
||
/* Detach routine */
|
||
|
||
t_stat mta_detach (UNIT* uptr)
|
||
{
|
||
if (!sim_is_active (uptr)) mta_upddsta (uptr, 0);
|
||
return detach_unit (uptr);
|
||
}
|
||
|
||
/* Write lock/unlock validate routine */
|
||
|
||
t_stat mta_vlock (UNIT *uptr, int32 val)
|
||
{
|
||
if ((uptr -> flags & UNIT_ATT) && val)
|
||
mta_upddsta (uptr, uptr -> USTAT | STA_WLK);
|
||
else mta_upddsta (uptr, uptr -> USTAT & ~STA_WLK);
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Bootstrap routine */
|
||
|
||
#define BOOT_START 02000
|
||
#define BOOT_UNIT 02020
|
||
#define BOOT_LEN (sizeof (boot_rom) / sizeof (int))
|
||
|
||
static const int32 boot_rom[] = {
|
||
060222, /* NIOC 0,MTA ; clear disk */
|
||
020417, /* LDA 0,UNIT ; unit */
|
||
024417, /* LDA 1,REWIND ; cmd */
|
||
0107000, /* ADD 0,1 ; cmd + unit */
|
||
065122, /* DOAS 1,MTA ; start rewind */
|
||
070422, /* DIA 2,MTA ; get status */
|
||
0151213, /* MOVR# 2,2,SNC ; skip if done */
|
||
000776, /* JMP .-2 */
|
||
0126400, /* SUB 1,1 ; ma, wc = 0 */
|
||
066022, /* DOB 1,MTA */
|
||
067022, /* DOC 1,MTA */
|
||
061122, /* DOAS 0,MTA ; start read */
|
||
070422, /* DIA 2,MTA ; get status */
|
||
0151213, /* MOVR# 2,2,SNC ; skip if done */
|
||
000776, /* JMP .-2 */
|
||
000377, /* JMP 377 */
|
||
000000, /* UNIT: */
|
||
000010 /* REWIND: 10 */
|
||
};
|
||
|
||
t_stat mta_boot (int32 unitno)
|
||
{
|
||
int32 i;
|
||
extern int32 saved_PC;
|
||
|
||
mta_unit[unitno].pos = 0;
|
||
for (i = 0; i < BOOT_LEN; i++) M[BOOT_START + i] = boot_rom[i];
|
||
M[BOOT_UNIT] = (unitno & CU_M_UNIT) << CU_V_UNIT;
|
||
saved_PC = BOOT_START;
|
||
return SCPE_OK;
|
||
}
|