208 lines
8.7 KiB
C
208 lines
8.7 KiB
C
/* alpha_pal_defs.h: Alpha architecture PAL definitions file
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Copyright (c) 2003-2006, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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Respectfully dedicated to the great people of the Alpha chip, systems, and
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software development projects; and to the memory of Peter Conklin, of the
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Alpha Program Office.
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*/
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#ifndef ALPHA_PAL_DEFS_H_
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#define ALPHA_PAL_DEFS_H_ 0
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/* VA - NT software format */
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#define NTVA_N_PDE (VA_N_OFF - 2) /* PDE width */
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#define NTVA_M_PDE ((1u << NTVA_N_PDE) - 1) /* PDE mask */
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#define NTVA_N_PTD (32 - VA_N_OFF - NTVA_N_PDE) /* PTD width */
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#define NTVA_M_PTD ((1u << NTVA_N_PTD) - 1) /* PTD mask */
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#define NTVA_M_VPN (M32 >> VA_N_OFF) /* 32b VPN mask */
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#define NTVPN_N_SEXT (VA_WIDTH - 32 + 1) /* VPN sext size */
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#define NTVPN_V_SEXT (VA_N_VPN - NTVPN_N_SEXT) /* VPN sext start */
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#define NTVPN_M_SEXT ((1u << NTVPN_N_SEXT) - 1) /* VPN sext mask */
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#define NTVPN_GETSEXT(x) (((x) >> NTVPN_V_SEXT) & NTVPN_M_SEXT)
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/* PTE - NT software format */
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#define NT_VPTB 0xFFFFFFFFC0000000 /* virt page tbl base */
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#define NTP_V_PFN 9 /* PFN */
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#define NTP_M_PFN 0x7FFFFF
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#define NTP_PFN (NTP_M_PFN << NTP_V_PFN)
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#define NTP_V_GH 5
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#define NTP_M_GH 0x3
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#define NTP_V_GBL 4 /* global = ASM */
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#define NTP_V_DIRTY 2 /* dirty = !FOW */
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#define NTP_V_OWNER 1 /* owner */
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#define NTP_V_V 0 /* valid */
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#define NTP_GBL (1u << NTP_V_GBL)
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#define NTP_DIRTY (1u << NTP_V_DIRTY)
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#define NTP_OWNER (1u << NTP_V_OWNER)
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#define NTP_V (1u << NTP_V_V)
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#define NT_VPNPTD(x) (((x) >> (NTVA_N_PDE - 2)) & (NTVA_M_PTD << 2))
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#define NT_VPNPDE(x) (((x) << 2) & (NTVA_M_PDE << 2))
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/* VMS PALcode */
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#define PSV_V_SPA 56 /* VMS PS: stack align */
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#define PSV_M_SPA 0x3F
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#define PSV_V_IPL 8 /* interrupt priority */
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#define PSV_M_IPL 0x1F
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#define PSV_V_VMM 7 /* virt machine monitor */
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#define PSV_V_CM 3 /* current mode */
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#define PSV_M_CM 0x3
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#define PSV_V_IP 2 /* intr in progress */
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#define PSV_V_SW 0 /* software */
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#define PSV_M_SW 0x3
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#define PSV_VMM (1u << PSV_V_VMM)
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#define PSV_IP (1u << PSV_V_IP)
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#define PSV_MASK (PSV_VMM | PSV_IP | PSV_M_SW)
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#define PSV_MBZ 0xC0FFFFFFFFFFE0E4 /* must be zero */
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#define PCBV_FLAGS 56 /* PCB flags word */
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#define SISR_MASK 0xFFFE /* SISR bits */
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#define IPL_SMAX 0x0F /* highest swre level */
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#define SCB_FDIS 0x010 /* SCB offsets */
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#define SCB_ACV 0x080
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#define SCB_TNV 0x090
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#define SCB_FOR 0x0A0
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#define SCB_FOW 0x0B0
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#define SCB_FOE 0x0C0
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#define SCB_ARITH 0x200
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#define SCB_KAST 0x240
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#define SCB_EAST 0x250
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#define SCB_SAST 0x260
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#define SCB_UAST 0x270
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#define SCB_ALIGN 0x280
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#define SCB_BPT 0x400
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#define SCB_BUG 0x410
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#define SCB_RSVI 0x420
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#define SCB_RSVO 0x430
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#define SCB_GENTRAP 0x440
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#define SCB_CHMK 0x480
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#define SCB_CHME 0x490
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#define SCB_CHMS 0x4A0
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#define SCB_CHMU 0x4B0
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#define SCB_SISR0 0x500
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#define SCB_CLOCK 0x600
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#define SCB_IPIR 0x610
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#define SCB_SCRD 0x620
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#define SCB_PCRD 0x630
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#define SCB_POWER 0x640
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#define SCB_PERFM 0x650
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#define SCB_SMCHK 0x660
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#define SCB_PMCHK 0x670
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#define SCB_PASVR 0x6F0
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#define SCB_IO 0x800
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#define VMS_L_STKF (8 * 8) /* stack frame length */
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#define VMS_MME_E 0x0000000000000001 /* mem mgt error flags */
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#define VMS_MME_R 0x0000000000000000
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#define VMS_MME_W 0x8000000000000000
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/* VAX compatible data length definitions (for ReadUna, WriteUna) */
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#define L_BYTE 1
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#define L_WORD 2
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#define L_LONG 4
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#define L_QUAD 8
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/* Unix PALcode */
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#define PSU_V_CM 3 /* Unix PS: curr mode */
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#define PSU_M_CM 0x1
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#define PSU_CM (PSU_M_CM << PSU_V_CM)
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#define PSU_V_IPL 0 /* IPL */
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#define PSU_M_IPL 0x7
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#define PSU_IPL (PSU_M_IPL << PSU_V_IPL)
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#define PCBU_FLAGS 40 /* PCB flags word */
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#define UNIX_L_STKF (6 * 8) /* kernel stack frame */
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#define UNIX_IF_BPT 0 /* entIF a0 values */
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#define UNIX_IF_BUG 1
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#define UNIX_IF_GEN 2
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#define UNIX_IF_FDIS 3
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#define UNIX_IF_RSVI 4
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#define UNIX_INT_IPIR 0 /* entInt a0 values */
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#define UNIX_INT_CLK 1
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#define UNIX_INT_MCRD 2
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#define UNIX_INT_IO 3
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#define UNIX_INT_PERF 4
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#define UNIX_MMCSR_TNV 0 /* entMM a1 values */
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#define UNIX_MMCSR_ACV 1
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#define UNIX_MMCSR_FOR 2
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#define UNIX_MMCSR_FOW 3
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#define UNIX_MMCSR_FOE 4
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#define UNIX_MME_E M64 /* entMM a2 values */
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#define UNIX_MME_R 0
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#define UNIX_MME_W 1
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enum vms_pal_opcodes {
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OP_HALT, OP_DRAINA, OP_CFLUSH, OP_LDQP,
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OP_STQP, OP_SWPCTX, MF_ASN, MT_ASTEN,
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MT_ASTSR, OP_CSERVE, OP_SWPPAL, MF_FEN,
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MT_FEN, MT_IPIR, MF_IPL, MT_IPL,
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MF_MCES, MT_MCES, MF_PCBB, MF_PRBR,
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MT_PRBR, MF_PTBR, MF_SCBB, MT_SCBB,
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MT_SIRR, MF_SISR, MF_TBCHK, MT_TBIA,
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MT_TBIAP, MT_TBIS, MF_ESP, MT_ESP,
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MF_SSP, MT_SSP, MF_USP, MT_USP,
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MT_TBISD, MT_TBISI, MF_ASTEN, MF_ASTSR,
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MF_VTBR = 0x29, MT_VTBR,MT_PERFMON, MT_DATFX = 0x2E,
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MF_VIRBND = 0x30, MT_VIRBND, MF_SYSPTBR, MT_SYSPTBR,
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OP_WTINT = 0x3E, MF_WHAMI = 0x3F,
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OP_BPT = 0x80, OP_BUGCHK, OP_CHME, OP_CHMK,
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OP_CHMS, OP_CHMU, OP_IMB, OP_INSQHIL,
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OP_INSQTIL, OP_INSQHIQ, OP_INSQTIQ, OP_INSQUEL,
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OP_INSQUEQ, OP_INSQUELD,OP_INSQUEQD,OP_PROBER,
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OP_PROBEW, OP_RD_PS, OP_REI, OP_REMQHIL,
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OP_REMQTIL, OP_REMQHIQ, OP_REMQTIQ, OP_REMQUEL,
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OP_REMQUEQ, OP_REMQUELD,OP_REMQUEQD,OP_SWASTEN,
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OP_WR_PS_SW,OP_RSCC, OP_RD_UNQ, OP_WR_UNQ,
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OP_AMOVRR, OP_AMOVRM, OP_INSQHILR,OP_INSQTILR,
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OP_INSQHIQR,OP_INSQTIQR,OP_REMQHILR,OP_REMQTILR,
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OP_REMQHIQR,OP_REMQTIQR,OP_GENTRAP,
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OP_CLRFEN = 0xAE
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};
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enum unix_pal_opcodes {
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OP_halt, OP_draina, OP_cflush,
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OP_cserve = 0x9, OP_swppal,
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OP_rdmces = 0x10, OP_wrmces,
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OP_wrvirbnd = 0x13, OP_wrsysptbr = 0x14,
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OP_wrfen = 0x2B, OP_wrvptptr = 0x2D, OP_wrasn,
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OP_swpctx = 0x30, OP_wrval, OP_rdval, OP_tbi,
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OP_wrent, OP_swpipl, OP_rdps, OP_wrkgp,
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OP_wrusp, OP_wrperfmon, OP_rdusp,
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OP_whami = 0x3C, OP_retsys, OP_wtint, OP_rti,
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OP_bpt = 0x80, OP_bugchk, OP_syscall = 0x83,
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OP_imb = 0x86,
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OP_urti = 0x92, OP_rdunique = 0x9E, OP_wrunique,
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OP_gentrap = 0xAA, OP_clrfen = 0xAE
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};
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#endif
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