207 lines
8.6 KiB
C
207 lines
8.6 KiB
C
/* hp3000_cpu_ims.h: HP 3000 CPU-to-IOP/MPX/SEL interface declarations
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Copyright (c) 2016, J. David Bryan
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of the author shall not be used
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in advertising or otherwise to promote the sale, use or other dealings in
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this Software without prior written authorization from the author.
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10-Oct-16 JDB Moved cpu_read_memory, cpu_write_memory to hp3000_cpu.h
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01-Sep-16 JDB Added the cpu_cold_cmd and cpu_power_cmd routines
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15-Aug-16 JDB Removed obsolete comment mentioning iop_read/write_memory
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15-Jul-16 JDB Corrected the IOCW_COUNT macro to return the correct value
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11-Jun-16 JDB Bit mask constants are now unsigned
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05-Sep-15 JDB First release version
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11-Dec-12 JDB Created
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This file contains declarations used by the CPU to interface with the HP 3000
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I/O Processor, Multiplexer Channel, and Selector Channel.
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*/
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/* Global data structures */
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/* I/O commands.
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The enumeration values correspond to the IOP bus IOCMD0-2 signal
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representations.
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*/
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typedef enum {
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ioSIN = 0, /* set interrupt */
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ioCIO = 1, /* control I/O */
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ioSIO = 2, /* start I/O */
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ioWIO = 3, /* write I/O */
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ioRIN = 4, /* reset interrupt */
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ioTIO = 5, /* test I/O */
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ioSMSK = 6, /* set interrupt mask */
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ioRIO = 7 /* read I/O */
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} IO_COMMAND;
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/* SIO program orders.
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32-bit I/O program words are formed from a 16-bit I/O control word (IOCW) and
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a 16-bit I/O address word (IOAW). The Interrupt, Control, Sense, Write, and
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Read orders use this format:
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0 | 1 2 3 | 4 5 6 | 7 8 9 |10 11 12 |13 14 15
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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| C | order | control word 1/word count | IOCW
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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| control word 2/status/address | IOAW
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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For the Write and Read orders only, bit 0 of the IOCW is the "data chain"
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flag. If it is set, then this transfer is a continuation of the previous
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Write or Read transfer.
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The Jump, End, Return Residue, and Set Bank orders require an additional bit
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(IOCW bit 4) to define their orders fully:
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0 | 1 2 3 | 4 5 6 | 7 8 9 |10 11 12 |13 14 15
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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| - | order | - - - - - - - - - - - | IOCW
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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| address/status/count | IOAW
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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| - - - - - - - - - - - - | bank | IOAW
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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In simulation, IOCW bits 0-4 are used to index into a 32-element lookup table
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to produce the final I/O order (because some of the orders define IOCW bit 4
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as "don't care", there are only thirteen distinct orders).
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Implementation notes:
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1. The IOCW_COUNT(w) macro sign-extends the 12-bit two's-complement word
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count to a 16-bit value for the Return Residue order.
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2. The sioWRITE, sioWRITEC, sioREAD, and sioREADC enumeration constants must
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be contiguous and the final four values, so that a ">= sioWRITE" test
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identifies all four cases.
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*/
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#define IOCW_DC 0100000u /* data chain */
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#define IOCW_SIO_MASK 0070000u /* general SIO order mask */
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#define IOCW_ORDER_MASK 0174000u /* fully decoded I/O order mask */
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#define IOCW_CNTL_MASK 0007777u /* control word mask */
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#define IOCW_WCNT_MASK 0007777u /* word count mask */
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#define IOAW_BANK_MASK 0000017u /* bank number mask */
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#define IOCW_ORDER_SHIFT 11 /* I/O order alignment shift */
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#define IOCW_CNTL_SHIFT 0 /* control word alignment shift */
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#define IOCW_WCNT_SHIFT 0 /* word count alignment shift */
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#define IOAW_BANK_SHIFT 0 /* bank number alignment shift */
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#define IOCW_ORDER(w) to_sio_order [((w) & IOCW_ORDER_MASK) >> IOCW_ORDER_SHIFT]
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#define IOCW_CNTL(w) (((w) & IOCW_CNTL_MASK) >> IOCW_CNTL_SHIFT)
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#define IOCW_WCNT(w) (((w) & IOCW_WCNT_MASK) >> IOCW_WCNT_SHIFT)
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#define IOCW_COUNT(w) ((w) | ~IOCW_WCNT_MASK & D16_MASK)
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#define IOAW_BANK(w) (((w) & IOAW_BANK_MASK) >> IOAW_BANK_SHIFT)
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typedef enum {
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sioJUMP, /* Jump unconditionally */
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sioJUMPC, /* Jump conditionally */
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sioRTRES, /* Return residue */
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sioSBANK, /* Set bank */
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sioINTRP, /* Interrupt */
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sioEND, /* End */
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sioENDIN, /* End with interrupt */
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sioCNTL, /* Control */
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sioSENSE, /* Sense */
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sioWRITE, /* Write */
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sioWRITEC, /* Write chained */
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sioREAD, /* Read */
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sioREADC /* Read chained */
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} SIO_ORDER;
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/* Global CPU routine declarations.
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cpu_cold_cmd : process the LOAD and DUMP commands
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cpu_power_cmd : process the POWER commands
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*/
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extern t_stat cpu_cold_cmd (int32 arg, CONST char *buf);
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extern t_stat cpu_power_cmd (int32 arg, CONST char *buf);
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/* Global SIO order structures.
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to_sio_order : translates IOCW bits 1-4 to an SIO_ORDER
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sio_order_name : the name of the orders indexed by SIO_ORDER
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*/
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extern const SIO_ORDER to_sio_order [];
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extern const char *const sio_order_name [];
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/* Global I/O processor state and functions.
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iop_interrupt_request_set : the set of devices requesting interrupts
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iop_initialize : initialize the I/O processor
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iop_poll : poll the interfaces for an active interrupt request
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iop_direct_io : dispatch an I/O command to an interface
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*/
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extern uint32 iop_interrupt_request_set;
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extern uint32 iop_initialize (void);
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extern uint32 iop_poll (void);
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extern HP_WORD iop_direct_io (HP_WORD device_number, IO_COMMAND io_cmd, HP_WORD write_value);
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/* Global multiplexer channel state and functions.
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mpx_request_set : the set of pending channel service requests
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mpx_initialize : initialize the multiplexer channel
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mpx_service : poll the interfaces for an active service request
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*/
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extern uint32 mpx_request_set;
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extern void mpx_initialize (void);
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extern void mpx_service (uint32 ticks_elapsed);
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/* Global selector channel state and functions
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sel_request : TRUE if a pending channel service request
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sel_initialize : initialize the selector channel
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sel_service : service the interface with an active service request
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*/
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extern t_bool sel_request;
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extern void sel_initialize (void);
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extern void sel_service (uint32 ticks_elapsed);
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