393 lines
15 KiB
C
393 lines
15 KiB
C
/* pdp8_df.c: DF32 fixed head disk simulator
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Copyright (c) 1993-2021, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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df DF32 fixed head disk
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21-Apr-21 RMS Fixed bug if read overwrites WC memory location
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17-Sep-13 RMS Changed to use central set_bootpc routine
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03-Sep-13 RMS Added explicit void * cast
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15-May-06 RMS Fixed bug in autosize attach (Dave Gesswein)
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07-Jan-06 RMS Fixed unaligned register access bug (Doug Carman)
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04-Jan-04 RMS Changed sim_fsize calling sequence
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26-Oct-03 RMS Cleaned up buffer copy code
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26-Jul-03 RMS Fixed bug in set size routine
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14-Mar-03 RMS Fixed variable platter interaction with save/restore
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03-Mar-03 RMS Fixed autosizing
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02-Feb-03 RMS Added variable platter and autosizing support
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04-Oct-02 RMS Added DIBs, device number support
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28-Nov-01 RMS Added RL8A support
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25-Apr-01 RMS Added device enable/disable support
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The DF32 is a head-per-track disk. It uses the three cycle data break
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facility. To minimize overhead, the entire DF32 is buffered in memory.
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Two timing parameters are provided:
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df_time Interword timing, must be non-zero
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df_burst Burst mode, if 0, DMA occurs cycle by cycle; otherwise,
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DMA occurs in a burst
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*/
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#include "pdp8_defs.h"
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#include <math.h>
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#define UNIT_V_AUTO (UNIT_V_UF + 0) /* autosize */
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#define UNIT_V_PLAT (UNIT_V_UF + 1) /* #platters - 1 */
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#define UNIT_M_PLAT 03
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#define UNIT_PLAT (UNIT_M_PLAT << UNIT_V_PLAT)
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#define UNIT_GETP(x) ((((x) >> UNIT_V_PLAT) & UNIT_M_PLAT) + 1)
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#define UNIT_AUTO (1 << UNIT_V_AUTO)
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#define UNIT_PLAT (UNIT_M_PLAT << UNIT_V_PLAT)
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/* Constants */
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#define DF_NUMWD 2048 /* words/track */
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#define DF_NUMTR 16 /* tracks/disk */
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#define DF_DKSIZE (DF_NUMTR * DF_NUMWD) /* words/disk */
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#define DF_NUMDK 4 /* disks/controller */
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#define DF_WC 07750 /* word count */
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#define DF_MA 07751 /* mem address */
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#define DF_WMASK (DF_NUMWD - 1) /* word mask */
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/* Parameters in the unit descriptor */
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#define FUNC u4 /* function */
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#define DF_READ 2 /* read */
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#define DF_WRITE 4 /* write */
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/* Status register */
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#define DFS_PCA 04000 /* photocell status */
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#define DFS_DEX 03700 /* disk addr extension */
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#define DFS_MEX 00070 /* mem addr extension */
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#define DFS_DRL 00004 /* data late error */
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#define DFS_WLS 00002 /* write lock error */
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#define DFS_NXD 00002 /* non-existent disk */
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#define DFS_PER 00001 /* parity error */
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#define DFS_ERR (DFS_DRL | DFS_WLS | DFS_PER)
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#define DFS_V_DEX 6
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#define DFS_V_MEX 3
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#define GET_MEX(x) (((x) & DFS_MEX) << (12 - DFS_V_MEX))
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#define GET_DEX(x) (((x) & DFS_DEX) << (12 - DFS_V_DEX))
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#define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \
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((double) DF_NUMWD)))
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#define UPDATE_PCELL if (GET_POS (df_time) < 6) df_sta = df_sta | DFS_PCA; \
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else df_sta = df_sta & ~DFS_PCA
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extern uint16 M[];
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extern int32 int_req, stop_inst;
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extern UNIT cpu_unit;
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int32 df_sta = 0; /* status register */
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int32 df_da = 0; /* disk address */
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int32 df_done = 0; /* done flag */
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int32 df_wlk = 0; /* write lock */
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int32 df_time = 10; /* inter-word time */
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int32 df_burst = 1; /* burst mode flag */
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int32 df_stopioe = 1; /* stop on error */
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int32 df60 (int32 IR, int32 AC);
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int32 df61 (int32 IR, int32 AC);
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int32 df62 (int32 IR, int32 AC);
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t_stat df_svc (UNIT *uptr);
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t_stat pcell_svc (UNIT *uptr);
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t_stat df_reset (DEVICE *dptr);
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t_stat df_boot (int32 unitno, DEVICE *dptr);
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t_stat df_attach (UNIT *uptr, CONST char *cptr);
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t_stat df_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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const char *df_description (DEVICE *dptr);
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/* DF32 data structures
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df_dev RF device descriptor
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df_unit RF unit descriptor
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pcell_unit photocell timing unit (orphan)
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df_reg RF register list
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*/
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DIB df_dib = { DEV_DF, 3, { &df60, &df61, &df62 } };
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UNIT df_unit = {
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UDATA (&df_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF,
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DF_DKSIZE)
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};
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REG df_reg[] = {
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{ ORDATAD (STA, df_sta, 12, "status, disk and memory address extension") },
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{ ORDATAD (DA, df_da, 12, "low order disk address") },
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{ ORDATAD (WC, M[DF_WC], 12, "word count (in memory)"), REG_FIT },
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{ ORDATAD (MA, M[DF_MA], 12, "memory address (in memory)"), REG_FIT },
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{ FLDATAD (DONE, df_done, 0, "device done flag") },
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{ FLDATAD (INT, int_req, INT_V_DF, "interrupt pending flag") },
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{ ORDATAD (WLS, df_wlk, 8, "write lock switches") },
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{ DRDATAD (TIME, df_time, 24, "rotational delay, per word"), REG_NZ + PV_LEFT },
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{ FLDATAD (BURST, df_burst, 0, "burst flag") },
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{ FLDATAD (STOP_IOE, df_stopioe, 0, "stop on I/O error") },
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{ DRDATA (CAPAC, df_unit.capac, 18), REG_HRO },
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{ ORDATA (DEVNUM, df_dib.dev, 6), REG_HRO },
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{ NULL }
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};
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MTAB df_mod[] = {
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{ UNIT_PLAT, (0 << UNIT_V_PLAT), NULL, "1P", &df_set_size },
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{ UNIT_PLAT, (1 << UNIT_V_PLAT), NULL, "2P", &df_set_size },
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{ UNIT_PLAT, (2 << UNIT_V_PLAT), NULL, "3P", &df_set_size },
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{ UNIT_PLAT, (3 << UNIT_V_PLAT), NULL, "4P", &df_set_size },
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{ MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
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&set_dev, &show_dev, NULL },
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{ 0 }
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};
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DEVICE df_dev = {
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"DF", &df_unit, df_reg, df_mod,
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1, 8, 17, 1, 8, 12,
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NULL, NULL, &df_reset,
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&df_boot, &df_attach, NULL,
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&df_dib, DEV_DISABLE,
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0, NULL, NULL, NULL, NULL, NULL, NULL,
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&df_description
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};
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/* IOT routines */
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int32 df60 (int32 IR, int32 AC)
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{
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int32 t;
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int32 pulse = IR & 07;
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UPDATE_PCELL; /* update photocell */
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if (pulse & 1) { /* DCMA */
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df_da = 0; /* clear disk addr */
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df_done = 0; /* clear done */
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df_sta = df_sta & ~DFS_ERR; /* clear errors */
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int_req = int_req & ~INT_DF; /* clear int req */
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}
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if (pulse & 6) { /* DMAR, DMAW */
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df_da = df_da | AC; /* disk addr |= AC */
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df_unit.FUNC = pulse & ~1; /* save function */
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t = (df_da & DF_WMASK) - GET_POS (df_time); /* delta to new loc */
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if (t < 0) /* wrap around? */
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t = t + DF_NUMWD;
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sim_activate (&df_unit, t * df_time); /* schedule op */
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AC = 0; /* clear AC */
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}
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return AC;
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}
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/* Based on the hardware implementation. DEAL and DEAC work as follows:
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6615 pulse 1 = clear df_sta<dex,mex>
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pulse 4 = df_sta = df_sta | AC<dex,mex>
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AC = AC | old_df_sta
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6616 pulse 2 = clear AC, skip if address confirmed
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pulse 4 = df_sta = df_sta | AC<dex,mex> = 0 (nop)
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AC = AC | old_df_sta
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*/
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int32 df61 (int32 IR, int32 AC)
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{
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int32 old_df_sta = df_sta;
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int32 pulse = IR & 07;
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UPDATE_PCELL; /* update photocell */
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if (pulse & 1) /* DCEA */
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df_sta = df_sta & ~(DFS_DEX | DFS_MEX); /* clear dex, mex */
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if (pulse & 2) /* DSAC */
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AC = ((df_da & DF_WMASK) == GET_POS (df_time))? IOT_SKP: 0;
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if (pulse & 4) {
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df_sta = df_sta | (AC & (DFS_DEX | DFS_MEX)); /* DEAL */
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AC = AC | old_df_sta; /* DEAC */
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}
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return AC;
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}
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int32 df62 (int32 IR, int32 AC)
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{
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int32 pulse = IR & 07;
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UPDATE_PCELL; /* update photocell */
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if (pulse & 1) { /* DFSE */
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if ((df_sta & DFS_ERR) == 0)
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AC = AC | IOT_SKP;
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}
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if (pulse & 2) { /* DFSC */
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if (pulse & 4) /* for DMAC */
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AC = AC & ~07777;
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else if (df_done)
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AC = AC | IOT_SKP;
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}
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if (pulse & 4) /* DMAC */
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AC = AC | df_da;
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return AC;
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}
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/* Unit service
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Note that for reads and writes, memory addresses wrap around in the
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current field. This code assumes the entire disk is buffered.
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*/
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t_stat df_svc (UNIT *uptr)
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{
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int32 pa, t, mex;
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uint32 da;
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int16 *fbuf = (int16 *) uptr->filebuf;
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uint16 wc = 0;
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UPDATE_PCELL; /* update photocell */
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if ((uptr->flags & UNIT_BUF) == 0) { /* not buf? abort */
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df_done = 1;
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int_req = int_req | INT_DF; /* update int req */
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return IORETURN (df_stopioe, SCPE_UNATT);
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}
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mex = GET_MEX (df_sta);
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da = GET_DEX (df_sta) | df_da; /* form disk addr */
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do {
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if (da >= uptr->capac) { /* nx disk addr? */
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df_sta = df_sta | DFS_NXD;
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break;
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}
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wc = M[DF_WC] = (M[DF_WC] + 1) & 07777; /* incr word count */
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M[DF_MA] = (M[DF_MA] + 1) & 07777; /* incr mem addr */
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pa = mex | M[DF_MA]; /* add extension */
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if (uptr->FUNC == DF_READ) { /* read? */
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if (MEM_ADDR_OK (pa)) /* if !nxm, read wd */
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M[pa] = fbuf[da];
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}
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else { /* write */
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t = (da >> 14) & 07; /* check wr lock */
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if ((df_wlk >> t) & 1) /* locked? set err */
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df_sta = df_sta | DFS_WLS;
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else { /* not locked */
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fbuf[da] = M[pa]; /* write word */
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if (da >= uptr->hwmark) uptr->hwmark = da + 1;
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}
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}
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da = (da + 1) & 0377777; /* incr disk addr */
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} while ((wc != 0) && (df_burst != 0)); /* brk if wc, no brst */
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if ((wc != 0) && ((df_sta & DFS_ERR) == 0)) /* more to do? */
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sim_activate (&df_unit, df_time); /* sched next */
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else {
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if (uptr->FUNC != DF_READ)
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da = (da - 1) & 0377777;
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df_done = 1; /* done */
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int_req = int_req | INT_DF; /* update int req */
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}
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df_sta = (df_sta & ~DFS_DEX) | ((da >> (12 - DFS_V_DEX)) & DFS_DEX);
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df_da = da & 07777; /* separate disk addr */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat df_reset (DEVICE *dptr)
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{
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df_sta = df_da = 0;
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df_done = 1;
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int_req = int_req & ~INT_DF; /* clear interrupt */
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sim_cancel (&df_unit);
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return SCPE_OK;
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}
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/* Bootstrap routine */
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#define OS8_START 07750
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#define OS8_LEN (sizeof (os8_rom) / sizeof (int16))
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#define DM4_START 00200
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#define DM4_LEN (sizeof (dm4_rom) / sizeof (int16))
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static const uint16 os8_rom[] = {
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07600, /* 7750, CLA CLL ; also word count */
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06603, /* 7751, DMAR ; also address */
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06622, /* 7752, DFSC ; done? */
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05352, /* 7753, JMP .-1 ; no */
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05752 /* 7754, JMP @.-2 ; enter boot */
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};
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static const uint16 dm4_rom[] = {
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00200, 07600, /* 0200, CLA CLL */
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00201, 06603, /* 0201, DMAR ; read */
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00202, 06622, /* 0202, DFSC ; done? */
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00203, 05202, /* 0203, JMP .-1 ; no */
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00204, 05600, /* 0204, JMP @.-4 ; enter boot */
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07750, 07576, /* 7750, 7576 ; word count */
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07751, 07576 /* 7751, 7576 ; address */
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};
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t_stat df_boot (int32 unitno, DEVICE *dptr)
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{
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size_t i;
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if (sim_switches & SWMASK ('D')) {
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for (i = 0; i < DM4_LEN; i = i + 2)
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M[dm4_rom[i]] = dm4_rom[i + 1];
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cpu_set_bootpc (DM4_START);
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}
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else {
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for (i = 0; i < OS8_LEN; i++)
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M[OS8_START + i] = os8_rom[i];
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cpu_set_bootpc (OS8_START);
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}
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return SCPE_OK;
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}
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/* Attach routine */
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t_stat df_attach (UNIT *uptr, CONST char *cptr)
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{
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uint32 p, sz;
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uint32 ds_bytes = DF_DKSIZE * sizeof (int16);
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if ((uptr->flags & UNIT_AUTO) && (sz = sim_fsize_name (cptr))) {
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p = (sz + ds_bytes - 1) / ds_bytes;
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if (p >= DF_NUMDK)
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p = DF_NUMDK - 1;
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uptr->flags = (uptr->flags & ~UNIT_PLAT) |
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(p << UNIT_V_PLAT);
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}
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uptr->capac = UNIT_GETP (uptr->flags) * DF_DKSIZE;
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return attach_unit (uptr, cptr);
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}
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/* Change disk size */
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t_stat df_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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if (val < 0)
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return SCPE_IERR;
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if (uptr->flags & UNIT_ATT)
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return SCPE_ALATT;
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uptr->capac = UNIT_GETP (val) * DF_DKSIZE;
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uptr->flags = uptr->flags & ~UNIT_AUTO;
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return SCPE_OK;
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}
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const char *df_description (DEVICE *dptr)
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{
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return "DF32 fixed head disk";
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}
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