e2ba672610
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT enable this feature for normal operations. 1. New Features in 3.2-1 1.1 SCP and libraries - Added SET CONSOLE subhierarchy. - Added SHOW CONSOLE subhierarchy. - Added limited keyboard mapping capability. 1.2 HP2100 (new features from Dave Bryan) - Added instruction printout to HALT message. - Added M and T internal registers. - Added N, S, and U breakpoints. 1.3 PDP-11 and VAX - Added DHQ11 support (from John Dundas) 2. Bugs Fixed in 3.2-1 2.1 HP2100 (most fixes from Dave Bryan) - SBT increments B after store. - DMS console map must check dms_enb. - SFS x,C and SFC x,C work. - MP violation clears automatically on interrupt. - SFS/SFC 5 is not gated by protection enabled. - DMS enable does not disable mem prot checks. - DMS status inconsistent at simulator halt. - Examine/deposit are checking wrong addresses. - Physical addresses are 20b not 15b. - Revised DMS to use memory rather than internal format. - Revised IBL facility to conform to microcode. - Added DMA EDT I/O pseudo-opcode. - Separated DMA SRQ (service request) from FLG. - Revised peripherals to make SFS x,C and SFC x,C work. - Revised boot ROMs to use IBL facility. - Revised IBL treatment of SR to preserve SR<5:3>. - Fixed LPS, LPT timing. - Fixed DP boot interpretation of SR<0>. - Revised DR boot code to use IBL algorithm. - Fixed TTY input behavior during typeout for RTE-IV. - Suppressed nulls on TTY output for RTE-IV. - Added SFS x,C and SFC x,C to print/parse routines. - Fixed spurious timing error in magtape reads. 2.2 All DEC console devices - Removed SET TTI CTRL-C option. 2.3 PDP-11/VAX peripherals - Fixed bug in TQ reporting write protect status (reported by Lyle Bickley). - Fixed TK70 model number and media ID (found by Robert Schaffrath). - Fixed bug in autoconfigure (found by John Dundas). 2.4 VAX - Fixed bug in DIVBx and DIVWx (reported by Peter Trimmel).
86 lines
4.2 KiB
C
86 lines
4.2 KiB
C
/* altairz80_defs.h: MITS Altair simulator definitions
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Copyright (c) 2002-2004, Peter Schorn
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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PETER SCHORN BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Peter Schorn shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Peter Schorn.
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Based on work by Charles E Owen (c) 1997
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*/
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#include "sim_defs.h" /* simulator definitions */
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#define MAXMEMSIZE 65536 /* maximum memory size */
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#define ADDRMASK (MAXMEMSIZE - 1) /* address mask */
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#define bootrom_size 256 /* size of boot rom */
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#define MAXBANKS 8 /* max number of memory banks */
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#define MAXBANKSLOG2 3 /* log2 of MAXBANKS */
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#define BANKMASK (MAXBANKS-1) /* bank mask */
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#define MEMSIZE (cpu_unit.capac) /* actual memory size */
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#define KB 1024 /* kilo byte */
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#define defaultROMLow 0xff00 /* default for lowest addres of ROM */
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#define defaultROMHigh 0xffff /* default for highest addres of ROM */
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#define NUM_OF_DSK 8 /* NUM_OF_DSK must be power of two */
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#define LDAInstruction 0x3e /* op-code for LD A,<8-bit value> instruction */
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#define unitNoOffset1 0x37 /* LD A,<unitno> */
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#define unitNoOffset2 0xb4 /* LD a,80h | <unitno> */
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#define UNIT_V_OPSTOP (UNIT_V_UF+0) /* stop on nvalid operation */
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#define UNIT_OPSTOP (1 << UNIT_V_OPSTOP)
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#define UNIT_V_CHIP (UNIT_V_UF+1) /* 8080 or Z80 CPU */
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#define UNIT_CHIP (1 << UNIT_V_CHIP)
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#define UNIT_V_MSIZE (UNIT_V_UF+2) /* memory size */
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#define UNIT_MSIZE (1 << UNIT_V_MSIZE)
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#define UNIT_V_BANKED (UNIT_V_UF+3) /* banked memory is used */
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#define UNIT_BANKED (1 << UNIT_V_BANKED)
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#define UNIT_V_ROM (UNIT_V_UF+4) /* ROM exists */
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#define UNIT_ROM (1 << UNIT_V_ROM)
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#define UNIT_V_ALTAIRROM (UNIT_V_UF+5) /* ALTAIR ROM exists */
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#define UNIT_ALTAIRROM (1 << UNIT_V_ALTAIRROM)
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#define UNIT_V_WARNROM (UNIT_V_UF+6) /* warn if ROM is written to */
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#define UNIT_WARNROM (1 << UNIT_V_WARNROM)
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#define AddressFormat "[%04xh]"
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#define PCformat "\n" AddressFormat " "
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#define message1(p1) \
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sprintf(messageBuffer,PCformat p1,PCX); printMessage()
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#define message2(p1,p2) \
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sprintf(messageBuffer,PCformat p1,PCX,p2); printMessage()
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#define message3(p1,p2,p3) \
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sprintf(messageBuffer,PCformat p1,PCX,p2,p3); printMessage()
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#define message4(p1,p2,p3,p4) \
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sprintf(messageBuffer,PCformat p1,PCX,p2,p3,p4); printMessage()
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#define message5(p1,p2,p3,p4,p5) \
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sprintf(messageBuffer,PCformat p1,PCX,p2,p3,p4,p5); printMessage()
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#define message6(p1,p2,p3,p4,p5,p6) \
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sprintf(messageBuffer,PCformat p1,PCX,p2,p3,p4,p5,p6); printMessage()
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/* The Default is to use "inline". */
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#if defined(NO_INLINE)
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#define INLINE
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#else
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#if defined(__DECC) && defined(VMS)
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#define INLINE __inline
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#else
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#define INLINE inline
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#endif
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#endif
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