26aa6de663
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT enable this feature for normal operations. WARNING: The core simulator files (scp.c, sim_*.c) have been reorganized. Unzip V3.2-0 to an empty directory before attempting to compile the source. IMPORTANT: If you are compiling for UNIX, please read the notes for Ethernet very carefully. You may need to download a new version of the pcap library, or make changes to the makefile, to get Ethernet support to work. 1. New Features in 3.2-0 1.1 SCP and libraries - Added SHOW <device> RADIX command. - Added SHOW <device> MODIFIERS command. - Added SHOW <device> NAMES command. - Added SET/SHOW <device> DEBUG command. - Added sim_vm_parse_addr and sim_vm_fprint_addr optional interfaces. - Added REG_VMAD flag. - Split SCP into separate libraries for easier modification. - Added more room to the device and unit flag fields. - Changed terminal multiplexor library to support unlimited. number of async lines. 1.2 All DECtapes - Added STOP_EOR flag to enable end-of-reel error stop - Added device debug support. 1.3 Nova and Eclipse - Added QTY and ALM multiplexors (Bruce Ray). 1.4 LGP-30 - Added LGP-30/LGP-21 simulator. 1.5 PDP-11 - Added format, address increment inhibit, transfer overrun detection to RK. - Added device debug support to HK, RP, TM, TQ, TS. - Added DEUNA/DELUA (XU) support (Dave Hittner). - Add DZ per-line logging. 1.6 18b PDP's - Added support for 1-4 (PDP-9)/1-16 (PDP-15) additional terminals. 1.7 PDP-10 - Added DEUNA/DELUA (XU) support (Dave Hittner). 1.8 VAX - Added extended memory to 512MB (Mark Pizzolato). - Added RXV21 support. 2. Bugs Fixed in 3.2-0 2.1 SCP - Fixed double logging of SHOW BREAK (found by Mark Pizzolato). - Fixed implementation of REG_VMIO. 2.2 Nova and Eclipse - Fixed device enable/disable support (found by Bruce Ray). 2.3 PDP-1 - Fixed bug in LOAD (found by Mark Crispin). 2.4 PDP-10 - Fixed bug in floating point unpack. - Fixed bug in FIXR (found by Phil Stone, fixed by Chris Smith). 2.6 PDP-11 - Fixed bug in RQ interrupt control (found by Tom Evans). 2.6 PDP-18B - Fixed bug in PDP-15 XVM g_mode implementation. - Fixed bug in PDP-15 indexed address calculation. - Fixed bug in PDP-15 autoindexed address calculation. - Fixed bugs in FPP-15 instruction decode. - Fixed clock response to CAF. - Fixed bug in hardware read-in mode bootstrap. - Fixed PDP-15 XVM instruction decoding errors. 2.7 VAX - Fixed PC read fault in EXTxV. - Fixed PC write fault in INSV.
221 lines
9 KiB
C
221 lines
9 KiB
C
/* i1620_defs.h: IBM 1620 simulator definitions
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Copyright (c) 2002-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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This simulator is based on the 1620 simulator written by Geoff Kuenning.
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I am grateful to Al Kossow, the Computer History Museum, and the IBM Corporate
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Archives for their help in gathering documentation about the IBM 1620.
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18-Oct-02 RMS Fixed bug in ADDR_S macro (found by Hans Pufal)
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*/
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#include "sim_defs.h" /* simulator defns */
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/* Simulator stop codes */
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#define STOP_HALT 1 /* HALT */
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#define STOP_IBKPT 2 /* breakpoint */
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#define STOP_INVINS 3 /* invalid instruction */
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#define STOP_INVDIG 4 /* invalid digit */
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#define STOP_INVCHR 5 /* invalid char */
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#define STOP_INVIND 6 /* invalid indicator */
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#define STOP_INVPDG 7 /* invalid P addr digit */
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#define STOP_INVPAD 8 /* invalid P addr */
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#define STOP_INVPIA 9 /* invalid P indir addr */
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#define STOP_INVQDG 10 /* invalid Q addr digits */
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#define STOP_INVQAD 11 /* invalid Q addr */
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#define STOP_INVQIA 12 /* invalid Q indir addr */
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#define STOP_INVIO 13 /* invalid IO address */
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#define STOP_INVRTN 14 /* invalid return */
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#define STOP_INVFNC 15 /* invalid function */
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#define STOP_INVIAD 16 /* invalid instr addr */
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#define STOP_INVSEL 17 /* invalid select */
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#define STOP_INVIDX 18 /* invalid index instr */
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#define STOP_INVEAD 19 /* invalid even addr */
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#define STOP_INVDCF 20 /* invalid DCF addr */
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#define STOP_INVDRV 21 /* invalid disk drive */
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#define STOP_INVDSC 22 /* invalid disk sector */
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#define STOP_INVDCN 23 /* invalid disk count */
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#define STOP_INVDBA 24 /* invalid disk buf addr */
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#define STOP_DACERR 25 /* disk addr comp err */
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#define STOP_DWCERR 26 /* disk wr check err */
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#define STOP_CYOERR 27 /* cylinder ovflo err */
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#define STOP_WRLERR 28 /* wrong rec lnt err */
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#define STOP_CCT 29 /* runaway CCT */
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#define STOP_FWRAP 30 /* field wrap */
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#define STOP_RWRAP 31 /* record wrap */
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#define STOP_NOCD 32 /* no card in reader */
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#define STOP_OVERFL 33 /* overflow */
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#define STOP_EXPCHK 34 /* exponent error */
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#define STOP_WRADIS 35 /* write addr disabled */
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#define STOP_FPLNT 36 /* invalid fp length */
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#define STOP_FPUNL 37 /* fp lengths unequal */
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#define STOP_FPMF 38 /* no flag on exp */
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#define STOP_FPDVZ 39 /* divide by zero */
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/* Memory */
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#define MAXMEMSIZE 60000 /* max mem size */
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#define MEMSIZE (cpu_unit.capac) /* act memory size */
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/* Processor parameters */
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#define INST_LEN 12 /* inst length */
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#define ADDR_LEN 5 /* addr length */
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#define MUL_TABLE 100 /* multiply table */
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#define MUL_TABLE_LEN 200
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#define ADD_TABLE 300 /* add table */
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#define ADD_TABLE_LEN 100
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#define IDX_A 300 /* index A base */
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#define IDX_B 340 /* index B base */
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#define PROD_AREA 80 /* product area */
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#define PROD_AREA_LEN 20 /* product area */
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#define PROD_AREA_END (PROD_AREA + PROD_AREA_LEN)
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/* Branch indicator codes */
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#define NUM_IND 100 /* number of indicators */
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#define IN_SW1 1 /* sense switch 1 */
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#define IN_SW2 2 /* sense switch 2 */
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#define IN_SW3 3 /* sense switch 3 */
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#define IN_SW4 4 /* sense switch 4 */
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#define IN_RDCHK 6 /* read check (I/O error) */
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#define IN_WRCHK 7 /* write check (I/O error) */
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#define IN_LAST 9 /* last card was just read */
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#define IN_HP 11 /* high or positive result */
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#define IN_EZ 12 /* equal or zero result */
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#define IN_HPEZ 13 /* high/positive or equal/zero */
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#define IN_OVF 14 /* overflow */
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#define IN_EXPCHK 15 /* floating exponent check */
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#define IN_MBREVEN 16 /* even parity check */
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#define IN_MBRODD 17 /* odd parity check */
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#define IN_ANYCHK 19 /* any of read, write, even/odd */
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#define IN_PRCHK 25 /* printer check */
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#define IN_IXN 30 /* IX neither */
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#define IN_IXA 31 /* IX A band */
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#define IN_IXB 32 /* IX B band */
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#define IN_PRCH9 33 /* printer chan 9 */
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#define IN_PRCH12 34 /* printer chan 12 */
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#define IN_PRBSY 35 /* printer busy */
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#define IN_DACH 36 /* disk addr/data check */
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#define IN_DWLR 37 /* disk rec length */
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#define IN_DCYO 38 /* disk cyl overflow */
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#define IN_DERR 39 /* disk any error */
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/* I/O channel codes */
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#define NUM_IO 100 /* number of IO chan */
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#define IO_TTY 1 /* console typewriter */
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#define IO_PTP 2 /* paper-tape punch */
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#define IO_PTR 3 /* paper-tape reader */
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#define IO_CDP 4 /* card punch */
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#define IO_CDR 5 /* card reader */
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#define IO_DSK 7 /* disk */
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#define IO_LPT 9 /* line printer */
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#define IO_BTP 32 /* binary ptp */
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#define IO_BTR 33 /* binary ptr */
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#define LPT_WIDTH 120 /* line print width */
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#define CCT_LNT 132 /* car ctrl length */
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#define CRETIOE(f,c) return ((f)? (c): SCPE_OK)
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/* Memory representation: flag + BCD digit per byte */
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#define FLAG 0x10
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#define DIGIT 0x0F
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#define REC_MARK 0xA
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#define NUM_BLANK 0xC
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#define GRP_MARK 0xF
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#define BAD_DIGIT(x) ((x) > 9)
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/* Instruction format */
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#define I_OP 0 /* opcode */
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#define I_P 2 /* P start */
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#define I_PL 6 /* P end */
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#define I_Q 7 /* Q start */
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#define I_QL 11 /* Q end */
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#define I_IO 8 /* IO select */
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#define I_BR 8 /* indicator select */
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#define I_CTL 10 /* control select */
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#define I_SEL 11 /* BS select */
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#define ADDR_A(x,a) ((((x) + (a)) >= MEMSIZE)? ((x) + (a) - MEMSIZE): ((x) + (a)))
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#define ADDR_S(x,a) (((x) < (a))? ((x) - (a) + MEMSIZE): ((x) - (a)))
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#define PP(x) x = ADDR_A(x,1)
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#define MM(x) x = ADDR_S(x,1)
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/* CPU options, stored in cpu_unit.flags */
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/* Decoding flags must be part of the same definition set */
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#define UNIT_SCP ((1 << UNIT_V_UF) - 1) /* mask of SCP flags */
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#define IF_MII (1 << (UNIT_V_UF + 0)) /* model 2 */
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#define IF_DIV (1 << (UNIT_V_UF + 1)) /* automatic divide */
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#define IF_IA (1 << (UNIT_V_UF + 2)) /* indirect addressing */
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#define IF_EDT (1 << (UNIT_V_UF + 3)) /* edit */
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#define IF_FP (1 << (UNIT_V_UF + 4)) /* floating point */
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#define IF_BIN (1 << (UNIT_V_UF + 5)) /* binary */
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#define IF_IDX (1 << (UNIT_V_UF + 6)) /* indexing */
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#define IF_VPA (1 << (UNIT_V_UF + 7)) /* valid P addr */
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#define IF_VQA (1 << (UNIT_V_UF + 8)) /* valid Q addr */
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#define IF_4QA (1 << (UNIT_V_UF + 9)) /* 4 char Q addr */
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#define IF_NQX (1 << (UNIT_V_UF + 10)) /* no Q indexing */
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#define IF_IMM (1 << (UNIT_V_UF + 11)) /* immediate */
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#define UNIT_BCD (1 << (UNIT_V_UF + 12)) /* BCD coded */
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#define UNIT_MSIZE (1 << (UNIT_V_UF + 13)) /* fake flag */
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#define ALLOPT (IF_DIV + IF_IA + IF_EDT + IF_FP + IF_BIN + IF_IDX)
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#define MI_OPT (IF_DIV + IF_IA + IF_EDT + IF_FP)
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#define MI_STD (IF_DIV + IF_IA + IF_EDT)
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#define MII_OPT (ALLOPT)
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#define MII_STD (IF_DIV + IF_IA + IF_EDT + IF_BIN + IF_IDX)
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/* Add status codes */
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#define ADD_NOCRY 0 /* no carry out */
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#define ADD_CARRY 1 /* carry out */
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#define ADD_SIGNC 2 /* sign change */
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/* Opcodes */
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enum opcodes {
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OP_FADD = 1, OP_FSUB, OP_FMUL, /* 00 - 09 */
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OP_FSL = 5, OP_TFL, OP_BTFL, OP_FSR, OP_FDIV,
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OP_BTAM = 10, OP_AM, OP_SM, OP_MM, OP_CM, /* 10 - 19 */
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OP_TDM, OP_TFM, OP_BTM, OP_LDM, OP_DM,
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OP_BTA = 20, OP_A, OP_S, OP_M, OP_C, /* 20 - 29 */
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OP_TD, OP_TF, OP_BT, OP_LD, OP_D,
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OP_TRNM = 30, OP_TR, OP_SF, OP_CF, OP_K, /* 30 - 39 */
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OP_DN, OP_RN, OP_RA, OP_WN, OP_WA,
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OP_NOP = 41, OP_BB, OP_BD, OP_BNF, /* 40 - 49 */
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OP_BNR, OP_BI, OP_BNI, OP_H, OP_B,
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OP_BNG = 55,
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OP_BS = 60, OP_BX, OP_BXM, OP_BCX, OP_BCXM, /* 60 - 69 */
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OP_BLX, OP_BLXM, OP_BSX,
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OP_MA = 70, OP_MF, OP_TNS, OP_TNF, /* 70 - 79 */
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/* 80 - 89 */
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OP_BBT = 90, OP_BMK, OP_ORF, OP_ANDF, OP_CPLF, /* 90 - 99 */
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OP_EORF, OP_OTD, OP_DTO };
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