7d432406b6
Remove explicit redundant extern declarations in source files that are defined in processor include files.
560 lines
19 KiB
C
560 lines
19 KiB
C
#ifdef USE_DISPLAY
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/* pdp11_vt.c: PDP-11 VT11/VS60 Display Processor Simulation
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Copyright (c) 2003-2004, Philip L. Budne, Douglas A. Gwyn
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Copyright (c) 1993-2003, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the names of the authors shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from the authors.
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vt VT11/VS60 Display Processor
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05-Feb-04 DAG Improved VT11 emulation
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Added VS60 support
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14-Sep-03 PLB Start from pdp11_lp.c
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*/
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/*
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* this file is just a thin layer of glue to the simulator-
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* independent XY Display simulation
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*/
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#if defined (VM_VAX) /* VAX version */
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#include "vax_defs.h"
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#elif defined(VM_PDP11) /* PDP-11 version */
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#include "pdp11_defs.h"
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#else
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#error "VT11/VS60 is supported only on the PDP-11 and VAX"
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#endif
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#include "display/display.h"
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#include "display/vt11.h"
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#include "sim_video.h"
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/*
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* Timing parameters. Should allow some runtime adjustment,
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* since several different configurations were shipped, including:
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*
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* GT40: PDP-11/05 with VT11 display processor
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* GT44: PDP-11/40 with VT11 display processor
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* GT46: PDP-11/34 with VT11 display processor
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* GT62: PDP-11/34a with VS60 display system
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*/
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/*
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* run a VT11/VS60 cycle every this many PDP-11 "cycle" times;
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*
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* this includes phosphor aging and polling for events (mouse movement)
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* every refresh_interval (determined internally while processing the
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* VT11/VS60 cycle).
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*/
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#define VT11_DELAY 1
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/*
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* memory cycle time
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*/
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#define MEMORY_CYCLE 1 /* either .98 or 1.2 us? */
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/*
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* delay in microseconds between VT11/VS60 cycles:
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* VT11/VS60 and PDP-11 CPU's share the same memory bus,
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* and each VT11/VS60 instruction requires a memory reference;
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* figure each PDP11 instruction requires two memory references
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*/
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#define CYCLE_US (MEMORY_CYCLE*(VT11_DELAY*2+1))
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extern int32 int_vec[IPL_HLVL][32];
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t_stat vt_rd(int32 *data, int32 PA, int32 access);
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t_stat vt_wr(int32 data, int32 PA, int32 access);
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t_stat vt_svc(UNIT *uptr);
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t_stat vt_reset(DEVICE *dptr);
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t_stat vt_boot(int32 unit, DEVICE *dptr);
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t_stat vt_set_crt(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat vt_show_crt(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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t_stat vt_set_scale(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat vt_show_scale(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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t_stat vt_set_hspace(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat vt_show_hspace(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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t_stat vt_set_vspace(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat vt_show_vspace(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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t_stat vt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
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const char *vt_description (DEVICE *dptr);
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/* VT11/VS60 data structures
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vt_dev VT11 device descriptor
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vt_unit VT11 unit descriptor
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vt_reg VT11 register list
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vt_mod VT11 modifier list
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*/
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#define IOLN_VT11 010 /* VT11 */
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#define IOLN_VS60 040 /* VS60 */
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DIB vt_dib = { IOBA_AUTO, IOLN_VT11, &vt_rd, &vt_wr,
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4, IVCL(VTST), VEC_AUTO, {NULL}, IOLN_VT11 };
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/* (VT11 uses only the first 3 interrupt vectors) */
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UNIT vt_unit = {
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UDATA (&vt_svc, UNIT_SEQ, 0), VT11_DELAY};
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REG vt_reg[] = {
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{ DRDATAD (CYCLE, vt_unit.wait, 24, "VT11/VS60 cycle"), REG_NZ + PV_LEFT },
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{ GRDATA (DEVADDR, vt_dib.ba, DEV_RDX, 32, 0), REG_HRO },
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{ GRDATA (DEVVEC, vt_dib.vec, DEV_RDX, 16, 0), REG_HRO },
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{ NULL } };
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MTAB vt_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "CRT", "CRT={VR14|VR17|VR48}",
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&vt_set_crt, &vt_show_crt, NULL, "CRT Type" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "SCALE", "SCALE={1|2|4|8}",
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&vt_set_scale, &vt_show_scale, NULL, "Pixel Scale Factor" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "HSPACE", "HSPACE={NARROW|NORMAL}",
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&vt_set_hspace, &vt_show_hspace, NULL, "Horizontal Spacing" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VSPACE", "VSPACE={TALL|NORMAL}",
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&vt_set_vspace, &vt_show_vspace, NULL, "Vertical Spacing" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 020, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL, "Interrupt vector" },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "AUTOCONFIGURE",
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&set_addr_flt, NULL, NULL, "Enable autoconfiguration of address & vector" },
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{ 0 } };
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static t_bool vt_stop_flag = FALSE;
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static void vt_quit_callback (void)
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{
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vt_stop_flag = TRUE;
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}
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/* Debug detail levels */
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#define DEB_OPS 0001 /* transactions */
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#define DEB_RRD 0002 /* reg reads */
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#define DEB_RWR 0004 /* reg writes */
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#define DEB_TRC 0010 /* trace */
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#define DEB_STINT 0020 /* STOP interrupts */
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#define DEB_LPINT 0040 /* Light Pen interrupts */
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#define DEB_CHINT 0100 /* CHAR interrupts */
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#define DEB_NMINT 0200 /* NAME interrupts */
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#define DEB_INT 0360 /* All Interrupts */
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#define DEB_VT11 0400 /* VT11 activities */
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#define DEB_VMOU SIM_VID_DBG_MOUSE /* Video mouse */
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#define DEB_VKEY SIM_VID_DBG_KEY /* Video key */
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#define DEB_VCUR SIM_VID_DBG_CURSOR /* Video cursor */
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#define DEB_VVID SIM_VID_DBG_VIDEO /* Video */
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DEBTAB vt_deb[] = {
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{ "OPS", DEB_OPS, "transactions" },
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{ "RRD", DEB_RRD, "register reads" },
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{ "RWR", DEB_RWR, "register writes" },
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{ "INT", DEB_INT, "All Interrupts" },
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{ "STOP", DEB_STINT, "STOP interrupts" },
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{ "LPEN", DEB_LPINT, "Light Pen interrupts" },
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{ "CHAR", DEB_CHINT, "CHAR interrupts" },
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{ "NAME", DEB_NMINT, "NAME interrupts" },
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{ "VT11", DEB_VT11, "VT11 activities" },
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{ "TRACE", DEB_TRC, "trace" },
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{ "VMOU", DEB_VMOU, "Video Mouse" },
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{ "VKEY", DEB_VKEY, "Video Key" },
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{ "VCUR", DEB_VCUR, "Video Cursor" },
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{ "VVID", DEB_VVID, "Video Video" },
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{ NULL, 0 }
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};
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DEVICE vt_dev = {
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"VT", &vt_unit, vt_reg, vt_mod,
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1, 8, 31, 1, DEV_RDX, 16,
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NULL, NULL, &vt_reset,
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&vt_boot, NULL, NULL,
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&vt_dib, DEV_DIS | DEV_DISABLE | DEV_UBUS | DEV_Q18 | DEV_DEBUG,
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0, vt_deb, NULL, NULL, NULL, NULL, NULL,
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&vt_description
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};
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const char *vt_regnam[] = {
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"DPC",
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"MPR",
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"XPR",
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"YPR",
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"RR",
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"SPR",
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"XOR",
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"YOR",
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"ANR",
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"SCR",
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"NR",
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"SDR",
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"STR",
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"SAR",
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"ZPR",
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"ZOR",
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};
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/* VT11/VS60 routines
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vt_rd I/O page read
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vt_wr I/O page write
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vt_svc process event
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vt_reset process reset
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vt_boot bootstrap device
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*/
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t_stat
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vt_rd(int32 *data, int32 PA, int32 access)
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{
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t_stat stat = SCPE_OK;
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switch (PA & 036) {
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case 000: *data = vt11_get_dpc(); break;
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case 002: *data = vt11_get_mpr(); break;
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case 004: *data = vt11_get_xpr(); break;
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case 006: *data = vt11_get_ypr(); break;
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case 010: if (VS60) *data = vt11_get_rr(); else stat = SCPE_NXM; break;
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case 012: if (VS60) *data = vt11_get_spr(); else stat = SCPE_NXM; break;
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case 014: if (VS60) *data = vt11_get_xor(); else stat = SCPE_NXM; break;
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case 016: if (VS60) *data = vt11_get_yor(); else stat = SCPE_NXM; break;
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case 020: if (VS60) *data = vt11_get_anr(); else stat = SCPE_NXM; break;
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case 022: if (VS60) *data = vt11_get_scr(); else stat = SCPE_NXM; break;
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case 024: if (VS60) *data = vt11_get_nr(); else stat = SCPE_NXM; break;
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case 026: if (VS60) *data = vt11_get_sdr(); else stat = SCPE_NXM; break;
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case 030: if (VS60) *data = vt11_get_str(); else stat = SCPE_NXM; break;
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case 032: if (VS60) *data = vt11_get_sar(); else stat = SCPE_NXM; break;
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case 034: if (VS60) *data = vt11_get_zpr(); else stat = SCPE_NXM; break;
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case 036: if (VS60) *data = vt11_get_zor(); else stat = SCPE_NXM; break;
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default: stat = SCPE_NXM;
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}
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sim_debug (DEB_RRD, &vt_dev, "vt_rd(%s-PA=0%o,data=0x%X(0%o),access=%d)\n", vt_regnam[(PA & 036)>>1], (int)PA, (int)*data, (int)*data, (int)access);
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return stat;
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}
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t_stat
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vt_wr(int32 data, int32 PA, int32 access)
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{
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uint16 d = data & 0177777; /* mask just in case */
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sim_debug (DEB_RWR, &vt_dev, "vt_wr(%s-PA=0%o,data=0x%X(0%o),access=%d)\n", vt_regnam[(PA & 036)>>1], (int)PA, (int)data, (int)data, (int)access);
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switch (PA & 037) {
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case 000: /* DPC */
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/* set the simulator PC */
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vt11_set_dpc(d);
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/* Interrupt requests are cleared as each vector is dispatched,
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so in general, no need to clear interrupt requests here.
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However, if software is running at high IPL (diagnostics maybe)
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clearing them here does no harm */
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if (INT_IS_SET(VTST)) {
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sim_debug (DEB_STINT, &vt_dev, "CLR_INT(all)\n");
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CLR_INT (VTST);
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}
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if (INT_IS_SET(VTLP)) {
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sim_debug (DEB_LPINT, &vt_dev, "CLR_INT(all)\n");
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CLR_INT (VTLP);
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}
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if (INT_IS_SET(VTCH)) {
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sim_debug (DEB_CHINT, &vt_dev, "CLR_INT(all)\n");
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CLR_INT (VTCH);
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}
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if (INT_IS_SET(VTNM)) {
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sim_debug (DEB_NMINT, &vt_dev, "CLR_INT(all)\n");
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CLR_INT (VTNM);
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}
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/* start the display processor by running a cycle */
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vt_svc (&vt_unit);
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return SCPE_OK;
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case 002: vt11_set_mpr(d); return SCPE_OK;
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case 004: vt11_set_xpr(d); return SCPE_OK;
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case 006: vt11_set_ypr(d); return SCPE_OK;
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case 010: if (!VS60) break; vt11_set_rr(d); return SCPE_OK;
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case 012: if (!VS60) break; vt11_set_spr(d); return SCPE_OK;
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case 014: if (!VS60) break; vt11_set_xor(d); return SCPE_OK;
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case 016: if (!VS60) break; vt11_set_yor(d); return SCPE_OK;
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case 020: if (!VS60) break; vt11_set_anr(d); return SCPE_OK;
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case 022: if (!VS60) break; vt11_set_scr(d); return SCPE_OK;
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case 024: if (!VS60) break; vt11_set_nr(d); return SCPE_OK;
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case 026: if (!VS60) break; vt11_set_sdr(d); return SCPE_OK;
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case 030: if (!VS60) break; vt11_set_str(d); return SCPE_OK;
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case 032: if (!VS60) break; vt11_set_sar(d); return SCPE_OK;
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case 034: if (!VS60) break; vt11_set_zpr(d); return SCPE_OK;
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case 036: if (!VS60) break; vt11_set_zor(d); return SCPE_OK;
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}
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return SCPE_NXM;
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}
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/*
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* here to run a display processor cycle, called as a SIMH
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* "device service routine".
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*/
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t_stat
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vt_svc(UNIT *uptr)
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{
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sim_debug (DEB_TRC, &vt_dev, "vt_svc(wait=%d,DPC=0%o)\n", uptr->wait, vt11_get_dpc());
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if (vt11_cycle(uptr->wait, 0))
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sim_activate_after (uptr, uptr->wait); /* running; reschedule */
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if (vt_stop_flag) {
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vt_stop_flag = FALSE; /* reset flag after we notice it */
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return SCPE_STOP;
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}
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return SCPE_OK;
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}
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t_stat
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vt_reset(DEVICE *dptr)
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{
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if (!(dptr->flags & DEV_DIS))
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vt11_reset(dptr, DEB_VT11);
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vid_register_quit_callback (&vt_quit_callback);
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sim_debug (DEB_INT, &vt_dev, "CLR_INT(all)\n");
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CLR_INT (VTST);
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CLR_INT (VTLP);
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CLR_INT (VTCH);
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CLR_INT (VTNM);
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sim_cancel (dptr->units); /* deactivate unit */
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return auto_config ("VT", (dptr->flags & DEV_DIS) ? 0 : 1);
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}
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#include "pdp11_vt_lunar_rom.h" /* Lunar Lander image */
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/*
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* GT4x/GT62 bootstrap (acts as remote terminal)
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*
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*/
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t_stat
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vt_boot(int32 unit, DEVICE *dptr)
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{
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t_stat r;
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char stability[32];
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extern int32 saved_PC;
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/* XXX should do something like vt11_set_dpc(&appropriate_ROM_image) */
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/* Instead, since that won't be too useful.... */
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/* Load and start Lunar Lander which has the potential to be fun! */
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sim_set_memory_load_file (BOOT_CODE_ARRAY, BOOT_CODE_SIZE);
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r = load_cmd (0, BOOT_CODE_FILENAME);
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sim_set_memory_load_file (NULL, 0);
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/* Lunar Lander presumes a VT device vector base of 320 */
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if (0320 != vt_dib.vec) { /* If that is not the case, then copy the 320 vectors to the right place */
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M[(vt_dib.vec >> 1) + 0] = M[(0320 >> 1) + 0];
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M[(vt_dib.vec >> 1) + 1] = M[(0320 >> 1) + 1];
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M[(vt_dib.vec >> 1) + 2] = M[(0324 >> 1) + 0];
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M[(vt_dib.vec >> 1) + 3] = M[(0324 >> 1) + 1];
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M[(vt_dib.vec >> 1) + 4] = M[(0330 >> 1) + 0];
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M[(vt_dib.vec >> 1) + 5] = M[(0330 >> 1) + 1];
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M[(vt_dib.vec >> 1) + 6] = M[(0334 >> 1) + 0];
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M[(vt_dib.vec >> 1) + 7] = M[(0334 >> 1) + 1];
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}
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cpu_set_boot (saved_PC);
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set_cmd (0, "VT SCALE=1");
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set_cmd (0, "VT CRT=VR14");
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sprintf (stability, "%d", SIM_IDLE_STMIN);
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sim_set_idle (NULL, 0, stability, NULL); /* force minimum calibration stability */
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sim_clr_idle (NULL, 0, stability, NULL);
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return r;
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}
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/* SET/SHOW VT options: */
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t_stat
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vt_set_crt(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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char gbuf[CBUFSIZE];
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if (vt11_init)
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return SCPE_ALATT; /* should be "changes locked out" */
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if (cptr == NULL)
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return SCPE_ARG;
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get_glyph(cptr, gbuf, 0);
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if (strcmp(gbuf, "VR14") == 0)
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vt11_display = DIS_VR14;
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else if (strcmp(gbuf, "VR17") == 0)
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vt11_display = DIS_VR17;
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else if (strcmp(gbuf, "VR48") == 0)
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vt11_display = DIS_VR48;
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else
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return SCPE_ARG;
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vt_dib.lnt = (VS60) ? IOLN_VS60 : IOLN_VT11;
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deassign_device (&vt_dev);
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if (VS60)
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assign_device (&vt_dev, "VS60");
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return SCPE_OK;
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}
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t_stat
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vt_show_crt(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
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{
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fprintf(st, "crt=VR%d", (int)vt11_display);
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat
|
||
vt_set_scale(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||
{
|
||
t_stat r;
|
||
t_value v;
|
||
if (vt11_init)
|
||
return SCPE_ALATT; /* should be "changes locked out" */
|
||
if (cptr == NULL)
|
||
return SCPE_ARG;
|
||
v = get_uint(cptr, 10, 8, &r);
|
||
if (r != SCPE_OK)
|
||
return r;
|
||
if (v != 1 && v != 2 && v != 4 && v != 8)
|
||
return SCPE_ARG;
|
||
vt11_scale = v;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat
|
||
vt_show_scale(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||
{
|
||
fprintf(st, "scale=%d", (int)vt11_scale);
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat
|
||
vt_set_hspace(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||
{
|
||
char gbuf[CBUFSIZE];
|
||
if (vt11_init)
|
||
return SCPE_ALATT; /* should be "changes locked out" */
|
||
if (cptr == NULL)
|
||
return SCPE_ARG;
|
||
get_glyph(cptr, gbuf, 0);
|
||
if (strcmp(gbuf, "NARROW") == 0)
|
||
vt11_csp_w = 12;
|
||
else if (strcmp(gbuf, "NORMAL") == 0)
|
||
vt11_csp_w = 14;
|
||
else
|
||
return SCPE_ARG;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat
|
||
vt_show_hspace(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||
{
|
||
fprintf(st, "hspace=%s", vt11_csp_w==12 ? "narrow" : "normal");
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat
|
||
vt_set_vspace(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||
{
|
||
char gbuf[CBUFSIZE];
|
||
if (vt11_init)
|
||
return SCPE_ALATT; /* should be "changes locked out" */
|
||
if (cptr == NULL)
|
||
return SCPE_ARG;
|
||
get_glyph(cptr, gbuf, 0);
|
||
if (strcmp(gbuf, "TALL") == 0)
|
||
vt11_csp_h = 26;
|
||
else if (strcmp(gbuf, "NORMAL") == 0)
|
||
vt11_csp_h = 24;
|
||
else
|
||
return SCPE_ARG;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat
|
||
vt_show_vspace(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||
{
|
||
fprintf(st, "vspace=%s", vt11_csp_h==26 ? "tall" : "normal");
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* interface routines (called from display simulator) */
|
||
|
||
void
|
||
vt_stop_intr(void)
|
||
{
|
||
sim_debug (DEB_STINT, &vt_dev, "SET_INT (VTST)\n");
|
||
SET_INT (VTST);
|
||
}
|
||
|
||
void
|
||
vt_lpen_intr(void)
|
||
{
|
||
sim_debug (DEB_LPINT, &vt_dev, "SET_INT (VTLP)\n");
|
||
SET_INT (VTLP);
|
||
}
|
||
|
||
void
|
||
vt_char_intr(void)
|
||
{
|
||
sim_debug (DEB_CHINT, &vt_dev, "SET_INT (CHAR)\n");
|
||
SET_INT (VTCH);
|
||
}
|
||
|
||
void
|
||
vt_name_intr(void)
|
||
{
|
||
sim_debug (DEB_NMINT, &vt_dev, "SET_INT (VTNM)\n");
|
||
SET_INT (VTNM);
|
||
}
|
||
|
||
/* fetch memory */
|
||
int
|
||
vt_fetch(uint32 addr, vt11word *wp)
|
||
{
|
||
/* On PDP-11 Unibus 22-bit systems, the VT11/VS60 behaves as
|
||
an 18-bit Unibus peripheral and must go through the I/O map. */
|
||
|
||
/* apply Unibus map, when appropriate */
|
||
if (Map_ReadW(addr, 2, wp) == 0)
|
||
return 0; /* no problem */
|
||
/* else mapped address lies outside configured memory range */
|
||
|
||
*wp = 0164000; /* DNOP; just updates DPC if used */
|
||
/* which shouldn't happen */
|
||
return 1; /* used to set "time_out" flag */
|
||
}
|
||
|
||
const char *vt_description (DEVICE *dptr)
|
||
{
|
||
return (VS60) ? "VS60 Display processor"
|
||
: "VT11 Display processor";
|
||
}
|
||
|
||
#ifdef VM_PDP11
|
||
/* PDP-11 simulation provides this */
|
||
extern int32 SR; /* switch register */
|
||
#else
|
||
int32 SR; /* switch register */
|
||
#endif
|
||
|
||
void
|
||
cpu_set_switches(unsigned long val)
|
||
{
|
||
SR = val;
|
||
}
|
||
|
||
unsigned long
|
||
cpu_get_switches(void)
|
||
{
|
||
return SR;
|
||
}
|
||
#else /* USE_DISPLAY not defined */
|
||
char pdp11_vt_unused; /* sometimes empty object modules cause problems */
|
||
#endif /* USE_DISPLAY not defined */
|