b7c1eae41f
The source set has been extensively overhauled. For correct viewing, set Visual C++ or Emacs to have tab stops every 4 characters. 1. New Features in 3.4-1 1.1 All Ethernet devices - Added Windows user-defined adapter names (from Timothe Litt) 1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors - Added support for SET <unit>n DISCONNECT 1.3 VAX - Added latent QDSS support - Revised autoconfigure to handle QDSS 1.4 PDP-11 - Revised autoconfigure to handle more casees 2. Bugs Fixed in 3.4-1 2.1 SCP and libraries - Trim trailing spaces on all input (for example, attach file names) - Fixed sim_sock spurious SIGPIPE error in Unix/Linux - Fixed sim_tape misallocation of TPC map array for 64b simulators 2.2 1401 - Fixed bug, CPU reset was clearing SSB through SSG 2.3 PDP-11 - Fixed bug in VH vector display routine - Fixed XU runt packet processing (found by Tim Chapman) 2.4 Interdata - Fixed bug in SHOW PAS CONN/STATS - Fixed potential integer overflow exception in divide 2.5 SDS - Fixed bug in SHOW MUX CONN/STATS 2.6 HP - Fixed bug in SHOW MUX CONN/STATS 2.7 PDP-8 - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.8 PDP-18b - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.9 Nova, Eclipse - Fixed potential integer overflow exception in divide
223 lines
8.1 KiB
C
223 lines
8.1 KiB
C
/* pdp10_tim.c: PDP-10 tim subsystem simulator
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Copyright (c) 1993-2005, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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tim timer subsystem
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02-Feb-04 RMS Exported variables needed by Ethernet simulator
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29-Jan-02 RMS New data structures
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06-Jan-02 RMS Added enable/disable support
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02-Dec-01 RMS Fixed bug in ITS PC sampling (found by Dave Conroy)
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31-Aug-01 RMS Changed int64 to t_int64 for Windoze
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17-Jul-01 RMS Moved function prototype
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04-Jul-01 RMS Added DZ11 support
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*/
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#include "pdp10_defs.h"
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#include <time.h>
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#define TIM_N_HWRE 12 /* hwre bits */
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#define TIM_HWRE 0000000010000 /* hwre incr */
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#define TIM_DELAY 500
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#define TIM_TPS 1001 /* ticks per sec */
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#define DZ_MULT (TIM_TPS / 60) /* DZ poll multiplier */
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#define TB_MASK 037777777777777777777; /* 71 - 12 bits */
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#define UNIT_V_Y2K (UNIT_V_UF) /* Y2K compliant OS */
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#define UNIT_Y2K (1u << UNIT_V_Y2K)
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extern int32 apr_flg, pi_act;
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extern UNIT cpu_unit;
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extern d10 pcst;
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extern a10 pager_PC;
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t_int64 timebase = 0; /* 71b timebase */
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d10 ttg = 0; /* time to go */
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d10 period = 0; /* period */
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d10 quant = 0; /* ITS quantum */
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int32 diagflg = 0; /* diagnostics? */
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int32 tmxr_poll = TIM_DELAY * DZ_MULT; /* term mux poll */
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/* Exported variables */
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int32 clk_tps = TIM_TPS; /* clock ticks/sec */
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int32 tmr_poll = TIM_DELAY; /* clock poll */
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DEVICE tim_dev;
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t_stat tcu_rd (int32 *data, int32 PA, int32 access);
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extern t_stat wr_nop (int32 data, int32 PA, int32 access);
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t_stat tim_svc (UNIT *uptr);
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t_stat tim_reset (DEVICE *dptr);
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extern d10 Read (a10 ea, int32 prv);
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extern d10 ReadM (a10 ea, int32 prv);
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extern void Write (a10 ea, d10 val, int32 prv);
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extern void WriteP (a10 ea, d10 val);
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extern int32 pi_eval (void);
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/* TIM data structures
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tim_dev TIM device descriptor
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tim_unit TIM unit descriptor
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tim_reg TIM register list
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*/
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DIB tcu_dib = { IOBA_TCU, IOLN_TCU, &tcu_rd, &wr_nop, 0 };
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UNIT tim_unit = { UDATA (&tim_svc, 0, 0), TIM_DELAY };
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REG tim_reg[] = {
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{ ORDATA (TIMEBASE, timebase, 71 - TIM_N_HWRE) },
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{ ORDATA (TTG, ttg, 36) },
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{ ORDATA (PERIOD, period, 36) },
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{ ORDATA (QUANT, quant, 36) },
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{ DRDATA (TIME, tim_unit.wait, 24), REG_NZ + PV_LEFT },
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{ FLDATA (DIAG, diagflg, 0) },
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{ FLDATA (Y2K, tim_unit.flags, UNIT_V_Y2K), REG_HRO },
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{ NULL }
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};
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MTAB tim_mod[] = {
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{ UNIT_Y2K, 0, "non Y2K OS", "NOY2K", NULL },
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{ UNIT_Y2K, UNIT_Y2K, "Y2K OS", "Y2K", NULL },
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{ MTAB_XTD|MTAB_VDV, 000, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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{ 0 }
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};
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DEVICE tim_dev = {
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"TIM", &tim_unit, tim_reg, tim_mod,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, &tim_reset,
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NULL, NULL, NULL,
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&tcu_dib, DEV_DISABLE | DEV_UBUS
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};
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/* Timer instructions */
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t_bool rdtim (a10 ea, int32 prv)
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{
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ReadM (INCA (ea), prv);
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Write (ea, (timebase >> (35 - TIM_N_HWRE)) & DMASK, prv);
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Write (INCA(ea), (timebase << TIM_N_HWRE) & MMASK, prv);
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return FALSE;
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}
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t_bool wrtim (a10 ea, int32 prv)
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{
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timebase = (Read (ea, prv) << (35 - TIM_N_HWRE)) |
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(CLRS (Read (INCA (ea), prv)) >> TIM_N_HWRE);
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return FALSE;
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}
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t_bool rdint (a10 ea, int32 prv)
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{
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Write (ea, period, prv);
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return FALSE;
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}
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t_bool wrint (a10 ea, int32 prv)
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{
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period = Read (ea, prv);
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ttg = period;
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return FALSE;
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}
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/* Timer routines
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tim_svc process event (timer tick)
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tim_reset process reset
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*/
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t_stat tim_svc (UNIT *uptr)
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{
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int32 t;
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t = diagflg? tim_unit.wait: sim_rtc_calb (TIM_TPS); /* calibrate clock */
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sim_activate (&tim_unit, t); /* reactivate unit */
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tmr_poll = t; /* set timer poll */
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tmxr_poll = t * DZ_MULT; /* set mux poll */
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timebase = (timebase + 1) & TB_MASK; /* increment timebase */
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ttg = ttg - TIM_HWRE; /* decrement timer */
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if (ttg <= 0) { /* timeout? */
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ttg = period; /* reload */
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apr_flg = apr_flg | APRF_TIM; /* request interrupt */
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}
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if (ITS) { /* ITS? */
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if (pi_act == 0) quant = (quant + TIM_HWRE) & DMASK;
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if (TSTS (pcst)) { /* PC sampling? */
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WriteP ((a10) pcst & AMASK, pager_PC); /* store sample */
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pcst = AOB (pcst); /* add 1,,1 */
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}
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} /* end ITS */
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return SCPE_OK;
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}
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t_stat tim_reset (DEVICE *dptr)
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{
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int32 t;
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period = ttg = 0; /* clear timer */
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apr_flg = apr_flg & ~APRF_TIM; /* clear interrupt */
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t = sim_rtc_init (tim_unit.wait); /* init timer */
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sim_activate (&tim_unit, t); /* activate unit */
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tmr_poll = t; /* set timer poll */
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tmxr_poll = t * DZ_MULT; /* set mux poll */
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return SCPE_OK;
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}
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/* Time of year clock */
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t_stat tcu_rd (int32 *data, int32 PA, int32 access)
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{
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time_t curtim;
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struct tm *tptr;
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curtim = time (NULL); /* get time */
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tptr = localtime (&curtim); /* decompose */
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if (tptr == NULL) return SCPE_NXM; /* Y2K prob? */
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if ((tptr->tm_year > 99) && !(tim_unit.flags & UNIT_Y2K))
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tptr->tm_year = 99;
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switch ((PA >> 1) & 03) { /* decode PA<3:1> */
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case 0: /* year/month/day */
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*data = (((tptr->tm_year) & 0177) << 9) |
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(((tptr->tm_mon + 1) & 017) << 5) |
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((tptr->tm_mday) & 037);
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return SCPE_OK;
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case 1: /* hour/minute */
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*data = (((tptr->tm_hour) & 037) << 8) |
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((tptr->tm_min) & 077);
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return SCPE_OK;
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case 2: /* second */
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*data = (tptr->tm_sec) & 077;
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return SCPE_OK;
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case 3: /* status */
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*data = CSR_DONE;
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return SCPE_OK;
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}
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return SCPE_NXM; /* can't get here */
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}
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