9515201238
Card reader handle EOF correctly.
Line printer proper handling of paging.
Magtape clean up debug message.
Update 7010, 7070, 7080 for EOF handling.
438 lines
13 KiB
C
438 lines
13 KiB
C
/* i7000_cdr.c: IBM 7000 Card reader.
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Copyright (c) 2005-2016, Richard Cornwell
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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This is the standard card reader.
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These units each buffer one record in local memory and signal
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ready when the buffer is full or empty. The channel must be
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ready to recieve/transmit data when they are activated since
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they will transfer their block during chan_cmd. All data is
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transmitted as BCD characters.
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*/
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#include "i7000_defs.h"
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#include "sim_card.h"
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#include "sim_defs.h"
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#ifdef NUM_DEVS_CDR
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#define UNIT_CDR UNIT_ATTABLE | UNIT_RO | UNIT_DISABLE | MODE_026
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/* Flags for punch and reader. */
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#define ATTENA (1 << (UNIT_V_UF+7))
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#define ATTENB (1 << (UNIT_V_UF+14))
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/* std devices. data structures
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cdr_dev Card Reader device descriptor
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cdr_unit Card Reader unit descriptor
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cdr_reg Card Reader register list
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cdr_mod Card Reader modifiers list
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*/
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uint32 cdr_cmd(UNIT *, uint16, uint16);
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t_stat cdr_boot(int32, DEVICE *);
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t_stat cdr_srv(UNIT *);
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t_stat cdr_reset(DEVICE *);
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t_stat cdr_attach(UNIT *, CONST char *);
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t_stat cdr_detach(UNIT *);
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extern t_stat chan_boot(int32, DEVICE *);
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#ifdef I7070
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t_stat cdr_setload(UNIT *, int32, CONST char *, void *);
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t_stat cdr_getload(FILE *, UNIT *, int32, CONST void *);
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#endif
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t_stat cdr_help(FILE *, DEVICE *, UNIT *, int32, const char *);
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const char *cdr_description(DEVICE *dptr);
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UNIT cdr_unit[] = {
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{UDATA(cdr_srv, UNIT_S_CHAN(CHAN_CHUREC) | UNIT_CDR, 0), 300}, /* A */
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#if NUM_DEVS_CDR > 1
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{UDATA(cdr_srv, UNIT_S_CHAN(CHAN_CHUREC+1) | UNIT_CDR, 0), 300}, /* B */
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#endif
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};
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MTAB cdr_mod[] = {
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{MTAB_XTD | MTAB_VUN, 0, "FORMAT", "FORMAT",
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&sim_card_set_fmt, &sim_card_show_fmt, NULL, "Set card format"},
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#ifdef I7070
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{ATTENA|ATTENB, 0, NULL, "NOATTEN", NULL, NULL, NULL, "No attention signal"},
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{ATTENA|ATTENB, ATTENA, "ATTENA", "ATTENA", NULL, NULL, NULL, "Signal Attention A"},
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{ATTENA|ATTENB, ATTENB, "ATTENB", "ATTENB", NULL, NULL, NULL, "Signal Attention B"},
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{MTAB_XTD | MTAB_VUN | MTAB_VALR, 0, "LCOL", "LCOL", &cdr_setload,
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&cdr_getload, NULL, "Load card column indicator"},
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#endif
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#ifdef I7010
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{MTAB_XTD | MTAB_VUN | MTAB_VALR, 0, "CHAN", "CHAN", &set_chan,
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&get_chan, NULL, "Set device channel"},
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#endif
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{0}
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};
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DEVICE cdr_dev = {
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"CDR", cdr_unit, NULL, cdr_mod,
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NUM_DEVS_CDR, 8, 15, 1, 8, 8,
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NULL, NULL, NULL, &cdr_boot, &cdr_attach, &cdr_detach,
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&cdr_dib, DEV_DISABLE | DEV_DEBUG | DEV_CARD, 0, crd_debug,
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NULL, NULL, &cdr_help, NULL, NULL, &cdr_description
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};
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/*
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* Device entry points for card reader.
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*/
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uint32 cdr_cmd(UNIT * uptr, uint16 cmd, uint16 dev)
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{
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int chan = UNIT_G_CHAN(uptr->flags);
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int u = (uptr - cdr_unit);
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int stk = dev & 017;
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/* Are we currently tranfering? */
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if (uptr->u5 & URCSTA_READ)
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return SCPE_BUSY;
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/* Test ready */
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if (cmd == IO_TRS && uptr->flags & UNIT_ATT) {
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sim_debug(DEBUG_CMD, &cdr_dev, "%d: Test Rdy\n", u);
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return SCPE_OK;
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}
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if (stk == 10)
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stk = 0;
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#ifdef STACK_DEV
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uptr->u5 &= ~0xF0000;
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uptr->u5 |= stk << 16;
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#endif
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if (uptr->u5 & (URCSTA_EOF)) {
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uptr->u5 &= ~(URCSTA_EOF);
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return SCPE_EOF;
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}
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if (uptr->u5 & (URCSTA_ERR)) {
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uptr->u5 &= ~(URCSTA_ERR);
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return SCPE_IOERR;
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}
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/* Process commands */
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switch(cmd) {
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case IO_RDS:
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sim_debug(DEBUG_CMD, &cdr_dev, "%d: Cmd RDS %02o\n", u, dev & 077);
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#ifdef I7010
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if (stk!= 9)
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#endif
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uptr->u5 &= ~(URCSTA_CARD|URCSTA_ERR);
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break;
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case IO_CTL:
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sim_debug(DEBUG_CMD, &cdr_dev, "%d: Cmd CTL %02o\n", u, dev & 077);
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#ifdef I7010
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uptr->u5 |= URCSTA_NOXFER;
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#endif
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break;
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default:
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sim_debug(DEBUG_CMD, &cdr_dev, "%d: CMD none %02o\n", u, cmd);
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chan_set_attn(chan);
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return SCPE_IOERR;
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}
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/* If at eof, just return EOF */
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if (sim_card_eof(uptr)) {
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uint16 *image = (uint16 *)(uptr->up7);
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sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: EOF\n", u);
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chan_set_eof(chan);
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chan_set_attn(chan);
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uptr->u5 &= ~(URCSTA_EOF|URCSTA_ERR);
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(void)sim_read_card(uptr, image);
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return SCPE_EOF;
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}
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uptr->u5 |= URCSTA_READ;
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uptr->u4 = 0;
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if ((uptr->u5 & URCSTA_NOXFER) == 0)
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chan_set_sel(chan, 0);
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/* Wake it up if not busy */
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if ((uptr->u5 & URCSTA_BUSY) == 0)
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sim_activate(uptr, 50);
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return SCPE_OK;
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}
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/* Handle transfer of data for card reader */
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t_stat
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cdr_srv(UNIT *uptr) {
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int chan = UNIT_G_CHAN(uptr->flags);
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int u = (uptr - cdr_unit);
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uint16 *image = (uint16 *)(uptr->up7);
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/* Waiting for disconnect */
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if (uptr->u5 & URCSTA_WDISCO) {
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if (chan_stat(chan, DEV_DISCO)) {
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chan_clear(chan, DEV_SEL|DEV_WEOR);
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uptr->u5 &= ~ URCSTA_WDISCO;
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} else {
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/* No disco yet, try again in a bit */
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sim_activate(uptr, 50);
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return SCPE_OK;
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}
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/* If still busy, schedule another wait */
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if (uptr->u5 & URCSTA_BUSY)
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sim_activate(uptr, uptr->wait);
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}
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if (uptr->u5 & URCSTA_BUSY) {
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uptr->u5 &= ~URCSTA_BUSY;
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#ifdef I7070
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switch(uptr->flags & (ATTENA|ATTENB)) {
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case ATTENA: chan_set_attn_a(chan); break;
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case ATTENB: chan_set_attn_b(chan); break;
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}
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#endif
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}
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/* Check if new card requested. */
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if (uptr->u4 == 0 && uptr->u5 & URCSTA_READ &&
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(uptr->u5 & URCSTA_CARD) == 0) {
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switch(sim_read_card(uptr, image)) {
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case CDSE_EOF:
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sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: EOF\n", u);
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/* Fall through */
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case CDSE_EMPTY:
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chan_set_eof(chan);
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chan_set_attn(chan);
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chan_clear(chan, DEV_SEL);
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uptr->u5 |= URCSTA_EOF;
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uptr->u5 &= ~(URCSTA_BUSY|URCSTA_READ);
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return SCPE_OK;
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case CDSE_ERROR:
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sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: ERF\n", u);
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uptr->u5 |= URCSTA_ERR;
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uptr->u5 &= ~(URCSTA_BUSY|URCSTA_READ);
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chan_set_attn(chan);
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chan_clear(chan, DEV_SEL);
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return SCPE_OK;
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case CDSE_OK:
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uptr->u5 |= URCSTA_CARD;
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#ifdef I7010
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chan_set_attn_urec(chan, cdr_dib.addr);
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#endif
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break;
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}
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#ifdef I7070
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/* Check if load card. */
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if (uptr->capac && (image[uptr->capac-1] & 0x800)) {
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uptr->u5 |= URCSTA_LOAD;
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chan_set_load_mode(chan);
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} else {
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uptr->u5 &= ~URCSTA_LOAD;
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}
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#endif
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}
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if (uptr->u5 & URCSTA_NOXFER) {
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uptr->u5 &= ~(URCSTA_NOXFER|URCSTA_READ);
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return SCPE_OK;
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}
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/* Copy next column over */
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if (uptr->u5 & URCSTA_READ && uptr->u4 < 80) {
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uint8 ch = 0;
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#ifdef I7080
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/* Detect RSU */
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if (image[uptr->u4] == 0x924) {
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uptr->u5 &= ~URCSTA_READ;
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uptr->u5 |= URCSTA_WDISCO;
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chan_set(chan, DEV_REOR);
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sim_activate(uptr, 10);
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return SCPE_OK;
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}
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#endif
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ch = sim_hol_to_bcd(image[uptr->u4]);
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/* Handle 7-9 to generate 20 */
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if (ch == 012 && image[uptr->u4] == 0202) {
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ch = 020;
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}
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/* Handle invalid punch */
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if (ch == 0x7f) {
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#ifdef I7080
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uptr->u5 &= ~(URCSTA_READ|URCSTA_BUSY);
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sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: bad punch %d\n", u,
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uptr->u4);
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chan_set_attn(chan);
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chan_set_error(chan);
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chan_clear(chan, DEV_SEL);
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#else
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uptr->u5 |= URCSTA_ERR;
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ch = 017;
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#endif
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}
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#ifdef I7070
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/* During load, only sign on every 10 columns */
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if (uptr->u5 & URCSTA_LOAD && (uptr->u4 % 10) != 9)
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ch &= 0xf;
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#endif
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switch(chan_write_char(chan, &ch, (uptr->u4 == 79)? DEV_REOR: 0)) {
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case TIME_ERROR:
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case END_RECORD:
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uptr->u5 |= URCSTA_WDISCO|URCSTA_BUSY;
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uptr->u5 &= ~URCSTA_READ;
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break;
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case DATA_OK:
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uptr->u4++;
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break;
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}
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sim_debug(DEBUG_DATA, &cdr_dev, "%d: Char > %04o %02o\n", u, image[uptr->u4-1], ch);
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sim_activate(uptr, 10);
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}
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return SCPE_OK;
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}
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/* Boot from given device */
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t_stat
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cdr_boot(int32 unit_num, DEVICE * dptr)
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{
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UNIT *uptr = &dptr->units[unit_num];
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t_stat r;
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if ((uptr->flags & UNIT_ATT) == 0)
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return SCPE_UNATT; /* attached? */
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/* Read in one record */
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r = cdr_cmd(uptr, IO_RDS, cdr_dib.addr);
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if (r != SCPE_OK)
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return r;
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r = chan_boot(unit_num, dptr);
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return r;
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}
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t_stat
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cdr_attach(UNIT * uptr, CONST char *file)
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{
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t_stat r;
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if ((r = sim_card_attach(uptr, file)) != SCPE_OK)
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return r;
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if (uptr->up7 == 0) {
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uptr->up7 = malloc(sizeof(uint16)*80);
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uptr->u5 &= URCSTA_BUSY|URCSTA_WDISCO;
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uptr->u4 = 0;
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uptr->u6 = 0;
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}
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#ifdef I7010
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chan_set_attn_urec(UNIT_G_CHAN(uptr->flags), cdr_dib.addr);
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#endif
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return SCPE_OK;
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}
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t_stat
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cdr_detach(UNIT * uptr)
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{
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t_stat r;
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if ((r = sim_card_detach(uptr)) != SCPE_OK)
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return r;
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if (uptr->up7 != 0)
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free(uptr->up7);
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uptr->up7 = 0;
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return SCPE_OK;
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}
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#ifdef I7070
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t_stat
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cdr_setload(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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int i;
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if (cptr == NULL)
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return SCPE_ARG;
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if (uptr == NULL)
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return SCPE_IERR;
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i = 0;
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while(*cptr != '\0') {
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if (*cptr < '0' || *cptr > '9')
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return SCPE_ARG;
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i = (i * 10) + (*cptr++) - '0';
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}
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if (i > 80)
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return SCPE_ARG;
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uptr->capac = i;
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return SCPE_OK;
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}
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t_stat
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cdr_getload(FILE *st, UNIT *uptr, int32 v, CONST void *desc)
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{
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if (uptr == NULL)
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return SCPE_IERR;
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fprintf(st, "loadcolumn=%d", uptr->capac);
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return SCPE_OK;
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}
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#endif
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t_stat
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cdr_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
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{
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fprintf (st, "%s\n\n", cdr_description(dptr));
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#if NUM_DEVS_CDR > 1
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fprintf (st, "The system supports up to two card readers.\n");
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#else
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fprintf (st, "The system supports one card reader.\n");
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#endif
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#ifdef I7070
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fprintf (st, "Unit record devices can be configured to interrupt the CPU on\n");
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fprintf (st, "one of two priority channels A or B, to set this\n\n");
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fprintf (st, " sim> SET %s ATTENA To set device to raise Atten A\n\n", dptr->name);
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fprintf (st, "The 7500 Card reader supported a load mode, this was\n");
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fprintf (st, "selected by use of a 12 punch in a given column. When this\n");
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fprintf (st, "was seen the card was read into 8 words. Normal read is\n");
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fprintf (st, "text only\n\n");
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fprintf (st, " sim> SET %s LCOL=72 Sets column to select load mode\n\n", dptr->name);
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#endif
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#if NUM_DEVS_CDR > 1
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#ifdef I7010
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help_set_chan_type(st, dptr, "Card reader");
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#endif
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#endif
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sim_card_attach_help(st, dptr, uptr, flag, cptr);
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fprint_set_help(st, dptr);
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fprint_show_help(st, dptr);
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return SCPE_OK;
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}
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const char *
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cdr_description(DEVICE *dptr)
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{
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#ifdef I7010
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return "1402 Card Reader";
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#endif
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#ifdef I7070
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return "7500 Card Reader";
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#endif
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#ifdef I7080
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return "711 Card Reader";
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#endif
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}
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#endif
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