5cda68abce
Can now boot the last test programs from floppy, and runs INSTRUCTION-C and PAGING-C without errors.
304 lines
10 KiB
C
304 lines
10 KiB
C
/*
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* Copyright (c) 2023 Anders Magnusson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* masks for instruction matching.
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*/
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#define ND_MEMMSK 0174000
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#define ND_MEMSH 11
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#define ND_CJPMSK 0003400
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#define ND_CJPSH 8
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#define ND_IOXMSK 0003777
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#define ND_BOPSH 7
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#define ND_BOPMSK 0003600
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#define ND_ROPMSK 0177700
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/* mem instructions args */
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#define NDMEM_B 00400
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#define NDMEM_I 01000
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#define NDMEM_X 02000
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#define NDMEM_OMSK 0377
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/*
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* Major group of instructions (ND10 + ND100)
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* All up to CJP (+JPL) uses the memory address syntax.
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*/
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#define ND_STZ 0000000
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#define ND_STA 0004000
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#define ND_STT 0010000
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#define ND_STX 0014000
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#define ND_STD 0020000
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#define ND_LDD 0024000
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#define ND_STF 0030000
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#define ND_LDF 0034000
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#define ND_MIN 0040000
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#define ND_LDA 0044000
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#define ND_LDT 0050000
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#define ND_LDX 0054000
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#define ND_ADD 0060000
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#define ND_SUB 0064000
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#define ND_AND 0070000
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#define ND_ORA 0074000
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#define ND_FAD 0100000
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#define ND_FSB 0104000
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#define ND_FMU 0110000
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#define ND_FDV 0114000
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#define ND_MPY 0120000
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#define ND_JMP 0124000
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#define ND_CJP 0130000
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#define ND_JPL 0134000
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#define ND_SKP 0140000
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#define ND_ROP 0144000
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#define ND_MIS 0150000
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#define ND_SHT 0154000
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#define ND_NA 0160000
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#define ND_IOX 0164000
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#define ND_ARG 0170000
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#define ND_BOP 0174000
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#define ND_SKP_CLEPT 0140301
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#define ND_SKP_EXR 0140600
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#define ND_SKP_ADDD 0140120 /* CE/CX */
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#define ND_SKP_BFILL 0140130
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#define ND_SKP_MOVB 0140131
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#define ND_SKP_MOVBF 0140132
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#define ND_SKP_VERSN 0140133 /* ND110 */
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#define ND_SKP_RMPY 0141200
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#define ND_SKP_RDIV 0141600
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#define ND_SKP_LBYT 0142200
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#define ND_SKP_SBYT 0142600
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#define ND_SKP_MIX3 0143200
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#define ND_SKP_LDATX 0143300 /* ND100 */
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#define ND_SKP_LDXTX 0143301 /* ND100 */
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#define ND_SKP_LDDTX 0143302 /* ND100 */
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#define ND_SKP_LDBTX 0143303 /* ND100 */
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#define ND_SKP_STATX 0143304 /* ND100 */
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#define ND_SKP_STZTX 0143305 /* ND100 */
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#define ND_SKP_STDTX 0143306 /* ND100 */
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#define ND_SKP_LWCS 0143500 /* NOP on N110 */
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#define ND_SKP_IDENT10 0143604
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#define ND_SKP_IDENT11 0143611
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#define ND_SKP_IDENT12 0143622
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#define ND_SKP_IDENT13 0143643
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#define ISEXR(x) (((x) & 0177707) == ND_SKP_EXR)
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#define ND_MIS_TRA 0150000
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#define ND_MIS_TRR 0150100
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#define ND_MIS_MCL 0150200
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#define ND_MIS_MST 0150300
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#define ND_MIS_TRMSK 0177700
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#define ND_MIS_NLZ 0151400
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#define ND_MIS_DNZ 0152000
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#define ND_MIS_LRB 0152600
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#define ND_MIS_SRB 0152402
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#define ND_MIS_RBMSK 0177607
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#define ND_MIS_IRW 0153400
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#define ND_MIS_IRR 0153600
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#define ND_MIS_IRRMSK 0177600
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#define ND_MON 0153000
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#define ND_WAIT 0151000
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#define ND_MONMSK 0177400
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#define ND_MIS_OPCOM 0150400
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#define ND_MIS_IOF 0150401
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#define ND_MIS_ION 0150402
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#define ND_MIS_POF 0150404
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#define ND_MIS_PIOF 0150405
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#define ND_MIS_SEX 0150406
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#define ND_MIS_REX 0150407
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#define ND_MIS_PON 0150410
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#define ND_MIS_PION 0150412
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#define ND_MIS_IOXT 0150415
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#define ND_MIS_EXAM 0150416
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#define ND_MIS_DEPO 0150417
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/* Internal registers */
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#define IR_PANS 000 /* Panel status */
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#define IR_STS 001 /* Status reg (as in register stack) */
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#define IR_LMP 002 /* Display reg */
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#define IR_PCR 003 /* paging control reg */
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#define IR_IIC 005 /* Internal interrupt code */
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#define IR_IIE 005 /* Internal interrupt enable */
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#define IR_PID 006 /* Priority interrupt detect */
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#define IR_PIE 007 /* Priority interrupt enable */
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#define IR_CSR 010 /* Cache status reg */
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#define IR_CCL 010 /* (W) Cache clear reg */
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#define IR_LCIL 011 /* (W) Lower cache inhibit limit register */
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#define IR_UCIL 012 /* (W) Upper cache inhibit limit register */
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#define IR_ECCR 015 /* Error Correction Control Register */
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#define IRR_OPR 002 /* Operator reg */
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#define IRR_PGS 003 /* paging status reg */
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#define PGS_FF 0100000 /* fetch fault */
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#define PGS_PM 0040000 /* permit violation */
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#define IRR_PVL 004 /* Previous level (oddly encoded) */
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#define IRR_PES 013 /* Parity error status */
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#define PES_FETCH 0100000 /* Memory error during fetch, EXAM or DEPO */
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#define PES_DMA 0040000 /* Error occurred during DMA */
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#define IRR_PGC 014 /* Read paging control reg */
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#define IRR_PEA 015 /* Parity error address */
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int mm_tra(int reg);
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/* internal interrupt enable register */
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#define IIE_MC 0000002 /* Monitor call */
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#define IIE_PV 0000004 /* Protect Violation */
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#define IIE_PF 0000010 /* Page fault */
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#define IIE_II 0000020 /* Illegal instruction */
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#define IIE_V 0000040 /* Error indicator */
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#define IIE_PI 0000100 /* Privileged instruction */
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#define IIE_IOX 0000200 /* IOX error */
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#define IIE_PTY 0000400 /* Memory parity error */
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#define IIE_MOR 0001000 /* Memory out of range */
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#define IIE_POW 0002000 /* Power fail interrupt */
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/* Status register bits */
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#define STS_PTM 0000001 /* page table mode */
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#define STS_TG 0000002 /* floating point rounding mode */
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#define STS_K 0000004
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#define STS_Z 0000010
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#define STS_Q 0000020
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#define STS_O 0000040
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#define STS_C 0000100
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#define STS_M 0000200
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#define STS_N100 0010000 /* Nord-100 */
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#define STS_SEXI 0020000 /* Extended addressing enabled */
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#define STS_PONI 0040000 /* Paging turned on */
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#define STS_IONI 0100000 /* interrupts turned on */
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#define ISION() BIT15(regSTH)
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#define ISPON() BIT14(regSTH)
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#define ISSEX() BIT13(regSTH)
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/* page table bits */
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#define PT_WPM 0100000
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#define PT_RPM 0040000
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#define PT_FPM 0020000
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#define PT_WIP 0010000
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#define PT_PGU 0004000
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/* Simulator-specific stuff */
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#define rnSTS 0
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#define rnD 1
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#define rnP 2
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#define rnB 3
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#define rnL 4
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#define rnA 5
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#define rnT 6
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#define rnX 7
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#define regSTL R[0] /* Only low 8 bits valid */
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#define regD R[1]
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#define regP R[2]
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#define regB R[3]
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#define regL R[4]
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#define regA R[5]
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#define regT R[6]
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#define regX R[7]
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extern uint16 PM[];
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extern uint16 R[8];
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extern uint16 regSTH; /* common for all levels */
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extern int ald; /* Automatic load descriptor - set by boot */
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extern int curlvl; /* Current interrupt level */
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extern int userring; /* Current user ring */
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/*
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* interrupt link per device.
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*/
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struct intr {
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struct intr *next;
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short ident;
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short inuse;
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};
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extern DEVICE cpu_dev;
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extern DEVICE mm_dev;
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extern DEVICE tti_dev;
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extern DEVICE tto_dev;
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extern DEVICE floppy_dev;
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extern DEVICE clk_dev;
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int iox_floppy(int addr);
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int iox_tty(int addr);
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int iox_clk(int addr);
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/* virtual memory access */
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#define M_PHYS 0
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#define M_PT 1
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#define M_APT 2
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#define M_FETCH 3
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/* physical memory access */
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#define PM_CPU 10 /* CPU requesting (longjmp allowed) */
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#define PM_DMA 11 /* device requesting (no longjmp) */
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/* Decide page table for late read */
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#define SELPT2(IR) ((IR) & 03400 ? M_APT : M_PT)
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int dma_rdmem(int addr);
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int dma_wrmem(int addr, int val);
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uint16 prdmem(int addr, int how);
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void pwrmem(int addr, int val, int how);
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uint16 rdmem(int addr, int how);
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uint8 rdbyte(int vaddr, int lr, int how);
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void wrmem(int addr, int val, int how);
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void wrbyte(int vaddr, int val, int lr, int how);
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void mm_wrpcr(void);
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void mm_privcheck(void);
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void intrpt14(int, int where);
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void extint(int lvl, struct intr *intr);
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#define STOP_UNHIOX 1
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#define STOP_UNHINS 2
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#define STOP_CKSUM 3
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#define STOP_BP 4
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#define STOP_WAIT 5
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#define STOP_END 6
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/* Useful bit extraction macros */
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#define BIT0(x) ((x) & 1)
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#define BIT1(x) (((x) >> 1) & 1)
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#define BIT2(x) (((x) >> 2) & 1)
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#define BIT3(x) (((x) >> 3) & 1)
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#define BIT4(x) (((x) >> 4) & 1)
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#define BIT5(x) (((x) >> 5) & 1)
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#define BIT6(x) (((x) >> 6) & 1)
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#define BIT7(x) (((x) >> 7) & 1)
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#define BIT8(x) (((x) >> 8) & 1)
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#define BIT9(x) (((x) >> 9) & 1)
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#define BIT10(x) (((x) >> 10) & 1)
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#define BIT11(x) (((x) >> 11) & 1)
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#define BIT12(x) (((x) >> 12) & 1)
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#define BIT13(x) (((x) >> 13) & 1)
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#define BIT14(x) (((x) >> 14) & 1)
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#define BIT15(x) (((x) >> 15) & 1)
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#define BIT30(x) (((x) >> 30) & 1)
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#define BIT31(x) (((x) >> 31) & 1)
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#define SEXT8(x) ((x & 0377) > 127 ? (int)(x & 0377) - 256 : (x & 0377))
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