121 lines
3.2 KiB
C
121 lines
3.2 KiB
C
/* stub_cpu.c: Stub CPU simulator
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Copyright (c) 2020, Lars Brinkhoff
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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LARS BRINKHOFF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Lars Brinkhoff shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Lars Brinkhoff.
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*/
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#include "stub_defs.h"
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/* Debug */
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#define DBG_CPU 0001
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/* CPU state. */
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static uint16 PC;
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/* Function declaration. */
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static t_stat cpu_ex (t_value *vptr, t_addr ea, UNIT *uptr, int32 sw);
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static t_stat cpu_dep (t_value val, t_addr ea, UNIT *uptr, int32 sw);
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static t_stat cpu_reset (DEVICE *dptr);
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static UNIT cpu_unit = { UDATA (NULL, UNIT_FIX + UNIT_BINK, 020000) };
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REG cpu_reg[] = {
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{ ORDATAD (PC, PC, 13, "Program Counter") },
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{ NULL }
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};
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static MTAB cpu_mod[] = {
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{ 0 }
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};
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static DEBTAB cpu_deb[] = {
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{ "CPU", DBG_CPU },
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{ NULL, 0 }
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};
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DEVICE cpu_dev = {
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"CPU", &cpu_unit, cpu_reg, cpu_mod,
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0, 8, 16, 1, 8, 16,
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&cpu_ex, &cpu_dep, &cpu_reset,
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NULL, NULL, NULL, NULL, DEV_DEBUG, 0, cpu_deb,
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NULL, NULL, NULL, NULL, NULL, NULL
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};
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t_stat sim_instr (void)
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{
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t_stat reason;
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if ((reason = build_dev_tab ()) != SCPE_OK)
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return reason;
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for (;;) {
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AIO_CHECK_EVENT;
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if (sim_interval <= 0) {
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if ((reason = sim_process_event()) != SCPE_OK)
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return reason;
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}
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if (sim_brk_summ && sim_brk_test(PC, SWMASK('E')))
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return STOP_IBKPT;
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if (sim_step != 0) {
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if (--sim_step == 0)
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return SCPE_STEP;
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}
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}
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return SCPE_OK;
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}
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static t_stat cpu_ex (t_value *vptr, t_addr ea, UNIT *uptr, int32 sw)
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{
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if (vptr == NULL)
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return SCPE_ARG;
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if (ea >= 040000)
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return SCPE_NXM;
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*vptr = M[ea];
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return SCPE_OK;
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}
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static t_stat cpu_dep (t_value val, t_addr ea, UNIT *uptr, int32 sw)
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{
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if (ea >= 040000)
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return SCPE_NXM;
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M[ea] = val & 0177777;
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return SCPE_OK;
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}
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static t_bool pc_is_a_subroutine_call (t_addr **ret_addrs)
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{
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return FALSE;
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}
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static t_stat
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cpu_reset (DEVICE *dptr)
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{
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sim_brk_types = SWMASK('D') | SWMASK('E');
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sim_brk_dflt = SWMASK ('E');
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sim_vm_is_subroutine_call = &pc_is_a_subroutine_call;
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return SCPE_OK;
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}
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