581 lines
24 KiB
C
581 lines
24 KiB
C
/* dc4.c: SWTP DC-4 FDC Simulator
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Copyright (c) 2005-2012, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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23 Apr 15 -- Modified to use simh_debug
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NOTES:
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The DC-4 is a 5-inch floppy controller which can control up
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to 4 daisy-chained 5-inch floppy drives. The controller is based on
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the Western Digital 1797 Floppy Disk Controller (FDC) chip. This
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file only emulates the minimum DC-4 functionality to interface with
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the virtual disk file.
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The floppy controller is interfaced to the CPU by use of 5 memory
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addreses. These are SS-30 slot numbers 5 and 6 (0x8014-0x801B).
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Address Mode Function
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------- ---- --------
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0x8014 Read Returns FDC interrupt status
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0x8014 Write Selects the drive/head/motor control
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0x8018 Read Returns status of FDC
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0x8018 Write FDC command register
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0x8019 Read Returns FDC track register
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0x8019 Write Set FDC track register
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0x801A Read Returns FDC sector register
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0x801A Write Set FDC sector register
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0x801B Read Read data
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0x801B Write Write data
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Drive Select Read (0x8014):
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+---+---+---+---+---+---+---+---+
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| I | D | X | X | X | X | X | X |
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+---+---+---+---+---+---+---+---+
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I = Set indicates an interrupt request from the FDC pending.
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D = DRQ pending - same as bit 1 of FDC status register.
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Drive Select Write (0x8014):
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+---+---+---+---+---+---+---+---+
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| M | S | X | X | X | X | Device|
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+---+---+---+---+---+---+---+---+
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M = If this bit is 1, the one-shot is triggered/retriggered to
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start/keep the motors on.
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S = Side select. If set, side one is selected otherwise side zero
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is selected.
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X = not used
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Device = value 0 thru 3, selects drive 0-3 to be controlled.
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Drive Status Read (0x8018):
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+---+---+---+---+---+---+---+---+
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| R | P | H | S | C | L | D | B |
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+---+---+---+---+---+---+---+---+
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B - When 1, the controller is busy.
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D - When 1, index mark detected (type I) or data request - read data
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ready/write data empty (type II or III).
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H - When 1, track 0 (type I) or lost data (type II or III).
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C - When 1, crc error detected.
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S - When 1, seek (type I) or RNF (type II or III) error.
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H - When 1, head is currently loaded (type I) or record type/
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write fault (type II or III).
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P - When 1, indicates that diskette is write-protected.
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R - When 1, drive is not ready.
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Drive Control Write (0x8018) for type I commands:
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+---+---+---+---+---+---+---+---+
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| 0 | S2| S1| S0| H | V | R1| R0|
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+---+---+---+---+---+---+---+---+
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R0/R1 - Selects the step rate.
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V - When 1, verify on destination track.
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H - When 1, loads head to drive surface.
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S0/S1/S2 = 000 - home.
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001 - seek track in data register.
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010 - step without updating track register.
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011 - step and update track register.
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100 - step in without updating track register.
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101 - step in and update track register.
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110 - step out without updating track register.
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111 - step out and update track register.
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Drive Control Write (0x8018) for type II commands:
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+---+---+---+---+---+---+---+---+
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| 1 | 0 | T | M | S | E | B | A |
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+---+---+---+---+---+---+---+---+
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A - Zero for read, 1 on write deleted data mark else data mark.
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B - When 1, shifts sector length field definitions one place.
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E - When, delay operation 15 ms, 0 no delay.
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S - When 1, select side 1, 0 select side 0.
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M - When 1, multiple records, 0 for single record.
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T - When 1, write command, 0 for read.
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Drive Control Write (0x8018) for type III commands:
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+---+---+---+---+---+---+---+---+
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| 1 | 1 | T0| T1| 0 | E | 0 | 0 |
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+---+---+---+---+---+---+---+---+
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E - When, delay operation 15 ms, 0 no delay.
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T0/T1 - 00 - read address command.
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10 - read track command.
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11 - write track command.
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Tracks are numbered from 0 up to one minus the last track in the 1797!
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Track Register Read (0x8019):
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+---+---+---+---+---+---+---+---+
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| Track Number |
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+---+---+---+---+---+---+---+---+
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Reads the current 8-bit value from the track position.
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Track Register Write (0x8019):
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+---+---+---+---+---+---+---+---+
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| Track Number |
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+---+---+---+---+---+---+---+---+
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Writes the 8-bit value to the track register.
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Sectors are numbers from 1 up to the last sector in the 1797!
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Sector Register Read (0x801A):
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+---+---+---+---+---+---+---+---+
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| Sector Number |
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+---+---+---+---+---+---+---+---+
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Reads the current 8-bit value from the sector position.
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Sector Register Write (0x801A):
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+---+---+---+---+---+---+---+---+
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| Sector Number |
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+---+---+---+---+---+---+---+---+
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Writes the 8-bit value to the sector register.
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Data Register Read (0x801B):
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+---+---+---+---+---+---+---+---+
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| Data |
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+---+---+---+---+---+---+---+---+
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Reads the current 8-bit value from the data register.
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Data Register Write (0x801B):
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+---+---+---+---+---+---+---+---+
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| Data |
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+---+---+---+---+---+---+---+---+
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Writes the 8-bit value to the data register.
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A FLEX disk is defined as follows:
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Track Sector Use
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0 1 Boot sector
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0 2 Boot sector (cont)
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0 3 Unused
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0 4 System Identity Record (explained below)
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0 5 Unused
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0 6-last Directory - 10 entries/sector (explained below)
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1 1 First available data sector
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last-1 last Last available data sector
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System Identity Record
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Byte Use
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0x00 Two bytes of zeroes (Clears forward link)
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0x10 Volume name in ASCII(11 bytes)
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0x1B Volume number in binary (2 bytes)
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0x1D Address of first free data sector (Track-Sector) (2 bytes)
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0x1F Address of last free data sector (Track-Sector) (2 bytes)
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0x21 Total number of data sectors in binary (2 bytes)
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0x23 Current date (Month-Day-Year) in binary
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0x26 Highest track number on disk in binary (byte)
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0x27 Highest sector number on a track in binary (byte)
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The following unit registers are used by this controller emulation:
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dsk_unit[cur_drv].u3 unit current flags
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dsk_unit[cur_drv].u4 unit current track
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dsk_unit[cur_drv].u5 unit current sector
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dsk_unit[cur_drv].pos unit current sector byte index into buffer
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dsk_unit[cur_drv].filebuf unit current sector buffer
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dsk_unit[cur_drv].fileref unit current attached file reference
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*/
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#include <stdio.h>
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#include "swtp_defs.h"
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#define DEBUG 0
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#define UNIT_V_ENABLE (UNIT_V_UF + 0) /* Write Enable */
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#define UNIT_ENABLE (1 << UNIT_V_ENABLE)
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/* emulate a SS FLEX disk with 72 sectors and 80 tracks */
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#define NUM_DISK 4 /* standard 1797 maximum */
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#define SECT_SIZE 256 /* standard FLEX sector */
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#define NUM_SECT 72 /* sectors/track */
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#define TRAK_SIZE (SECT_SIZE * NUM_SECT) /* trk size (bytes) */
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#define HEADS 1 /* handle as SS with twice the sectors */
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#define NUM_CYL 80 /* maximum tracks */
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#define DSK_SIZE (NUM_SECT * HEADS * NUM_CYL * SECT_SIZE) /* dsk size (bytes) */
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/* SIR offsets */
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#define MAXCYL 0x26 /* last cylinder # */
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#define MAXSEC 0x27 /* last sector # */
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/* 1797 status bits */
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#define BUSY 0x01
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#define DRQ 0x02
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#define WRPROT 0x40
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#define NOTRDY 0x80
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/* function prototypes */
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t_stat dsk_reset (DEVICE *dptr);
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/* SS-50 I/O address space functions */
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int32 fdcdrv(int32 io, int32 data);
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int32 fdccmd(int32 io, int32 data);
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int32 fdctrk(int32 io, int32 data);
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int32 fdcsec(int32 io, int32 data);
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int32 fdcdata(int32 io, int32 data);
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/* Local Variables */
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int32 fdcbyte;
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int32 intrq = 0; /* interrupt request flag */
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int32 cur_dsk; /* Currently selected drive */
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int32 wrt_flag = 0; /* FDC write flag */
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int32 spt; /* sectors/track */
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int32 trksiz; /* trk size (bytes) */
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int32 heds; /* number of heads */
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int32 cpd; /* cylinders/disk */
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int32 dsksiz; /* dsk size (bytes) */
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/* Floppy Disk Controller data structures
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dsk_dev Mother Board device descriptor
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dsk_unit Mother Board unit descriptor
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dsk_reg Mother Board register list
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dsk_mod Mother Board modifiers list
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*/
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UNIT dsk_unit[] = {
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{ UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0) },
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{ UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0) },
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{ UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0) },
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{ UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0) }
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};
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REG dsk_reg[] = {
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{ HRDATA (DISK, cur_dsk, 4) },
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{ NULL }
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};
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MTAB dsk_mod[] = {
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{ UNIT_ENABLE, UNIT_ENABLE, "RW", "RW", NULL },
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{ UNIT_ENABLE, 0, "RO", "RO", NULL },
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{ 0 }
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};
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DEBTAB dsk_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE dsk_dev = {
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"DC-4", //name
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dsk_unit, //units
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dsk_reg, //registers
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dsk_mod, //modifiers
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NUM_DISK, //numunits
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16, //aradix
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16, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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&dsk_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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dsk_debug, /* debflags */
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NULL, //msize
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NULL //lname
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};
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/* Reset routine */
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t_stat dsk_reset (DEVICE *dptr)
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{
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int i;
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cur_dsk = 5; /* force initial SIR read */
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for (i=0; i<NUM_DISK; i++) {
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dsk_unit[i].u3 = 0; /* clear current flags */
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dsk_unit[i].u4 = 0; /* clear current cylinder # */
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dsk_unit[i].u5 = 0; /* clear current sector # */
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dsk_unit[i].pos = 0; /* clear current byte ptr */
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if (dsk_unit[i].filebuf == NULL) {
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dsk_unit[i].filebuf = malloc(256); /* allocate buffer */
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if (dsk_unit[i].filebuf == NULL) {
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printf("dc-4_reset: Malloc error\n");
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return SCPE_MEM;
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}
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}
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}
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spt = 0;
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trksiz = 0;
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heds = 0;
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cpd = 0;
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dsksiz = 0;
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return SCPE_OK;
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}
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/* I/O instruction handlers, called from the MP-B2 module when a
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read or write occur to addresses 0x8004-0x8007. */
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/* DC-4 drive select register routine - this register is not part of the 1797
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*/
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int32 fdcdrv(int32 io, int32 data)
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{
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static long pos;
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static int32 err;
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if (io) { /* write to DC-4 drive register */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: Drive selected %d cur_dsk=%d",
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data & 0x03, cur_dsk);
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if (cur_dsk == (data & 0x03))
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return 0; /* already selected */
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cur_dsk = data & 0x03; /* only 2 drive select bits */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: Drive set to %d", cur_dsk);
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if ((dsk_unit[cur_dsk].flags & UNIT_ENABLE) == 0) {
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dsk_unit[cur_dsk].u3 |= WRPROT; /* set 1797 WPROT */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: Drive write protected");
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} else {
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dsk_unit[cur_dsk].u3 &= ~WRPROT; /* set 1797 not WPROT */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: Drive NOT write protected");
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}
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pos = 0x200; /* Read in SIR */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: Read pos = %ld ($%04X)",
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pos, (unsigned int) pos);
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err = sim_fseek(dsk_unit[cur_dsk].fileref, pos, SEEK_SET); /* seek to offset */
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if (err) {
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sim_printf("\nfdccmd: Seek error read in SIR\n");
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return SCPE_IOERR;
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}
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err = sim_fread(dsk_unit[cur_dsk].filebuf, SECT_SIZE, 1, dsk_unit[cur_dsk].fileref); /* read in buffer */
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if (err != 1) {
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sim_printf("\nfdccmd: File error read in SIR\n");
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return SCPE_IOERR;
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}
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dsk_unit[cur_dsk].u3 |= BUSY | DRQ; /* set DRQ & BUSY */
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dsk_unit[cur_dsk].pos = 0; /* clear counter */
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spt = *((uint8 *)(dsk_unit[cur_dsk].filebuf) + MAXSEC) & 0xFF;
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heds = 0;
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cpd = *((uint8 *)(dsk_unit[cur_dsk].filebuf) + MAXCYL) & 0xFF;
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trksiz = spt * SECT_SIZE;
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dsksiz = trksiz * cpd;
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: spt=%d heds=%d cpd=%d trksiz=%d dsksiz=%d flags=%08X u3=%08X",
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spt, heds, cpd, trksiz, dsksiz, dsk_unit[cur_dsk].flags, dsk_unit[cur_dsk].u3);
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return 0;
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} else { /* read from DC-4 drive register */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdrv: Drive read as %02X", intrq);
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return intrq;
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}
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}
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/* WD 1797 FDC command register routine */
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int32 fdccmd(int32 io, int32 data)
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{
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static int32 val = 0, val1 = NOTRDY;
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static long pos;
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static int32 err;
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if ((dsk_unit[cur_dsk].flags & UNIT_ATT) == 0) { /* not attached */
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dsk_unit[cur_dsk].u3 |= NOTRDY; /* set not ready flag */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Drive %d is not attached", cur_dsk);
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return 0;
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} else {
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dsk_unit[cur_dsk].u3 &= ~NOTRDY; /* clear not ready flag */
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}
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if (io) { /* write command to fdc */
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switch(data) {
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case 0x8C: /* read command */
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case 0x9C:
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Read of disk %d, track %d, sector %d",
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cur_dsk, dsk_unit[cur_dsk].u4, dsk_unit[cur_dsk].u5);
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pos = trksiz * dsk_unit[cur_dsk].u4; /* calculate file offset */
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pos += SECT_SIZE * (dsk_unit[cur_dsk].u5 - 1);
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Read pos = %ld ($%08X)",
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pos, (unsigned int) pos);
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err = sim_fseek(dsk_unit[cur_dsk].fileref, pos, SEEK_SET); /* seek to offset */
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if (err) {
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sim_printf("\nfdccmd: Seek error in read command\n");
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return SCPE_IOERR;
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}
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err = sim_fread(dsk_unit[cur_dsk].filebuf, SECT_SIZE, 1, dsk_unit[cur_dsk].fileref); /* read in buffer */
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if (err != 1) {
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sim_printf("\nfdccmd: File error in read command\n");
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return SCPE_IOERR;
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}
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dsk_unit[cur_dsk].u3 |= BUSY | DRQ; /* set DRQ & BUSY */
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dsk_unit[cur_dsk].pos = 0; /* clear counter */
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break;
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case 0xAC: /* write command */
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sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Write of disk %d, track %d, sector %d",
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cur_dsk, dsk_unit[cur_dsk].u4, dsk_unit[cur_dsk].u5);
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if (dsk_unit[cur_dsk].u3 & WRPROT) {
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printf("\nfdccmd: Drive %d is write-protected", cur_dsk);
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} else {
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pos = trksiz * dsk_unit[cur_dsk].u4; /* calculate file offset */
|
|
pos += SECT_SIZE * (dsk_unit[cur_dsk].u5 - 1);
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Write pos = %ld ($%08X)",
|
|
pos, (unsigned int) pos);
|
|
err = sim_fseek(dsk_unit[cur_dsk].fileref, pos, SEEK_SET); /* seek to offset */
|
|
if (err) {
|
|
sim_printf("\nfdccmd: Seek error in write command\n");
|
|
return SCPE_IOERR;
|
|
}
|
|
wrt_flag = 1; /* set write flag */
|
|
dsk_unit[cur_dsk].u3 |= BUSY | DRQ;/* set DRQ & BUSY */
|
|
dsk_unit[cur_dsk].pos = 0; /* clear counter */
|
|
}
|
|
break;
|
|
case 0x18: /* seek command */
|
|
case 0x1B:
|
|
dsk_unit[cur_dsk].u4 = fdcbyte; /* set track */
|
|
dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ); /* clear flags */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Seek of disk %d, track %d",
|
|
cur_dsk, fdcbyte);
|
|
break;
|
|
case 0x0B: /* restore command */
|
|
dsk_unit[cur_dsk].u4 = 0; /* home the drive */
|
|
dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ); /* clear flags */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Drive %d homed", cur_dsk);
|
|
break;
|
|
case 0xF0: /* write track command */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Write track command for drive %d",
|
|
cur_dsk);
|
|
break;
|
|
default:
|
|
printf("Unknown FDC command %02XH\n\r", data);
|
|
}
|
|
} else { /* read status from fdc */
|
|
val = dsk_unit[cur_dsk].u3; /* set return value */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Exit Drive %d status=%02X",
|
|
cur_dsk, val);
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\n%02X", val); //even this short fails it!
|
|
if (val1 == 0 && ((val & (BUSY + DRQ)) == (BUSY + DRQ))) /* delay BUSY going high */
|
|
val &= ~BUSY;
|
|
if (val != val1) /* now allow BUSY after one read */
|
|
val1 = val;
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdccmd: Exit Drive %d status=%02X",
|
|
cur_dsk, val);
|
|
}
|
|
return val;
|
|
}
|
|
|
|
/* WD 1797 FDC track register routine */
|
|
|
|
int32 fdctrk(int32 io, int32 data)
|
|
{
|
|
if (io) {
|
|
dsk_unit[cur_dsk].u4 = data & 0xFF;
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdctrk: Drive %d track set to %d",
|
|
cur_dsk, dsk_unit[cur_dsk].u4);
|
|
}
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdctrk: Drive %d track read as %d",
|
|
cur_dsk, dsk_unit[cur_dsk].u4);
|
|
return dsk_unit[cur_dsk].u4;
|
|
}
|
|
|
|
/* WD 1797 FDC sector register routine */
|
|
|
|
int32 fdcsec(int32 io, int32 data)
|
|
{
|
|
if (io) {
|
|
dsk_unit[cur_dsk].u5 = data & 0xFF;
|
|
if (dsk_unit[cur_dsk].u5 == 0) /* fix for swtp boot! */
|
|
dsk_unit[cur_dsk].u5 = 1;
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdcsec: Drive %d sector set to %d",
|
|
cur_dsk, dsk_unit[cur_dsk].u5);
|
|
}
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdcsec: Drive %d sector read as %d",
|
|
cur_dsk, dsk_unit[cur_dsk].u5);
|
|
return dsk_unit[cur_dsk].u5;
|
|
}
|
|
|
|
/* WD 1797 FDC data register routine */
|
|
|
|
int32 fdcdata(int32 io, int32 data)
|
|
{
|
|
int32 val;
|
|
|
|
if (io) { /* write byte to fdc */
|
|
fdcbyte = data; /* save for seek */
|
|
if (dsk_unit[cur_dsk].pos < SECT_SIZE) { /* copy bytes to buffer */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdata: Writing byte %d of %02X",
|
|
dsk_unit[cur_dsk].pos, data);
|
|
*((uint8 *)(dsk_unit[cur_dsk].filebuf) + dsk_unit[cur_dsk].pos) = data; /* byte into buffer */
|
|
dsk_unit[cur_dsk].pos++; /* step counter */
|
|
if (dsk_unit[cur_dsk].pos == SECT_SIZE) {
|
|
dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ);
|
|
if (wrt_flag) { /* if initiated by FDC write command */
|
|
sim_fwrite(dsk_unit[cur_dsk].filebuf, SECT_SIZE, 1, dsk_unit[cur_dsk].fileref); /* write it */
|
|
wrt_flag = 0; /* clear write flag */
|
|
}
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdata: Sector write complete");
|
|
}
|
|
}
|
|
return 0;
|
|
} else { /* read byte from fdc */
|
|
if (dsk_unit[cur_dsk].pos < SECT_SIZE) { /* copy bytes from buffer */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdata: Reading byte %d u3=%02X",
|
|
dsk_unit[cur_dsk].pos, dsk_unit[cur_dsk].u3);
|
|
val = *((uint8 *)(dsk_unit[cur_dsk].filebuf) + dsk_unit[cur_dsk].pos) & 0xFF;
|
|
dsk_unit[cur_dsk].pos++; /* step counter */
|
|
if (dsk_unit[cur_dsk].pos == SECT_SIZE) { /* done? */
|
|
dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ); /* clear flags */
|
|
sim_debug (DEBUG_flow, &dsk_dev, "\nfdcdata: Sector read complete");
|
|
}
|
|
return val;
|
|
} else
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/* end of dc-4.c */
|