df6475181c
1. New Features 1.1 GRI-909 - This is a new simulator for the GRI-909. - It has been hand-tested; so far, no software has been discovered. 1.2 VAX - SET CPU CONHALT will cause a HALT instruction to return to the boot ROM console rather than to SIMH. SET CPU SIMHALT restores the default behavior. - BRB/W self at IPL 1F stops the simulator. This is the default behavior of VMS at exit. 1.3 PDP-18b - ATTACH -A PTR/PTP attaches the reader and punch in ASCII mode. In ASCII mode, the reader automatically sets the high order bit of incoming alphabetic data, and the punch clears the high order bit of outgoing data. 1.4 SCP - DO -V echoes commands from the file as they are executed. - Under Windows, execution priority is set BELOW_NORMAL when the simulator is running. 2. Release Notes 2.1 Bugs Fixed - PDP-11 CPU: fixed updating of MMR0 on a memory management error. - VAX FPA: changed function names to avoid conflict with C math library. - 1401 MT: read end of record generates group mark without word mark. - 1401 DP: fixed address generation and checking. - SCP: an EXIT within a DO command will cause the simulator to exit. 3. In Progress - Interdata 16b/32b: coded, not tested. - SDS 940: coded, not tested. - IBM 1620: coded, not tested. If you would like to help with the debugging of the untested simulators, they can be made available by special request.
578 lines
19 KiB
C
578 lines
19 KiB
C
/* gri_sys.c: GRI-909 simulator interface
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Copyright (c) 2001-2002, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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*/
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#include "gri_defs.h"
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#include <ctype.h>
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extern DEVICE cpu_dev;
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extern UNIT cpu_unit;
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extern DEVICE tti_dev, tto_dev;
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extern DEVICE hsr_dev, hsp_dev;
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extern DEVICE rtc_dev;
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extern REG cpu_reg[];
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extern uint16 M[];
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extern int32 sim_switches;
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/* SCP data structures and interface routines
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sim_name simulator name string
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sim_PC pointer to saved PC register descriptor
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sim_emax maximum number of words for examine/deposit
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sim_devices array of pointers to simulated devices
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sim_stop_messages array of pointers to stop messages
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sim_load binary loader
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*/
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char sim_name[] = "GRI-909";
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REG *sim_PC = &cpu_reg[0];
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int32 sim_emax = 2;
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DEVICE *sim_devices[] = {
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&cpu_dev,
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&tti_dev,
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&tto_dev,
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&hsr_dev,
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&hsp_dev,
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&rtc_dev,
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NULL };
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const char *sim_stop_messages[] = {
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"Unknown error",
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"Unimplemented unit",
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"HALT instruction",
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"Breakpoint",
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"Invalid interrupt request" };
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/* Binary loader
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Bootstrap loader format consists of blocks separated by zeroes. Each
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word in the block has three frames: a control frame (ignored) and two
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data frames. The user must specify the load address. Switch -c means
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continue and load all blocks until end of tape.
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*/
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t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
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{
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int32 c, org;
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t_stat r;
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char gbuf[CBUFSIZE];
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if (*cptr != 0) { /* more input? */
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cptr = get_glyph (cptr, gbuf, 0); /* get origin */
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org = get_uint (gbuf, 8, AMASK, &r);
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if (r != SCPE_OK) return r;
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if (*cptr != 0) return SCPE_ARG; } /* no more */
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else org = 0200; /* default 200 */
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for (;;) { /* until EOF */
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while ((c = getc (fileref)) == 0) ; /* skip starting 0's */
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if (c == EOF) break; /* EOF? done */
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for ( ; c != 0; ) { /* loop until ctl = 0 */
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/* ign ctrl frame */
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if ((c = getc (fileref)) == EOF) /* get high byte */
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return SCPE_FMT; /* EOF is error */
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if (!MEM_ADDR_OK (org)) return SCPE_NXM;
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M[org] = ((c & 0377) << 8); /* store high */
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if ((c = getc (fileref)) == EOF) /* get low byte */
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return SCPE_FMT; /* EOF is error */
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M[org] = M[org] | (c & 0377); /* store low */
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org = org + 1; /* incr origin */
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if ((c = getc (fileref)) == EOF) /* get ctrl frame */
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return SCPE_OK; /* EOF is ok */
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} /* end block for */
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if (!(sim_switches & SWMASK ('C'))) return SCPE_OK;
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} /* end tape for */
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return SCPE_OK;
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}
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/* Symbol tables */
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#define F_V_FL 16
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#define F_M_FL 017
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#define F_V_FO 000 /* function out */
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#define F_V_FOI 001 /* FO, impl reg */
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#define F_V_SF 002 /* skip function */
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#define F_V_SFI 003 /* SF, impl reg */
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#define F_V_RR 004 /* reg reg */
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#define F_V_ZR 005 /* zero reg */
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#define F_V_RS 006 /* reg self */
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#define F_V_JC 010 /* jump cond */
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#define F_V_JU 011 /* jump uncond */
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#define F_V_RM 012 /* reg mem */
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#define F_V_ZM 013 /* zero mem */
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#define F_V_MR 014 /* mem reg */
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#define F_V_MS 015 /* mem self */
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#define F_2WD 010 /* 2 words */
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#define F_FO (F_V_FO << F_V_FL)
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#define F_FOI (F_V_FOI << F_V_FL)
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#define F_SF (F_V_SF << F_V_FL)
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#define F_SFI (F_V_SFI << F_V_FL)
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#define F_RR (F_V_RR << F_V_FL)
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#define F_ZR (F_V_ZR << F_V_FL)
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#define F_RS (F_V_RS << F_V_FL)
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#define F_JC (F_V_JC << F_V_FL)
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#define F_JU (F_V_JU << F_V_FL)
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#define F_RM (F_V_RM << F_V_FL)
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#define F_ZM (F_V_ZM << F_V_FL)
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#define F_MR (F_V_MR << F_V_FL)
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#define F_MS (F_V_MS << F_V_FL)
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struct fnc_op {
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uint32 inst; /* instr prot */
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uint32 imask; /* instr mask */
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uint32 oper; /* operator */
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uint32 omask; }; /* oper mask */
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static const int32 masks[] = {
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0176000, 0176077, 0000077, 0176077,
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0000300, 0176300, 0000300, 0177777,
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0000077, 0177777, 0000377, 0176377,
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0176300, 0176377 };
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/* Instruction mnemonics
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Order is critical, as some instructions are more precise versions of
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others. For example, JU must precede JC, otherwise, JU will be decoded
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as JC 0,ETZ,dst. There are some ambiguities, eg, what is 02-xxxx-06?
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Priority is as follows:
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FO (02-xxxx-rr)
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SF (rr-xxxx-02)
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MR (06-xxxx-rr)
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RM (rr-xxxx-06)
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JC (rr-xxxx-03)
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RR
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*/
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static const char *opcode[] = {
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"FOM", "FOA", "FOI", "FO", /* FOx before FO */
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"SFM", "SFA", "SFI", "SF", /* SFx before SF */
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"ZM", "ZMD", "ZMI", "ZMID", /* ZM before RM */
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"MS", "MSD", "MSI", "MSID",
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"RM", "RMD", "RMI", "RMID",
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"MR", "MRD", "MRI", "MRID",
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"JO", "JOD", "JN", "JND", /* JU before JC */
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"JU", "JUD", "JC", "JCD",
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"ZR", "ZRC", "RR", "RRC", /* ZR before RR */
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"RS", "RSC",
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NULL };
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static const uint32 opc_val[] = {
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0004000+F_FOI, 0004013+F_FOI, 0004004+F_FOI, 0004000+F_FO,
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0000002+F_SFI, 0026002+F_SFI, 0010002+F_SFI, 0000002+F_SF,
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0000006+F_ZM, 0000106+F_ZM, 0000206+F_ZM, 0000306+F_ZM,
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0014006+F_MS, 0014106+F_MS, 0014206+F_MS, 0014306+F_MS,
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0000006+F_RM, 0000106+F_RM, 0000206+F_RM, 0000306+F_RM,
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0014000+F_MR, 0014100+F_MR, 0014200+F_MR, 0014300+F_MR,
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0037003+F_JU, 0037103+F_JU, 0037203+F_JU, 0037303+F_JU,
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0000403+F_JU, 0000503+F_JU, 0000003+F_JC, 0000103+F_JC,
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0000000+F_ZR, 0000200+F_ZR, 0000000+F_RR, 0000200+F_RR,
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0000000+F_RS, 0000200+F_RS };
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/* Unit mnemonics. All 64 units are decoded, most just to octal integers */
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static const char *unsrc[64] = {
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"0", "IR", "2", "TRP", "ISR", "MA", "MB", "SC", /* 00 - 07 */
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"SWR", "AX", "AY", "AO", "14", "15", "16", "MSR", /* 10 - 17 */
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"20", "21", "22", "23", "BSW", "BPK", "26", "27", /* 20 - 27 */
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"GR1", "GR2", "GR3", "GR4", "GR5", "GR6", "36", "37", /* 30 - 37 */
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"40", "41", "42", "43", "44", "45", "46", "47",
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"50", "51", "52", "53", "54", "55", "56", "57",
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"60", "61", "62", "63", "64", "65", "66", "67",
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"70", "71", "72", "73", "74", "RTC", "HSR", "TTI" }; /* 70 - 77 */
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static const char *undst[64] = {
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"0", "IR", "2", "TRP", "ISR", "5", "MB", "SC", /* 00 - 07 */
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"SWR", "AX", "AY", "13", "EAO", "15", "16", "MSR", /* 10 - 17 */
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"20", "21", "22", "23", "BSW", "BPK", "26", "27", /* 20 - 27 */
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"GR1", "GR2", "GR3", "GR4", "GR5", "GR6", "36", "37", /* 30 - 37 */
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"40", "41", "42", "43", "44", "45", "46", "47",
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"50", "51", "52", "53", "54", "55", "56", "57",
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"60", "61", "62", "63", "64", "65", "66", "67",
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"70", "71", "72", "73", "74", "RTC", "HSP", "TTO" }; /* 70 - 77 */
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/* Operators */
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static const char *opname[4] = {
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NULL, "P1", "L1", "R1" };
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/* Conditions */
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static const char *cdname[8] = {
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"NEVER", "ALWAYS", "ETZ", "NEZ", "LTZ", "GEZ", "LEZ", "GTZ" };
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/* Function out/sense function */
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static const char *fname[] = {
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"NOT", /* any SF */
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"POK", "LNK", "BOV", /* SFM */
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"SOV", "AOV", /* SFA */
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"IRDY", "ORDY", /* any SF */
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"CLL", "STL", "CML", "HLT", /* FOM */
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"ICF", "ICO", /* FOI */
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"ADD", "AND", "XOR", "OR", /* FOA */
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"INP", "IRDY", "ORDY", "STRT", /* any FO */
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NULL };
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static const struct fnc_op fop[] = {
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{ 0000002, 0000077, 001, 001 }, /* NOT */
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{ 0000002, 0176077, 010, 010 }, /* POK */
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{ 0000002, 0176077, 004, 004 }, /* LNK */
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{ 0000002, 0176077, 002, 002 }, /* BOV */
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{ 0026002, 0176077, 004, 004 }, /* SOV */
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{ 0026002, 0176077, 002, 002 }, /* AOV */
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{ 0000002, 0000077, 010, 010 }, /* IRDY */
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{ 0000002, 0000077, 002, 002 }, /* ORDY */
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{ 0004000, 0176077, 001, 003 }, /* CLL */
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{ 0004000, 0176077, 002, 003 }, /* STL */
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{ 0004000, 0176077, 003, 003 }, /* CML */
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{ 0004000, 0176077, 004, 004 }, /* HLT */
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{ 0004004, 0176077, 001, 001 }, /* ICF */
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{ 0004004, 0176077, 002, 002 }, /* ICO */
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{ 0004013, 0176077, 000, 014 }, /* ADD */
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{ 0004013, 0176077, 004, 014 }, /* AND */
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{ 0004013, 0176077, 010, 014 }, /* XOR */
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{ 0004013, 0176077, 014, 014 }, /* OR */
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{ 0004000, 0176000, 011, 011 }, /* INP */
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{ 0004000, 0176000, 010, 010 }, /* IRDY */
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{ 0004000, 0176000, 002, 002 }, /* ORDY */
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{ 0004000, 0176000, 001, 001 } }; /* STRT */
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/* Print opcode field for FO, SF */
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void fprint_op (FILE *of, uint32 inst, uint32 op)
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{
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int32 i, nfirst;
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for (i = nfirst = 0; fname[i] != NULL; i++) {
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if (((inst & fop[i].imask) == fop[i].inst) &&
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((op & fop[i].omask) == fop[i].oper)) {
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op = op & ~fop[i].omask;
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if (nfirst) fputc (' ', of);
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nfirst = 1;
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fprintf (of, "%s", fname[i]); }
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}
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if (op) fprintf (of, " %o", op);
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return;
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}
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/* Symbolic decode
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Inputs:
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*of = output stream
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addr = current PC
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*val = pointer to data
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*uptr = pointer to unit
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sw = switches
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Outputs:
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return = status code
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*/
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#define FMTASC(x) ((x) < 040)? "<%03o>": "%c", (x)
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t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
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UNIT *uptr, int32 sw)
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{
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int32 i, j;
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uint32 inst, src, dst, op, bop;
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inst = val[0];
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if (sw & SWMASK ('A')) { /* ASCII? */
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if (inst > 0377) return SCPE_ARG;
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fprintf (of, FMTASC (inst & 0177));
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return SCPE_OK; }
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if (sw & SWMASK ('C')) { /* characters? */
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fprintf (of, FMTASC ((inst >> 8) & 0177));
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fprintf (of, FMTASC (inst & 0177));
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return SCPE_OK; }
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if (!(sw & SWMASK ('M'))) return SCPE_ARG;
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/* Instruction decode */
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inst = val[0];
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src = I_GETSRC (inst); /* get fields */
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op = I_GETOP (inst);
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dst = I_GETDST (inst);
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bop = op >> 2; /* bus op */
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for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
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j = (opc_val[i] >> F_V_FL) & F_M_FL; /* get class */
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if ((opc_val[i] & DMASK) == (inst & masks[j])) { /* match? */
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switch (j) { /* case on class */
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case F_V_FO: /* func out */
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fprintf (of, "%s ", opcode[i]);
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fprint_op (of, inst, op);
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fprintf (of, ",%s", undst[dst]);
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break;
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case F_V_FOI: /* func out impl */
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fprintf (of, "%s ", opcode[i]);
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fprint_op (of, inst, op);
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break;
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case F_V_SF: /* skip func */
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fprintf (of, "%s %s,", opcode[i], unsrc[src]);
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fprint_op (of, inst, op);
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break;
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case F_V_SFI: /* skip func impl */
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fprintf (of, "%s ", opcode[i]);
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fprint_op (of, inst, op);
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break;
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case F_V_RR: /* reg reg */
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if (strcmp (unsrc[src], undst[dst]) == 0) {
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if (bop) fprintf (of, "%s %s,%s", opcode[i + 2],
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unsrc[src], opname[bop]);
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else fprintf (of, "%s %s", opcode[i + 2], unsrc[src]); }
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else { if (bop) fprintf (of, "%s %s,%s,%s", opcode[i],
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unsrc[src], opname[bop], undst[dst]);
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else fprintf (of, "%s %s,%s", opcode[i],
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unsrc[src], undst[dst]); }
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break;
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case F_V_ZR: /* zero reg */
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if (bop) fprintf (of, "%s %s,%s", opcode[i],
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opname[bop], undst[dst]);
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else fprintf (of, "%s %s", opcode[i], undst[dst]);
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break;
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case F_V_JC: /* jump cond */
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fprintf (of, "%s %s,%s,%o", opcode[i],
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unsrc[src], cdname[op >> 1], val[1]);
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break;
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case F_V_JU: /* jump uncond */
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fprintf (of, "%s %o", opcode[i], val[1]);
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break;
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case F_V_RM: /* reg mem */
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if (bop) fprintf (of, "%s %s,%s,%o", opcode[i],
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unsrc[src], opname[bop], val[1]);
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else fprintf (of, "%s %s,%o", opcode[i], unsrc[src], val[1]);
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break;
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case F_V_ZM: /* zero mem */
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if (bop) fprintf (of, "%s %s,%o", opcode[i],
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opname[bop], val[1]);
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else fprintf (of, "%s %o", opcode[i], val[1]);
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break;
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case F_V_MR: /* mem reg */
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if (bop) fprintf (of, "%s %o,%s,%s", opcode[i],
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val[1], opname[bop], undst[dst]);
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else fprintf (of, "%s %o,%s", opcode[i], val[1], undst[dst]);
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break;
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case F_V_MS: /* mem self */
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if (bop) fprintf (of, "%s %o,%s", opcode[i],
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val[1], opname[bop]);
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else fprintf (of, "%s %o", opcode[i], val[1]);
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break; } /* end case */
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return (j >= F_2WD)? -1: SCPE_OK; } /* end if */
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} /* end for */
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return SCPE_ARG;
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}
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/* Field parse routines
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get_fnc get function field
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get_ma get memory address
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get_sd get source or dest
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get_op get optional bus operator
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*/
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char *get_fnc (char *cptr, t_value *val)
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{
|
||
char gbuf[CBUFSIZE];
|
||
int32 i;
|
||
t_value d;
|
||
t_stat r;
|
||
uint32 inst = val[0];
|
||
uint32 fncv = 0, fncm = 0;
|
||
|
||
while (*cptr) {
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
|
||
d = get_uint (gbuf, 8, 017, &r); /* octal? */
|
||
if (r == SCPE_OK) { /* ok? */
|
||
if (d & fncm) return NULL; /* already filled? */
|
||
fncv = fncv | d; /* save */
|
||
fncm = fncm | d; } /* field filled */
|
||
else { /* symbol? */
|
||
for (i = 0; fname[i] != NULL; i++) { /* search table */
|
||
if ((strcmp (gbuf, fname[i]) == 0) && /* match for inst? */
|
||
((inst & fop[i].imask) == fop[i].inst)) {
|
||
if (fop[i].oper & fncm) return NULL; /* already filled? */
|
||
fncm = fncm | fop[i].omask;
|
||
fncv = fncv | fop[i].oper;
|
||
break; } }
|
||
if (fname[i] == NULL) return NULL; } /* end else */
|
||
} /* end while */
|
||
val[0] = val[0] | (fncv << I_V_OP); /* store fnc */
|
||
return cptr;
|
||
}
|
||
|
||
char *get_ma (char *cptr, t_value *val, char term)
|
||
{
|
||
char gbuf[CBUFSIZE];
|
||
t_value d;
|
||
t_stat r;
|
||
|
||
cptr = get_glyph (cptr, gbuf, term); /* get glyph */
|
||
d = get_uint (gbuf, 8, DMASK, &r); /* [0,177777] */
|
||
if (r != SCPE_OK) return NULL;
|
||
val[1] = d; /* second wd */
|
||
return cptr;
|
||
}
|
||
|
||
char *get_sd (char *cptr, t_value *val, char term, t_bool src)
|
||
{
|
||
char gbuf[CBUFSIZE];
|
||
int32 d;
|
||
t_stat r;
|
||
|
||
cptr = get_glyph (cptr, gbuf, term); /* get glyph */
|
||
for (d = 0; d < 64; d++) { /* symbol match? */
|
||
if ((strcmp (gbuf, unsrc[d]) == 0) ||
|
||
(strcmp (gbuf, undst[d]) == 0)) break; }
|
||
if (d >= 64) { /* no, [0,63]? */
|
||
d = get_uint (gbuf, 8, 077, &r);
|
||
if (r != SCPE_OK) return NULL; }
|
||
val[0] = val[0] | (d << (src? I_V_SRC: I_V_DST)); /* or to inst */
|
||
return cptr;
|
||
}
|
||
|
||
char *get_op (char *cptr, t_value *val, char term)
|
||
{
|
||
char gbuf[CBUFSIZE], *tptr;
|
||
int32 i;
|
||
|
||
tptr = get_glyph (cptr, gbuf, term); /* get glyph */
|
||
for (i = 1; i < 4; i++) { /* symbol match? */
|
||
if (strcmp (gbuf, opname[i]) == 0) {
|
||
val[0] = val[0] | (i << (I_V_OP + 2)); /* or to inst */
|
||
return tptr; } }
|
||
return cptr; /* original ptr */
|
||
}
|
||
|
||
/* Symbolic input
|
||
|
||
Inputs:
|
||
*cptr = pointer to input string
|
||
addr = current PC
|
||
*uptr = pointer to unit
|
||
*val = pointer to output values
|
||
sw = switches
|
||
Outputs:
|
||
status = error status
|
||
*/
|
||
|
||
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
|
||
{
|
||
int32 i, j, k;
|
||
char *tptr, gbuf[CBUFSIZE];
|
||
|
||
while (isspace (*cptr)) cptr++; /* absorb spaces */
|
||
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
|
||
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
|
||
val[0] = (t_value) cptr[0] & 0177;
|
||
return SCPE_OK; }
|
||
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* char string? */
|
||
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
|
||
val[0] = (((t_value) cptr[0] & 0177) << 8) |
|
||
((t_value) cptr[1] & 0177);
|
||
return SCPE_OK; }
|
||
|
||
/* Instruction parse */
|
||
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
|
||
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
|
||
if (opcode[i] == NULL) return SCPE_ARG;
|
||
val[0] = opc_val[i] & DMASK; /* get value */
|
||
j = (opc_val[i] >> F_V_FL) & F_M_FL; /* get class */
|
||
|
||
switch (j) { /* case on class */
|
||
case F_V_FO: /* func out */
|
||
tptr = strchr (cptr, ','); /* find dst */
|
||
if (!tptr) return SCPE_ARG; /* none? */
|
||
*tptr = 0; /* split fields */
|
||
cptr = get_fnc (cptr, val); /* fo # */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_sd (tptr + 1, val, 0, FALSE); /* dst */
|
||
break;
|
||
case F_V_FOI: /* func out impl */
|
||
cptr = get_fnc (cptr, val); /* fo # */
|
||
break;
|
||
case F_V_SF: /* skip func */
|
||
cptr = get_sd (cptr, val, ',', TRUE); /* src */
|
||
if (!cptr) return SCPE_ARG;
|
||
case F_V_SFI: /* skip func impl */
|
||
cptr = get_fnc (cptr, val); /* fo # */
|
||
break;
|
||
case F_V_RR: /* reg-reg */
|
||
cptr = get_sd (cptr, val, ',', TRUE); /* src */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_op (cptr, val, ','); /* op */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_sd (cptr, val, 0, FALSE); /* dst */
|
||
break;
|
||
case F_V_ZR: /* zero-reg */
|
||
cptr = get_op (cptr, val, ','); /* op */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_sd (cptr, val, 0, FALSE); /* dst */
|
||
break;
|
||
case F_V_RS: /* reg self */
|
||
cptr = get_sd (cptr, val, ',', TRUE); /* src */
|
||
if (!cptr) return SCPE_ARG;
|
||
val[0] = val[0] | I_GETSRC (val[0]); /* duplicate */
|
||
cptr = get_op (cptr, val, 0); /* op */
|
||
break;
|
||
case F_V_JC: /* jump cond */
|
||
cptr = get_sd (cptr, val, ',', TRUE); /* src */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_glyph (cptr, gbuf, ','); /* cond */
|
||
for (k = 0; k < 8; k++) { /* symbol? */
|
||
if (strcmp (gbuf, cdname[k]) == 0) break; }
|
||
if (k >= 8) return SCPE_ARG;
|
||
val[0] = val[0] | (k << (I_V_OP + 1)); /* or to inst */
|
||
case F_V_JU: /* jump uncond */
|
||
cptr = get_ma (cptr, val, 0); /* addr */
|
||
break;
|
||
case F_V_RM: /* reg mem */
|
||
cptr = get_sd (cptr, val, ',', TRUE); /* src */
|
||
if (!cptr) return SCPE_ARG;
|
||
case F_V_ZM: /* zero mem */
|
||
cptr = get_op (cptr, val, ','); /* op */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_ma (cptr, val, 0); /* addr */
|
||
break;
|
||
case F_V_MR: /* mem reg */
|
||
cptr = get_ma (cptr, val, ','); /* addr */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_op (cptr, val, ','); /* op */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_sd (cptr, val, 0, FALSE); /* dst */
|
||
break;
|
||
case F_V_MS: /* mem self */
|
||
cptr = get_ma (cptr, val, ','); /* addr */
|
||
if (!cptr) return SCPE_ARG;
|
||
cptr = get_op (cptr, val, 0); /* op */
|
||
break; }
|
||
if (!cptr || (*cptr != 0)) return SCPE_ARG; /* junk at end? */
|
||
return (j >= F_2WD)? -1: SCPE_OK;
|
||
}
|