1. New Features 1.1 GRI-909 - This is a new simulator for the GRI-909. - It has been hand-tested; so far, no software has been discovered. 1.2 VAX - SET CPU CONHALT will cause a HALT instruction to return to the boot ROM console rather than to SIMH. SET CPU SIMHALT restores the default behavior. - BRB/W self at IPL 1F stops the simulator. This is the default behavior of VMS at exit. 1.3 PDP-18b - ATTACH -A PTR/PTP attaches the reader and punch in ASCII mode. In ASCII mode, the reader automatically sets the high order bit of incoming alphabetic data, and the punch clears the high order bit of outgoing data. 1.4 SCP - DO -V echoes commands from the file as they are executed. - Under Windows, execution priority is set BELOW_NORMAL when the simulator is running. 2. Release Notes 2.1 Bugs Fixed - PDP-11 CPU: fixed updating of MMR0 on a memory management error. - VAX FPA: changed function names to avoid conflict with C math library. - 1401 MT: read end of record generates group mark without word mark. - 1401 DP: fixed address generation and checking. - SCP: an EXIT within a DO command will cause the simulator to exit. 3. In Progress - Interdata 16b/32b: coded, not tested. - SDS 940: coded, not tested. - IBM 1620: coded, not tested. If you would like to help with the debugging of the untested simulators, they can be made available by special request.
337 lines
11 KiB
C
337 lines
11 KiB
C
/* i1401_sys.c: IBM 1401 simulator interface
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Copyright (c) 1993-2002, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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03-Jun-02 RMS Added 1311 support
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18-May-02 RMS Added -D feature from Van Snyder
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26-Jan-02 RMS Fixed H, NOP with no trailing wm (found by Van Snyder)
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17-Sep-01 RMS Removed multiconsole support
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13-Jul-01 RMS Fixed bug in symbolic output (found by Peter Schorn)
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27-May-01 RMS Added multiconsole support
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14-Mar-01 RMS Revised load/dump interface (again)
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30-Oct-00 RMS Added support for examine to file
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27-Oct-98 RMS V2.4 load interface
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*/
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#include "i1401_defs.h"
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#include <ctype.h>
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#define LINE_LNT 80
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extern DEVICE cpu_dev, inq_dev, lpt_dev;
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extern DEVICE cdr_dev, cdp_dev, stack_dev;
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extern DEVICE dp_dev, mt_dev;
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extern UNIT cpu_unit;
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extern REG cpu_reg[];
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extern uint8 M[];
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extern char bcd_to_ascii[64], ascii_to_bcd[128];
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extern char *get_glyph (char *cptr, char *gbuf, char term);
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extern int32 store_addr_h (int32 addr);
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extern int32 store_addr_t (int32 addr);
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extern int32 store_addr_u (int32 addr);
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/* SCP data structures and interface routines
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sim_name simulator name string
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sim_PC pointer to saved PC register descriptor
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sim_emax maximum number of words for examine/deposit
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sim_devices array of pointers to simulated devices
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sim_stop_messages array of pointers to stop messages
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sim_load binary loader
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*/
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char sim_name[] = "IBM 1401";
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REG *sim_PC = &cpu_reg[0];
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int32 sim_emax = LINE_LNT;
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DEVICE *sim_devices[] = {
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&cpu_dev,
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&inq_dev,
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&cdr_dev,
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&cdp_dev,
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&stack_dev,
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&lpt_dev,
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&mt_dev,
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&dp_dev,
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NULL };
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const char *sim_stop_messages[] = {
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"Unknown error",
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"Unimplemented instruction",
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"Non-existent memory",
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"Non-existent device",
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"No WM at instruction start",
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"Invalid A address",
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"Invalid B address",
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"Invalid instruction length",
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"Invalid modifer",
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"Invalid branch address",
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"Breakpoint",
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"HALT instruction",
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"Invalid MT unit number",
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"Invalid MT record length",
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"Write to locked MT unit",
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"Skip to unpunched CCT channel",
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"Card reader empty",
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"Address register wrap",
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"MCE data field too short",
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"MCE control field too short",
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"MCE EPE hanging $",
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"I/O check",
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"Invalid disk sector address",
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"Invalid disk sector count",
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"Invalid disk unit",
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"Invalid disk function",
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"Invalid disk record length",
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"Write track while disabled",
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"Write check error",
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"Disk address miscompare",
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"Direct seek cylinder exceeds maximum"
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};
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/* Binary loader -- load carriage control tape
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A carriage control tape consists of entries of the form
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(repeat count) column number,column number,column number,...
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The CCT entries are stored in cct[0:lnt-1], cctlnt contains the
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number of entries
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*/
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t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
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{
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int32 col, rpt, ptr, mask, cctbuf[CCT_LNT];
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t_stat r;
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extern int32 cctlnt, cctptr, cct[CCT_LNT];
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char cbuf[CBUFSIZE], gbuf[CBUFSIZE];
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if ((*cptr != 0) || (flag != 0)) return SCPE_ARG;
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ptr = 0;
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for ( ; (cptr = fgets (cbuf, CBUFSIZE, fileref)) != NULL; ) { /* until eof */
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mask = 0;
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if (*cptr == '(') { /* repeat count? */
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cptr = get_glyph (cptr + 1, gbuf, ')'); /* get 1st field */
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rpt = get_uint (gbuf, 10, CCT_LNT, &r); /* repeat count */
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if (r != SCPE_OK) return SCPE_FMT; }
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else rpt = 1;
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while (*cptr != 0) { /* get col no's */
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cptr = get_glyph (cptr, gbuf, ','); /* get next field */
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col = get_uint (gbuf, 10, 12, &r); /* column number */
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if (r != SCPE_OK) return SCPE_FMT;
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mask = mask | (1 << col); } /* set bit */
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for ( ; rpt > 0; rpt--) { /* store vals */
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if (ptr >= CCT_LNT) return SCPE_FMT;
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cctbuf[ptr++] = mask; } }
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if (ptr == 0) return SCPE_FMT;
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cctlnt = ptr;
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cctptr = 0;
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for (rpt = 0; rpt < cctlnt; rpt++) cct[rpt] = cctbuf[rpt];
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return SCPE_OK;
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}
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/* Symbol table */
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const char *opcode[64] = {
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NULL, "R", "W", "WR", "P", "RP", "WP", "WRP",
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"RF", "WF", NULL, "MA", "MUL", NULL, NULL, NULL,
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NULL, "CS", "S", NULL, "MTF", "BWZ", "BBE", NULL,
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"MZ", "MSZ", NULL, "SWM", "DIV", NULL, NULL, NULL,
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NULL, NULL, "SS", "LCA", "MCW", "NOP", NULL, "MCM",
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"SAR", NULL, "ZS", NULL, NULL, NULL, NULL, NULL,
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NULL, "A", "B", "C", "MN", "MCE", "CC", NULL,
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"SBR", NULL, "ZA", "H", "CWM", NULL, NULL, NULL };
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/* Print an address from three characters */
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void fprint_addr (FILE *of, t_value *dig)
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{
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int32 addr, xa;
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extern int32 hun_table[64], ten_table[64], one_table[64];
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addr = hun_table[dig[0]] + ten_table[dig[1]] + one_table[dig[2]];
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xa = (addr >> V_INDEX) & M_INDEX;
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if (xa) fprintf (of, " %d,%d", addr & ADDRMASK, ((xa - (X1 >> V_INDEX)) / 5) + 1);
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else if (addr >= MAXMEMSIZE) fprintf (of, " %d*", addr & ADDRMASK);
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else fprintf (of, " %d", addr);
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return;
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}
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/* Symbolic decode
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Inputs:
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*of = output stream
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addr = current address
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*val = values to decode
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*uptr = pointer to unit
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sw = switches
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Outputs:
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return = if >= 0, error code
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if < 0, number of extra words retired
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*/
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#define FMTASC(x) ((x) < 040)? "<%03o>": "%c", (x)
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t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
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UNIT *uptr, int32 sw)
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{
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int32 op, flags, ilnt, i, t;
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extern int32 op_table[64], len_table[9];
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if (sw & SWMASK ('C')) { /* character? */
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t = val[0];
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if (uptr -> flags & UNIT_BCD)
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fprintf (of, (t & WM)? "~%c": "%c", bcd_to_ascii[t & CHAR]);
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else fprintf (of, FMTASC (t & 0177));
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return SCPE_OK; }
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if ((uptr != NULL) && (uptr != &cpu_unit)) return SCPE_ARG; /* CPU? */
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if (sw & SWMASK ('D')) { /* dump? */
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for (i = 0; i < 50; i++) fprintf (of, "%c", bcd_to_ascii[val[i]&CHAR]) ;
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fprintf (of, "\n\t");
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for (i = 0; i < 50; i++) fprintf (of, (val[i]&WM)? "1": " ") ;
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return -(i - 1); }
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if (sw & SWMASK ('S')) { /* string? */
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i = 0;
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do { t = val[i++];
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fprintf (of, (t & WM)? "~%c": "%c", bcd_to_ascii[t & CHAR]); }
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while ((i < LINE_LNT) && ((val[i] & WM) == 0));
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return -(i - 1); }
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if ((sw & SWMASK ('M')) == 0) return SCPE_ARG;
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if ((val[0] & WM) == 0) return STOP_NOWM; /* WM under op? */
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op = val[0]& CHAR; /* isolate op */
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flags = op_table[op]; /* get flags */
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for (ilnt = 1; ilnt < sim_emax; ilnt++) if (val[ilnt] & WM) break;
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if ((flags & (NOWM | HNOP)) && (ilnt > 7)) ilnt = 7; /* cs, swm, h, nop? */
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else if ((op == OP_B) && (ilnt > 4) && (val[4] == BCD_BLANK)) ilnt = 4;
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else if ((ilnt > 8) && (op != OP_NOP)) ilnt = 8; /* cap length */
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if (((flags & len_table[ilnt]) == 0) && /* valid lnt, */
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((op != OP_NOP) == 0)) return STOP_INVL; /* nop? */
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fprintf (of, "%s",opcode[op]); /* print opcode */
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if (ilnt > 2) { /* A address? */
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if (((flags & IO) || (op == OP_NOP)) && (val[1] == BCD_PERCNT))
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fprintf (of, " %%%c%c", bcd_to_ascii[val[2]], bcd_to_ascii[val[3]]);
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else fprint_addr (of, &val[1]); }
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if (ilnt > 5) fprint_addr (of, &val[4]); /* B address? */
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if ((ilnt == 2) || (ilnt == 5) || (ilnt == 8)) /* d character? */
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fprintf (of, " '%c", bcd_to_ascii[val[ilnt - 1]]);
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return -(ilnt - 1); /* return # chars */
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}
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/* get_addr - get address + index pair */
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t_stat get_addr (char *cptr, t_value *val)
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{
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int32 addr, index;
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t_stat r;
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char gbuf[CBUFSIZE];
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cptr = get_glyph (cptr, gbuf, ','); /* get address */
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addr = get_uint (gbuf, 10, MAXMEMSIZE, &r);
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if (r != SCPE_OK) return SCPE_ARG;
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if (*cptr != 0) { /* more? */
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cptr = get_glyph (cptr, gbuf, ' ');
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index = get_uint (gbuf, 10, 3, &r);
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if ((r != SCPE_OK) || (index == 0)) return SCPE_ARG; }
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else index = 0;
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if (*cptr != 0) return SCPE_ARG;
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val[0] = store_addr_h (addr);
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val[1] = store_addr_t (addr) | (index << V_ZONE);
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val[2] = store_addr_u (addr);
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return SCPE_OK;
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}
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/* get_io - get I/O address */
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t_stat get_io (char *cptr, t_value *val)
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{
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if ((cptr[0] != '%') || (cptr[3] != 0) || !isalnum (cptr[1]) ||
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!isalnum (cptr[2])) return SCPE_ARG;
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val[0] = BCD_PERCNT;
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val[1] = ascii_to_bcd[cptr[1]];
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val[2] = ascii_to_bcd[cptr[2]];
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return SCPE_OK;
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}
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/* Symbolic input
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Inputs:
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*cptr = pointer to input string
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addr = current PC
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*uptr = pointer to unit
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*val = pointer to output values
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sw = switches
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Outputs:
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status = > 0 error code
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<= 0 -number of extra words
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*/
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t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
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{
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int32 i, op, ilnt, t, cflag, wm_seen;
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extern int32 op_table[64], len_table[9];
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char gbuf[CBUFSIZE];
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cflag = (uptr == NULL) || (uptr == &cpu_unit);
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while (isspace (*cptr)) cptr++; /* absorb spaces */
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if ((sw & SWMASK ('C')) || (sw & SWMASK ('S')) || (*cptr == '~') ||
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((*cptr == '\'') && cptr++) || ((*cptr == '"') && cptr++)) {
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wm_seen = 0;
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for (i = 0; (i < sim_emax) && (*cptr != 0); ) {
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t = *cptr++; /* get character */
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if (cflag && (wm_seen == 0) && (t == '~')) wm_seen = WM;
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else if (uptr -> flags & UNIT_BCD) {
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if (t < 040) return SCPE_ARG;
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val[i++] = ascii_to_bcd[t] | wm_seen;
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wm_seen = 0; }
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else val[i++] = t; }
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if ((i == 0) || wm_seen) return SCPE_ARG;
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return -(i-1); }
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if (cflag == 0) return SCPE_ARG; /* CPU only */
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cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
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for (op = 0; op < 64; op++) /* look it up */
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if (opcode[op] && strcmp (gbuf, opcode[op]) == 0) break;
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if (op >= 64) return SCPE_ARG; /* successful? */
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val[0] = op | WM; /* store opcode */
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cptr = get_glyph (cptr, gbuf, 0); /* get addr or d */
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if (((op_table[op] && IO) && (get_io (gbuf, &val[1]) == SCPE_OK)) ||
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(get_addr (gbuf, &val[1]) == SCPE_OK)) {
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cptr = get_glyph (cptr, gbuf, 0); /* get addr or d */
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if (get_addr (gbuf, &val[4]) == SCPE_OK) {
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cptr = get_glyph (cptr, gbuf, ','); /* get d */
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ilnt = 7; } /* a and b addresses */
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else ilnt = 4; } /* a address */
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else ilnt = 1; /* no addresses */
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if ((gbuf[0] == '\'') || (gbuf[0] == '"')) { /* d character? */
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t = gbuf[1];
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if ((gbuf[2] != 0) || (*cptr != 0) || (t < 040))
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return SCPE_ARG; /* end and legal? */
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val[ilnt] = ascii_to_bcd[t]; /* save D char */
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ilnt = ilnt + 1; }
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else if (gbuf[0] != 0) return SCPE_ARG; /* not done? */
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if ((op_table[op] & len_table[ilnt]) == 0) return STOP_INVL;
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return -(ilnt - 1);
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}
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