e2ba672610
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT enable this feature for normal operations. 1. New Features in 3.2-1 1.1 SCP and libraries - Added SET CONSOLE subhierarchy. - Added SHOW CONSOLE subhierarchy. - Added limited keyboard mapping capability. 1.2 HP2100 (new features from Dave Bryan) - Added instruction printout to HALT message. - Added M and T internal registers. - Added N, S, and U breakpoints. 1.3 PDP-11 and VAX - Added DHQ11 support (from John Dundas) 2. Bugs Fixed in 3.2-1 2.1 HP2100 (most fixes from Dave Bryan) - SBT increments B after store. - DMS console map must check dms_enb. - SFS x,C and SFC x,C work. - MP violation clears automatically on interrupt. - SFS/SFC 5 is not gated by protection enabled. - DMS enable does not disable mem prot checks. - DMS status inconsistent at simulator halt. - Examine/deposit are checking wrong addresses. - Physical addresses are 20b not 15b. - Revised DMS to use memory rather than internal format. - Revised IBL facility to conform to microcode. - Added DMA EDT I/O pseudo-opcode. - Separated DMA SRQ (service request) from FLG. - Revised peripherals to make SFS x,C and SFC x,C work. - Revised boot ROMs to use IBL facility. - Revised IBL treatment of SR to preserve SR<5:3>. - Fixed LPS, LPT timing. - Fixed DP boot interpretation of SR<0>. - Revised DR boot code to use IBL algorithm. - Fixed TTY input behavior during typeout for RTE-IV. - Suppressed nulls on TTY output for RTE-IV. - Added SFS x,C and SFC x,C to print/parse routines. - Fixed spurious timing error in magtape reads. 2.2 All DEC console devices - Removed SET TTI CTRL-C option. 2.3 PDP-11/VAX peripherals - Fixed bug in TQ reporting write protect status (reported by Lyle Bickley). - Fixed TK70 model number and media ID (found by Robert Schaffrath). - Fixed bug in autoconfigure (found by John Dundas). 2.4 VAX - Fixed bug in DIVBx and DIVWx (reported by Peter Trimmel).
680 lines
22 KiB
C
680 lines
22 KiB
C
/* hp2100_ms.c: HP 2100 13181A/13183A magnetic tape simulator
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Copyright (c) 1993-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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ms 13181A 7970B 800bpi nine track magnetic tape
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13183A 7970E 1600bpi nine track magnetic tape
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06-Jul-04 RMS Fixed spurious timing error after CLC (found by Dave Bryan)
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26-Apr-04 RMS Fixed SFS x,C and SFC x,C
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Fixed SR setting in IBL
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Revised IBL loader
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Implemented DMA SRQ (follows FLG)
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25-Apr-03 RMS Revised for extended file support
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28-Mar-03 RMS Added multiformat support
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28-Feb-03 RMS Revised for magtape library
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18-Oct-02 RMS Added BOOT command, added 13183A support
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30-Sep-02 RMS Revamped error handling
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29-Aug-02 RMS Added end of medium support
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30-May-02 RMS Widened POS to 32b
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22-Apr-02 RMS Added maximum record length test
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Magnetic tapes are represented as a series of variable records
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of the form:
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32b byte count
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byte 0
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byte 1
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:
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byte n-2
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byte n-1
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32b byte count
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If the byte count is odd, the record is padded with an extra byte
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of junk. File marks are represented by a byte count of 0.
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Unusually among HP peripherals, the 12559 does not have a command flop,
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and its flag and flag buffer power up as clear rather than set.
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*/
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#include "hp2100_defs.h"
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#include "sim_tape.h"
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#define MS_NUMDR 4 /* number of drives */
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#define DB_N_SIZE 16 /* max data buf */
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#define DBSIZE (1 << DB_N_SIZE) /* max data cmd */
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#define FNC u3 /* function */
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#define UST u4 /* unit status */
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/* Command - msc_fnc */
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#define FNC_CLR 00110 /* clear */
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#define FNC_GAP 00015 /* write gap */
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#define FNC_GFM 00215 /* gap+file mark */
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#define FNC_RC 00023 /* read */
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#define FNC_WC 00031 /* write */
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#define FNC_FSR 00003 /* forward space */
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#define FNC_BSR 00041 /* backward space */
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#define FNC_FSF 00203 /* forward file */
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#define FNC_BSF 00241 /* backward file */
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#define FNC_REW 00101 /* rewind */
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#define FNC_RWS 00105 /* rewind and offline */
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#define FNC_WFM 00211 /* write file mark */
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#define FNC_RFF 00223 /* "read file fwd" */
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#define FNC_V_SEL 9 /* select */
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#define FNC_M_SEL 017
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#define FNC_GETSEL(x) (((x) >> FNC_V_SEL) & FNC_M_SEL)
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#define FNF_MOT 00001 /* motion */
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#define FNF_OFL 00004
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#define FNF_WRT 00010 /* write */
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#define FNF_REV 00040 /* reverse */
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#define FNF_RWD 00100 /* rewind */
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#define FNF_CHS 00400 /* change select */
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/* Status - stored in msc_sta, unit.UST (u), or dynamic (d) */
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#define STA_PE 0100000 /* 1600 bpi (d) */
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#define STA_V_SEL 13 /* unit sel (d) */
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#define STA_M_SEL 03
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#define STA_SEL (STA_M_SEL << STA_V_SEL)
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#define STA_ODD 0004000 /* odd bytes */
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#define STA_REW 0002000 /* rewinding (u) */
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#define STA_TBSY 0001000 /* transport busy (d) */
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#define STA_BUSY 0000400 /* ctrl busy */
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#define STA_EOF 0000200 /* end of file */
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#define STA_BOT 0000100 /* beg of tape (u) */
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#define STA_EOT 0000040 /* end of tape (u) */
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#define STA_TIM 0000020 /* timing error */
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#define STA_REJ 0000010 /* programming error */
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#define STA_WLK 0000004 /* write locked (d) */
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#define STA_PAR 0000002 /* parity error */
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#define STA_LOCAL 0000001 /* local (d) */
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#define STA_DYN (STA_PE|STA_SEL|STA_TBSY|STA_WLK|STA_LOCAL)
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extern uint16 *M;
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extern uint32 PC, SR;
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extern uint32 dev_cmd[2], dev_ctl[2], dev_flg[2], dev_fbf[2], dev_srq[2];
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extern int32 sim_switches;
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extern UNIT cpu_unit;
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int32 ms_ctype = 0; /* ctrl type */
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int32 msc_sta = 0; /* status */
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int32 msc_buf = 0; /* buffer */
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int32 msc_usl = 0; /* unit select */
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int32 msc_1st = 0;
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int32 msc_ctime = 1000; /* command wait */
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int32 msc_gtime = 1000; /* gap stop time */
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int32 msc_rtime = 1000; /* rewind wait */
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int32 msc_xtime = 15; /* data xfer time */
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int32 msc_stopioe = 1; /* stop on error */
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int32 msd_buf = 0; /* data buffer */
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uint8 msxb[DBSIZE] = { 0 }; /* data buffer */
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t_mtrlnt ms_ptr = 0, ms_max = 0; /* buffer ptrs */
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DEVICE msd_dev, msc_dev;
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int32 msdio (int32 inst, int32 IR, int32 dat);
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int32 mscio (int32 inst, int32 IR, int32 dat);
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t_stat msc_svc (UNIT *uptr);
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t_stat msc_reset (DEVICE *dptr);
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t_stat msc_attach (UNIT *uptr, char *cptr);
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t_stat msc_detach (UNIT *uptr);
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t_stat msc_boot (int32 unitno, DEVICE *dptr);
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t_stat ms_map_err (UNIT *uptr, t_stat st);
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t_stat ms_settype (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat ms_showtype (FILE *st, UNIT *uptr, int32 val, void *desc);
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/* MSD data structures
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msd_dev MSD device descriptor
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msd_unit MSD unit list
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msd_reg MSD register list
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*/
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DIB ms_dib[] = {
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{ MSD, 0, 0, 0, 0, 0, &msdio },
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{ MSC, 0, 0, 0, 0, 0, &mscio } };
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#define msd_dib ms_dib[0]
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#define msc_dib ms_dib[1]
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UNIT msd_unit = { UDATA (NULL, 0, 0) };
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REG msd_reg[] = {
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{ ORDATA (BUF, msd_buf, 16) },
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{ FLDATA (CMD, msd_dib.cmd, 0), REG_HRO },
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{ FLDATA (CTL, msd_dib.ctl, 0) },
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{ FLDATA (FLG, msd_dib.flg, 0) },
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{ FLDATA (FBF, msd_dib.fbf, 0) },
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{ FLDATA (SRQ, msd_dib.srq, 0) },
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{ BRDATA (DBUF, msxb, 8, 8, DBSIZE) },
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{ DRDATA (BPTR, ms_ptr, DB_N_SIZE + 1) },
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{ DRDATA (BMAX, ms_max, DB_N_SIZE + 1) },
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{ ORDATA (DEVNO, msd_dib.devno, 6), REG_HRO },
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{ NULL } };
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MTAB msd_mod[] = {
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{ MTAB_XTD | MTAB_VDV, 1, "DEVNO", "DEVNO",
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&hp_setdev, &hp_showdev, &msd_dev },
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{ 0 } };
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DEVICE msd_dev = {
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"MSD", &msd_unit, msd_reg, msd_mod,
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1, 10, DB_N_SIZE, 1, 8, 8,
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NULL, NULL, &msc_reset,
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NULL, NULL, NULL,
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&msd_dib, 0 };
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/* MSC data structures
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msc_dev MSC device descriptor
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msc_unit MSC unit list
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msc_reg MSC register list
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msc_mod MSC modifier list
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*/
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UNIT msc_unit[] = {
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{ UDATA (&msc_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) },
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{ UDATA (&msc_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) },
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{ UDATA (&msc_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) },
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{ UDATA (&msc_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) } };
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REG msc_reg[] = {
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{ ORDATA (STA, msc_sta, 12) },
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{ ORDATA (BUF, msc_buf, 16) },
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{ ORDATA (USEL, msc_usl, 2) },
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{ FLDATA (FSVC, msc_1st, 0) },
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{ FLDATA (CMD, msc_dib.cmd, 0), REG_HRO },
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{ FLDATA (CTL, msc_dib.ctl, 0) },
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{ FLDATA (FLG, msc_dib.flg, 0) },
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{ FLDATA (FBF, msc_dib.fbf, 0) },
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{ FLDATA (SRQ, msc_dib.srq, 0) },
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{ URDATA (POS, msc_unit[0].pos, 10, T_ADDR_W, 0, MS_NUMDR, PV_LEFT) },
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{ URDATA (FNC, msc_unit[0].FNC, 8, 8, 0, MS_NUMDR, REG_HRO) },
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{ URDATA (UST, msc_unit[0].UST, 8, 12, 0, MS_NUMDR, REG_HRO) },
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{ DRDATA (CTIME, msc_ctime, 24), REG_NZ + PV_LEFT },
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{ DRDATA (GTIME, msc_gtime, 24), REG_NZ + PV_LEFT },
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{ DRDATA (RTIME, msc_rtime, 24), REG_NZ + PV_LEFT },
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{ DRDATA (XTIME, msc_xtime, 24), REG_NZ + PV_LEFT },
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{ FLDATA (STOP_IOE, msc_stopioe, 0) },
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{ FLDATA (CTYPE, ms_ctype, 0), REG_HRO },
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{ ORDATA (DEVNO, msc_dib.devno, 6), REG_HRO },
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{ NULL } };
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MTAB msc_mod[] = {
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{ MTUF_WLK, 0, "write enabled", "WRITEENABLED", NULL },
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{ MTUF_WLK, MTUF_WLK, "write locked", "LOCKED", NULL },
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{ MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT",
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&sim_tape_set_fmt, &sim_tape_show_fmt, NULL },
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{ MTAB_XTD | MTAB_VDV, 0, NULL, "13181A",
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&ms_settype, NULL, NULL },
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{ MTAB_XTD | MTAB_VDV, 1, NULL, "13183A",
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&ms_settype, NULL, NULL },
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{ MTAB_XTD | MTAB_VDV, 0, "TYPE", NULL,
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NULL, &ms_showtype, NULL },
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{ MTAB_XTD | MTAB_VDV, 1, "DEVNO", "DEVNO",
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&hp_setdev, &hp_showdev, &msd_dev },
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{ 0 } };
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DEVICE msc_dev = {
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"MSC", msc_unit, msc_reg, msc_mod,
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MS_NUMDR, 10, 31, 1, 8, 8,
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NULL, NULL, &msc_reset,
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&msc_boot, &msc_attach, &msc_detach,
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&msc_dib, DEV_DISABLE };
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/* IOT routines */
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int32 msdio (int32 inst, int32 IR, int32 dat)
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{
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int32 devd;
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devd = IR & I_DEVMASK; /* get device no */
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switch (inst) { /* case on opcode */
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case ioFLG: /* flag clear/set */
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if ((IR & I_HC) == 0) { setFSR (devd); } /* STF */
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break;
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case ioSFC: /* skip flag clear */
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if (FLG (devd) == 0) PC = (PC + 1) & VAMASK;
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break;
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case ioSFS: /* skip flag set */
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if (FLG (devd) != 0) PC = (PC + 1) & VAMASK;
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break;
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case ioOTX: /* output */
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msd_buf = dat; /* store data */
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break;
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case ioMIX: /* merge */
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dat = dat | msd_buf;
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break;
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case ioLIX: /* load */
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dat = msd_buf;
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break;
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case ioCTL: /* control clear/set */
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if (IR & I_CTL) { /* CLC */
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clrCTL (devd); /* clr ctl, cmd */
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clrCMD (devd); }
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else { /* STC */
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setCTL (devd); /* set ctl, cmd */
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setCMD (devd); }
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break;
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case ioEDT: /* DMA end */
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clrFSR (devd); /* same as CLF */
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break;
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default:
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break; }
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if (IR & I_HC) { clrFSR (devd); } /* H/C option */
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return dat;
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}
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int32 mscio (int32 inst, int32 IR, int32 dat)
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{
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int32 i, devc, devd;
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t_stat st;
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UNIT *uptr = msc_dev.units + msc_usl;
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static const uint8 map_sel[16] = {
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0, 0, 1, 1, 2, 2, 2, 2,
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3, 3, 3, 3, 3, 3, 3, 3 };
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devc = IR & I_DEVMASK; /* get device no */
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devd = devc - 1;
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switch (inst) { /* case on opcode */
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case ioFLG: /* flag clear/set */
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if ((IR & I_HC) == 0) { setFSR (devc); } /* STF */
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break;
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case ioSFC: /* skip flag clear */
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if (FLG (devc) == 0) PC = (PC + 1) & VAMASK;
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break;
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case ioSFS: /* skip flag set */
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if (FLG (devc) != 0) PC = (PC + 1) & VAMASK;
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break;
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case ioOTX: /* output */
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msc_buf = dat;
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msc_sta = msc_sta & ~STA_REJ; /* clear reject */
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if ((dat & 0377) == FNC_CLR) break; /* clear always ok */
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if (msc_sta & STA_BUSY) { /* busy? reject */
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msc_sta = msc_sta | STA_REJ; /* dont chg select */
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break; }
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if (dat & FNF_CHS) { /* select change */
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msc_usl = map_sel[FNC_GETSEL (dat)]; /* is immediate */
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uptr = msc_dev.units + msc_usl; }
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if (((dat & FNF_MOT) && sim_is_active (uptr)) ||
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((dat & FNF_REV) && (uptr->UST & STA_BOT)) ||
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((dat & FNF_WRT) && sim_tape_wrp (uptr)))
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msc_sta = msc_sta | STA_REJ; /* reject? */
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break;
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case ioLIX: /* load */
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dat = 0;
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case ioMIX: /* merge */
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dat = dat | ((msc_sta | uptr->UST) & ~STA_DYN);
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if (uptr->flags & UNIT_ATT) { /* online? */
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if (sim_is_active (uptr)) /* busy */
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dat = dat | STA_TBSY;
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if (sim_tape_wrp (uptr)) /* write prot? */
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dat = dat | STA_WLK; }
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else dat = dat | STA_TBSY | STA_LOCAL;
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if (ms_ctype) dat = dat | STA_PE | /* 13183A? */
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(msc_usl << STA_V_SEL);
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break;
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case ioCTL: /* control clear/set */
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if (IR & I_CTL) { clrCTL (devc); } /* CLC */
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else { /* STC */
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if ((msc_buf & 0377) == FNC_CLR) { /* clear? */
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for (i = 0; i < MS_NUMDR; i++) { /* loop thru units */
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if (sim_is_active (&msc_unit[i]) && /* write in prog? */
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(msc_unit[i].FNC == FNC_WC) && (ms_ptr > 0)) {
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if (st = sim_tape_wrrecf (uptr, msxb, ms_ptr | MTR_ERF))
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ms_map_err (uptr, st); }
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if ((msc_unit[i].UST & STA_REW) == 0)
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sim_cancel (&msc_unit[i]); } /* stop if now rew */
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clrCTL (devc); /* init device */
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setFSR (devc);
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clrCTL (devd);
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setFSR (devd);
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msc_sta = msd_buf = msc_buf = msc_1st = 0;
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return SCPE_OK; }
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uptr->FNC = msc_buf & 0377; /* save function */
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if (uptr->FNC & FNF_RWD) /* rewind? */
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sim_activate (uptr, msc_rtime); /* fast response */
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else sim_activate (uptr, msc_ctime); /* schedule op */
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uptr->UST = 0; /* clear status */
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msc_sta = STA_BUSY; /* ctrl is busy */
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msc_1st = 1;
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setCTL (devc); } /* go */
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break;
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case ioEDT: /* DMA end */
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clrFSR (devc); /* same as CLF */
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break;
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default:
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break; }
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if (IR & I_HC) { clrFSR (devc); } /* H/C option */
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return dat;
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}
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/* Unit service
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If rewind done, reposition to start of tape, set status
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else, do operation, set done, interrupt
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Can't be write locked, can only write lock detached unit
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*/
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t_stat msc_svc (UNIT *uptr)
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{
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int32 devc, devd;
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t_mtrlnt tbc;
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t_stat st, r = SCPE_OK;
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|
||
devc = msc_dib.devno; /* get device nos */
|
||
devd = msd_dib.devno;
|
||
|
||
if ((uptr->flags & UNIT_ATT) == 0) { /* offline? */
|
||
msc_sta = (msc_sta | STA_REJ) & ~STA_BUSY; /* reject */
|
||
setFSR (devc); /* set cch flg */
|
||
return IORETURN (msc_stopioe, SCPE_UNATT); }
|
||
|
||
switch (uptr->FNC) { /* case on function */
|
||
case FNC_REW: /* rewind */
|
||
case FNC_RWS: /* rewind offline */
|
||
if (uptr->UST & STA_REW) { /* rewind in prog? */
|
||
sim_tape_rewind (uptr); /* done */
|
||
uptr->UST = STA_BOT; /* set BOT status */
|
||
if (uptr->FNC & FNF_OFL) detach_unit (uptr);
|
||
return SCPE_OK; }
|
||
uptr->UST = STA_REW; /* set rewinding */
|
||
sim_activate (uptr, msc_ctime); /* sched completion */
|
||
break; /* "done" */
|
||
|
||
case FNC_GFM: /* gap file mark */
|
||
case FNC_WFM: /* write file mark */
|
||
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */
|
||
r = ms_map_err (uptr, st); /* map error */
|
||
msc_sta = STA_EOF; /* set EOF status */
|
||
break;
|
||
|
||
case FNC_GAP: /* erase gap */
|
||
break;
|
||
|
||
case FNC_FSR: /* space forward */
|
||
if (st = sim_tape_sprecf (uptr, &tbc)) /* space rec fwd, err? */
|
||
r = ms_map_err (uptr, st); /* map error */
|
||
if (tbc & 1) msc_sta = msc_sta | STA_ODD;
|
||
else msc_sta = msc_sta & ~STA_ODD;
|
||
break;
|
||
|
||
case FNC_BSR:
|
||
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rec rev, err? */
|
||
r = ms_map_err (uptr, st); /* map error */
|
||
if (tbc & 1) msc_sta = msc_sta | STA_ODD;
|
||
else msc_sta = msc_sta & ~STA_ODD;
|
||
break;
|
||
|
||
case FNC_FSF:
|
||
while ((st = sim_tape_sprecf (uptr, &tbc)) == MTSE_OK) ;
|
||
if (st == MTSE_TMK) /* stopped by tmk? */
|
||
msc_sta = msc_sta | STA_EOF | STA_ODD; /* normal status */
|
||
else r = ms_map_err (uptr, st); /* map error */
|
||
break;
|
||
|
||
case FNC_BSF:
|
||
while ((st = sim_tape_sprecr (uptr, &tbc)) == MTSE_OK) ;
|
||
if (st == MTSE_TMK) /* stopped by tmk? */
|
||
msc_sta = msc_sta | STA_EOF | STA_ODD; /* normal status */
|
||
else r = ms_map_err (uptr, st); /* map error */
|
||
break;
|
||
|
||
/* Unit service, continued */
|
||
|
||
case FNC_RFF: /* diagnostic read */
|
||
case FNC_RC: /* read */
|
||
if (msc_1st) { /* first svc? */
|
||
msc_1st = ms_ptr = 0; /* clr 1st flop */
|
||
st = sim_tape_rdrecf (uptr, msxb, &ms_max, DBSIZE); /* read rec */
|
||
if (st == MTSE_RECE) msc_sta = msc_sta | STA_PAR; /* rec in err? */
|
||
else if (st != MTSE_OK) { /* other error? */
|
||
r = ms_map_err (uptr, st); /* map error */
|
||
if (r == SCPE_OK) { /* recoverable? */
|
||
sim_activate (uptr, msc_gtime); /* sched IRG */
|
||
uptr->FNC = 0; /* NOP func */
|
||
return SCPE_OK; }
|
||
break; } /* err, done */
|
||
}
|
||
if (CTL (devd) && (ms_ptr < ms_max)) { /* DCH on, more data? */
|
||
if (FLG (devd)) msc_sta = msc_sta | STA_TIM | STA_PAR;
|
||
msd_buf = ((uint16) msxb[ms_ptr] << 8) | msxb[ms_ptr + 1];
|
||
ms_ptr = ms_ptr + 2;
|
||
setFSR (devd); /* set dch flg */
|
||
sim_activate (uptr, msc_xtime); /* re-activate */
|
||
return SCPE_OK; }
|
||
sim_activate (uptr, msc_gtime); /* sched IRG */
|
||
if (uptr->FNC == FNC_RFF) msc_1st = 1; /* diagnostic? */
|
||
else uptr->FNC = 0; /* NOP func */
|
||
return SCPE_OK;
|
||
|
||
case FNC_WC: /* write */
|
||
if (msc_1st) msc_1st = ms_ptr = 0; /* no xfer on first */
|
||
else { /* not 1st, next char */
|
||
if (ms_ptr < DBSIZE) { /* room in buffer? */
|
||
msxb[ms_ptr] = msd_buf >> 8; /* store 2 char */
|
||
msxb[ms_ptr + 1] = msd_buf & 0377;
|
||
ms_ptr = ms_ptr + 2;
|
||
uptr->UST = 0; }
|
||
else msc_sta = msc_sta | STA_PAR; }
|
||
if (CTL (devd)) { /* xfer flop set? */
|
||
setFSR (devd); /* set dch flag */
|
||
sim_activate (uptr, msc_xtime); /* re-activate */
|
||
return SCPE_OK; }
|
||
if (ms_ptr) { /* any data? write */
|
||
if (st = sim_tape_wrrecf (uptr, msxb, ms_ptr)) { /* write, err? */
|
||
r = ms_map_err (uptr, st); /* map error */
|
||
break; } }
|
||
sim_activate (uptr, msc_gtime); /* sched IRG */
|
||
uptr->FNC = 0; /* NOP func */
|
||
return SCPE_OK;
|
||
|
||
default: /* unknown */
|
||
break; }
|
||
|
||
setFSR (devc); /* set cch flg */
|
||
msc_sta = msc_sta & ~STA_BUSY; /* update status */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Map tape error status */
|
||
|
||
t_stat ms_map_err (UNIT *uptr, t_stat st)
|
||
{
|
||
switch (st) {
|
||
case MTSE_FMT: /* illegal fmt */
|
||
case MTSE_UNATT: /* unattached */
|
||
msc_sta = msc_sta | STA_REJ; /* reject */
|
||
case MTSE_OK: /* no error */
|
||
return SCPE_IERR; /* never get here! */
|
||
case MTSE_TMK: /* end of file */
|
||
msc_sta = msc_sta | STA_EOF | STA_ODD; /* eof (also sets odd) */
|
||
break;
|
||
case MTSE_INVRL: /* invalid rec lnt */
|
||
msc_sta = msc_sta | STA_PAR;
|
||
return SCPE_MTRLNT;
|
||
case MTSE_IOERR: /* IO error */
|
||
msc_sta = msc_sta | STA_PAR; /* error */
|
||
if (msc_stopioe) return SCPE_IOERR;
|
||
break;
|
||
case MTSE_RECE: /* record in error */
|
||
case MTSE_EOM: /* end of medium */
|
||
msc_sta = msc_sta | STA_PAR; /* error */
|
||
break;
|
||
case MTSE_BOT: /* reverse into BOT */
|
||
uptr->UST = STA_BOT; /* set status */
|
||
break;
|
||
case MTSE_WRP: /* write protect */
|
||
msc_sta = msc_sta | STA_REJ; /* reject */
|
||
break; }
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat msc_reset (DEVICE *dptr)
|
||
{
|
||
int32 i;
|
||
UNIT *uptr;
|
||
|
||
hp_enbdis_pair (&msc_dev, &msd_dev); /* make pair cons */
|
||
msc_buf = msd_buf = 0;
|
||
msc_sta = msc_usl = 0;
|
||
msc_1st = 0;
|
||
msc_dib.cmd = msd_dib.cmd = 0; /* clear cmd */
|
||
msc_dib.ctl = msd_dib.ctl = 0; /* clear ctl */
|
||
msc_dib.flg = msd_dib.flg = 1; /* set flg */
|
||
msc_dib.fbf = msd_dib.fbf = 1; /* set fbf */
|
||
msc_dib.srq = msd_dib.srq = 1; /* srq follows flg */
|
||
for (i = 0; i < MS_NUMDR; i++) {
|
||
uptr = msc_dev.units + i;
|
||
sim_tape_reset (uptr);
|
||
sim_cancel (uptr);
|
||
uptr->UST = 0; }
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Attach routine */
|
||
|
||
t_stat msc_attach (UNIT *uptr, char *cptr)
|
||
{
|
||
t_stat r;
|
||
|
||
r = sim_tape_attach (uptr, cptr); /* attach unit */
|
||
if (r != SCPE_OK) return r; /* update status */
|
||
uptr->UST = STA_BOT;
|
||
return r;
|
||
}
|
||
|
||
/* Detach routine */
|
||
|
||
t_stat msc_detach (UNIT* uptr)
|
||
{
|
||
uptr->UST = 0; /* update status */
|
||
return sim_tape_detach (uptr); /* detach unit */
|
||
}
|
||
|
||
/* Set controller type */
|
||
|
||
t_stat ms_settype (UNIT *uptr, int32 val, char *cptr, void *desc)
|
||
{
|
||
int32 i;
|
||
|
||
if ((val < 0) || (val > 1) || (cptr != NULL)) return SCPE_ARG;
|
||
for (i = 0; i < MS_NUMDR; i++) {
|
||
if (msc_unit[i].flags & UNIT_ATT) return SCPE_ALATT; }
|
||
ms_ctype = val;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Show controller type */
|
||
|
||
t_stat ms_showtype (FILE *st, UNIT *uptr, int32 val, void *desc)
|
||
{
|
||
if (ms_ctype) fprintf (st, "13183A");
|
||
else fprintf (st, "13181A");
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* 7970B/7970E bootstrap routine (HP 12992D ROM) */
|
||
|
||
const uint16 ms_rom[IBL_LNT] = {
|
||
0106501, /*ST LIB 1 ; read sw */
|
||
0006011, /* SLB,RSS ; bit 0 set? */
|
||
0027714, /* JMP RD ; no read */
|
||
0003004, /* CMA,INA ; A is ctr */
|
||
0073775, /* STA WC ; save */
|
||
0067772, /* LDA SL0RW ; sel 0, rew */
|
||
0017762, /*FF JSB CMD ; do cmd */
|
||
0102311, /* SFS CC ; done? */
|
||
0027707, /* JMP *-1 ; wait */
|
||
0067774, /* LDB FFC ; get file fwd */
|
||
0037775, /* ISZ WC ; done files? */
|
||
0027706, /* JMP FF ; no */
|
||
0067773, /*RD LDB RDCMD ; read cmd */
|
||
0017762, /* JSB CMD ; do cmd */
|
||
0103710, /* STC DC,C ; start dch */
|
||
0102211, /* SFC CC ; read done? */
|
||
0027752, /* JMP STAT ; no, get stat */
|
||
0102310, /* SFS DC ; any data? */
|
||
0027717, /* JMP *-3 ; wait */
|
||
0107510, /* LIB DC,C ; get rec cnt */
|
||
0005727, /* BLF,BLF ; move to lower */
|
||
0007000, /* CMB ; make neg */
|
||
0077775, /* STA WC ; save */
|
||
0102211, /* SFC CC ; read done? */
|
||
0027752, /* JMP STAT ; no, get stat */
|
||
0102310, /* SFS DC ; any data? */
|
||
0027727, /* JMP *-3 ; wait */
|
||
0107510, /* LIB DC,C ; get load addr */
|
||
0074000, /* STB 0 ; start csum */
|
||
0077762, /* STA CMD ; save address */
|
||
0027742, /* JMP *+4 */
|
||
0177762, /*NW STB CMD,I ; store data */
|
||
0040001, /* ADA 1 ; add to csum */
|
||
0037762, /* ISZ CMD ; adv addr ptr */
|
||
0102310, /* SFS DC ; any data? */
|
||
0027742, /* JMP *-1 ; wait */
|
||
0107510, /* LIB DC,C ; get word */
|
||
0037775, /* ISZ WC ; done? */
|
||
0027737, /* JMP NW ; no */
|
||
0054000, /* CPB 0 ; csum ok? */
|
||
0027717, /* JMP RD+3 ; yes, cont */
|
||
0102011, /* HLT 11 ; no, halt */
|
||
0102511, /*ST LIA CC ; get status */
|
||
0001727, /* ALF,ALF ; get eof bit */
|
||
0002020, /* SSA ; set? */
|
||
0102077, /* HLT 77 ; done */
|
||
0001727, /* ALF,ALF ; put status back */
|
||
0001310, /* RAR,SLA ; read ok? */
|
||
0102000, /* HLT 0 ; no */
|
||
0027714, /* JMP RD ; read next */
|
||
0000000, /*CMD 0 */
|
||
0106611, /* OTB CC ; output cmd */
|
||
0102511, /* LIA CC ; check for reject */
|
||
0001323, /* RAR,RAR */
|
||
0001310, /* RAR,SLA */
|
||
0027763, /* JMP CMD+1 ; try again */
|
||
0103711, /* STC CC,C ; start command */
|
||
0127762, /* JMP CMD,I ; exit */
|
||
0001501, /*SL0RW 001501 ; select 0, rewind */
|
||
0001423, /*RDCMD 001423 ; read record */
|
||
0000203, /*FFC 000203 ; space forward file */
|
||
0000000, /*WC 000000 */
|
||
0000000,
|
||
0000000 };
|
||
|
||
t_stat msc_boot (int32 unitno, DEVICE *dptr)
|
||
{
|
||
int32 dev;
|
||
|
||
if (unitno != 0) return SCPE_NOFNC; /* only unit 0 */
|
||
dev = msd_dib.devno; /* get data chan dev */
|
||
if (ibl_copy (ms_rom, dev)) return SCPE_IERR; /* copy boot to memory */
|
||
SR = (SR & IBL_OPT) | IBL_MS | (dev << IBL_V_DEV); /* set SR */
|
||
if ((sim_switches & SWMASK ('S')) && AR) SR = SR | 1; /* skip? */
|
||
return SCPE_OK;
|
||
}
|