e2ba672610
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT enable this feature for normal operations. 1. New Features in 3.2-1 1.1 SCP and libraries - Added SET CONSOLE subhierarchy. - Added SHOW CONSOLE subhierarchy. - Added limited keyboard mapping capability. 1.2 HP2100 (new features from Dave Bryan) - Added instruction printout to HALT message. - Added M and T internal registers. - Added N, S, and U breakpoints. 1.3 PDP-11 and VAX - Added DHQ11 support (from John Dundas) 2. Bugs Fixed in 3.2-1 2.1 HP2100 (most fixes from Dave Bryan) - SBT increments B after store. - DMS console map must check dms_enb. - SFS x,C and SFC x,C work. - MP violation clears automatically on interrupt. - SFS/SFC 5 is not gated by protection enabled. - DMS enable does not disable mem prot checks. - DMS status inconsistent at simulator halt. - Examine/deposit are checking wrong addresses. - Physical addresses are 20b not 15b. - Revised DMS to use memory rather than internal format. - Revised IBL facility to conform to microcode. - Added DMA EDT I/O pseudo-opcode. - Separated DMA SRQ (service request) from FLG. - Revised peripherals to make SFS x,C and SFC x,C work. - Revised boot ROMs to use IBL facility. - Revised IBL treatment of SR to preserve SR<5:3>. - Fixed LPS, LPT timing. - Fixed DP boot interpretation of SR<0>. - Revised DR boot code to use IBL algorithm. - Fixed TTY input behavior during typeout for RTE-IV. - Suppressed nulls on TTY output for RTE-IV. - Added SFS x,C and SFC x,C to print/parse routines. - Fixed spurious timing error in magtape reads. 2.2 All DEC console devices - Removed SET TTI CTRL-C option. 2.3 PDP-11/VAX peripherals - Fixed bug in TQ reporting write protect status (reported by Lyle Bickley). - Fixed TK70 model number and media ID (found by Robert Schaffrath). - Fixed bug in autoconfigure (found by John Dundas). 2.4 VAX - Fixed bug in DIVBx and DIVWx (reported by Peter Trimmel).
791 lines
26 KiB
C
791 lines
26 KiB
C
/* hp2100_stddev.c: HP2100 standard devices simulator
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Copyright (c) 1993-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTI_CTLILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LII_CTLLE FOR ANY CLAIM, DAMAGES OR OTHER LII_CTLILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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ptr 12597A-002 paper tape reader
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ptp 12597A-005 paper tape punch
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tty 12531C buffered teleprinter interface
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clk 12539C time base generator
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26-Apr-04 RMS Fixed SFS x,C and SFC x,C
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Fixed SR setting in IBL
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Fixed input behavior during typeout for RTE-IV
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Suppressed nulls on TTY output for RTE-IV
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Implemented DMA SRQ (follows FLG)
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29-Mar-03 RMS Added support for console backpressure
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25-Apr-03 RMS Added extended file support
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22-Dec-02 RMS Added break support
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01-Nov-02 RMS Revised BOOT command for IBL ROMs
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Fixed bug in TTY reset, TTY starts in input mode
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Fixed bug in TTY mode OTA, stores data as well
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Fixed clock to add calibration, proper start/stop
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Added UC option to TTY output
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30-May-02 RMS Widened POS to 32b
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22-Mar-02 RMS Revised for dynamically allocated memory
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03-Nov-01 RMS Changed DEVNO to use extended SET/SHOW
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29-Nov-01 RMS Added read only unit support
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24-Nov-01 RMS Changed TIME to an array
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07-Sep-01 RMS Moved function prototypes
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21-Nov-00 RMS Fixed flag, buffer power up state
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Added status input for ptp, tty
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15-Oct-00 RMS Added dynamic device number support
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The reader and punch, like most HP devices, have a command flop. The
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teleprinter and clock do not.
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The clock autocalibrates. If the specified clock frequency is below
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10Hz, the clock service routine runs at 10Hz and counts down a repeat
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counter before generating an interrupt. Autocalibration will not work
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if the clock is running at 1Hz or less.
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Clock diagnostic mode corresponds to inserting jumper W2 on the 12539C.
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This turns off autocalibration and divides the longest time intervals down
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by 10**3. The clk_time values were chosen to allow the diagnostic to
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pass its clock calibration test.
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*/
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#include "hp2100_defs.h"
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#include <ctype.h>
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#define UNIT_V_8B (UNIT_V_UF + 0) /* 8B */
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#define UNIT_V_UC (UNIT_V_UF + 1) /* UC only */
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#define UNIT_V_DIAG (UNIT_V_UF + 2) /* diag mode */
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#define UNIT_V_AUTOLF (UNIT_V_UF + 3) /* auto linefeed */
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#define UNIT_8B (1 << UNIT_V_8B)
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#define UNIT_UC (1 << UNIT_V_UC)
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#define UNIT_DIAG (1 << UNIT_V_DIAG)
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#define UNIT_AUTOLF (1 << UNIT_V_AUTOLF)
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#define PTP_LOW 0000040 /* low tape */
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#define TM_MODE 0100000 /* mode change */
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#define TM_KBD 0040000 /* enable keyboard */
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#define TM_PRI 0020000 /* enable printer */
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#define TM_PUN 0010000 /* enable punch */
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#define TP_BUSY 0100000 /* busy */
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#define CLK_V_ERROR 4 /* clock overrun */
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#define CLK_ERROR (1 << CLK_V_ERROR)
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extern uint16 *M;
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extern uint32 PC, SR;
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extern uint32 dev_cmd[2], dev_ctl[2], dev_flg[2], dev_fbf[2], dev_srq[2];
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extern UNIT cpu_unit;
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int32 ptr_stopioe = 0; /* stop on error */
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int32 ptr_trlcnt = 0; /* trailer counter */
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int32 ptr_trllim = 40; /* trailer to add */
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int32 ptp_stopioe = 0;
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int32 ttp_stopioe = 0;
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int32 tty_buf = 0; /* tty buffer */
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int32 tty_mode = 0; /* tty mode */
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int32 tty_shin = 0377; /* tty shift in */
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int32 tty_lf = 0; /* lf flag */
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int32 clk_select = 0; /* clock time select */
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int32 clk_error = 0; /* clock error */
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int32 clk_ctr = 0; /* clock counter */
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int32 clk_time[8] = /* clock intervals */
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{ 155, 1550, 15500, 155000, 155000, 155000, 155000, 155000 };
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int32 clk_tps[8] = /* clock tps */
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{ 10000, 1000, 100, 10, 10, 10, 10, 10 };
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int32 clk_rpt[8] = /* number of repeats */
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{ 1, 1, 1, 1, 10, 100, 1000, 10000 };
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DEVICE ptr_dev, ptp_dev, tty_dev, clk_dev;
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int32 ptrio (int32 inst, int32 IR, int32 dat);
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t_stat ptr_svc (UNIT *uptr);
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t_stat ptr_attach (UNIT *uptr, char *cptr);
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t_stat ptr_reset (DEVICE *dptr);
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t_stat ptr_boot (int32 unitno, DEVICE *dptr);
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int32 ptpio (int32 inst, int32 IR, int32 dat);
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t_stat ptp_svc (UNIT *uptr);
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t_stat ptp_reset (DEVICE *dptr);
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int32 ttyio (int32 inst, int32 IR, int32 dat);
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t_stat tti_svc (UNIT *uptr);
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t_stat tto_svc (UNIT *uptr);
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t_stat tty_reset (DEVICE *dptr);
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t_stat tty_set_opt (UNIT *uptr, int32 val, char *cptr, void *desc);
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int32 clkio (int32 inst, int32 IR, int32 dat);
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t_stat clk_svc (UNIT *uptr);
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t_stat clk_reset (DEVICE *dptr);
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int32 clk_delay (int32 flg);
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t_stat tto_out (int32 c);
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t_stat ttp_out (int32 c);
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/* PTR data structures
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ptr_dev PTR device descriptor
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ptr_unit PTR unit descriptor
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ptr_mod PTR modifiers
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ptr_reg PTR register list
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*/
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DIB ptr_dib = { PTR, 0, 0, 0, 0, 0, &ptrio };
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UNIT ptr_unit = {
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UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
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SERIAL_IN_WAIT };
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REG ptr_reg[] = {
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{ ORDATA (BUF, ptr_unit.buf, 8) },
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{ FLDATA (CMD, ptr_dib.cmd, 0) },
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{ FLDATA (CTL, ptr_dib.ctl, 0) },
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{ FLDATA (FLG, ptr_dib.flg, 0) },
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{ FLDATA (FBF, ptr_dib.fbf, 0) },
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{ FLDATA (SRQ, ptr_dib.srq, 0) },
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{ DRDATA (TRLCTR, ptr_trlcnt, 8), REG_HRO },
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{ DRDATA (TRLLIM, ptr_trllim, 8) },
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{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
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{ ORDATA (DEVNO, ptr_dib.devno, 6), REG_HRO },
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{ NULL } };
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MTAB ptr_mod[] = {
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{ MTAB_XTD | MTAB_VDV, 0, "DEVNO", "DEVNO",
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&hp_setdev, &hp_showdev, &ptr_dev },
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{ 0 } };
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DEVICE ptr_dev = {
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"PTR", &ptr_unit, ptr_reg, ptr_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptr_reset,
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&ptr_boot, &ptr_attach, NULL,
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&ptr_dib, DEV_DISABLE };
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/* PTP data structures
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ptp_dev PTP device descriptor
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ptp_unit PTP unit descriptor
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ptp_mod PTP modifiers
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ptp_reg PTP register list
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*/
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DIB ptp_dib = { PTP, 0, 0, 0, 0, 0, &ptpio };
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UNIT ptp_unit = {
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UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0), SERIAL_OUT_WAIT };
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REG ptp_reg[] = {
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{ ORDATA (BUF, ptp_unit.buf, 8) },
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{ FLDATA (CMD, ptp_dib.cmd, 0) },
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{ FLDATA (CTL, ptp_dib.ctl, 0) },
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{ FLDATA (FLG, ptp_dib.flg, 0) },
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{ FLDATA (FBF, ptp_dib.fbf, 0) },
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{ FLDATA (SRQ, ptp_dib.srq, 0) },
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{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
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{ ORDATA (DEVNO, ptp_dib.devno, 6), REG_HRO },
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{ NULL } };
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MTAB ptp_mod[] = {
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{ MTAB_XTD | MTAB_VDV, 0, "DEVNO", "DEVNO",
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&hp_setdev, &hp_showdev, &ptp_dev },
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{ 0 } };
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DEVICE ptp_dev = {
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"PTP", &ptp_unit, ptp_reg, ptp_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptp_reset,
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NULL, NULL, NULL,
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&ptp_dib, DEV_DISABLE };
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/* TTY data structures
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tty_dev TTY device descriptor
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tty_unit TTY unit descriptor
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tty_reg TTY register list
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tty_mod TTy modifiers list
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*/
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#define TTI 0
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#define TTO 1
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#define TTP 2
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DIB tty_dib = { TTY, 0, 0, 0, 0, 0, &ttyio };
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UNIT tty_unit[] = {
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{ UDATA (&tti_svc, UNIT_UC, 0), KBD_POLL_WAIT },
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{ UDATA (&tto_svc, UNIT_UC, 0), SERIAL_OUT_WAIT },
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{ UDATA (&tto_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT } };
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REG tty_reg[] = {
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{ ORDATA (BUF, tty_buf, 8) },
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{ ORDATA (MODE, tty_mode, 16) },
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{ ORDATA (SHIN, tty_shin, 8), REG_HRO },
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{ FLDATA (CMD, tty_dib.cmd, 0), REG_HRO },
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{ FLDATA (CTL, tty_dib.ctl, 0) },
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{ FLDATA (FLG, tty_dib.flg, 0) },
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{ FLDATA (FBF, tty_dib.fbf, 0) },
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{ FLDATA (SRQ, tty_dib.srq, 0) },
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{ FLDATA (KLFP, tty_lf, 0), REG_HRO },
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{ DRDATA (KPOS, tty_unit[TTI].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (KTIME, tty_unit[TTI].wait, 24), REG_NZ + PV_LEFT },
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{ DRDATA (TPOS, tty_unit[TTO].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (TTIME, tty_unit[TTO].wait, 24), REG_NZ + PV_LEFT },
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{ DRDATA (PPOS, tty_unit[TTP].pos, T_ADDR_W), PV_LEFT },
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{ FLDATA (STOP_IOE, ttp_stopioe, 0) },
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{ ORDATA (DEVNO, tty_dib.devno, 6), REG_HRO },
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{ NULL } };
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MTAB tty_mod[] = {
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{ UNIT_UC+UNIT_8B, UNIT_UC, "UC", "UC", &tty_set_opt,
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NULL, ((void *) (UNIT_UC + UNIT_8B)) },
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{ UNIT_UC+UNIT_8B, 0 , "7b", "7B", &tty_set_opt,
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NULL, ((void *) (UNIT_UC + UNIT_8B)) },
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{ UNIT_UC+UNIT_8B, UNIT_8B, "8b", "8B", &tty_set_opt,
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NULL, ((void *) (UNIT_UC + UNIT_8B)) },
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{ UNIT_AUTOLF, UNIT_AUTOLF, "autolf", "AUTOLF", &tty_set_opt,
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NULL, ((void *) UNIT_AUTOLF) },
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{ UNIT_AUTOLF, 0 , NULL, "NOAUTOLF", &tty_set_opt,
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NULL, ((void *) UNIT_AUTOLF) },
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{ MTAB_XTD | MTAB_VDV, 0, "DEVNO", "DEVNO",
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&hp_setdev, &hp_showdev, &tty_dev },
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{ 0 } };
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DEVICE tty_dev = {
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"TTY", tty_unit, tty_reg, tty_mod,
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3, 10, 31, 1, 8, 8,
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NULL, NULL, &tty_reset,
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NULL, NULL, NULL,
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&tty_dib, 0 };
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/* CLK data structures
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clk_dev CLK device descriptor
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clk_unit CLK unit descriptor
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clk_mod CLK modifiers
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clk_reg CLK register list
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*/
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DIB clk_dib = { CLK, 0, 0, 0, 0, 0, &clkio };
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UNIT clk_unit = {
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UDATA (&clk_svc, 0, 0) };
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REG clk_reg[] = {
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{ ORDATA (SEL, clk_select, 3) },
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{ DRDATA (CTR, clk_ctr, 14) },
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{ FLDATA (CMD, clk_dib.cmd, 0), REG_HRO },
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{ FLDATA (CTL, clk_dib.ctl, 0) },
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{ FLDATA (FLG, clk_dib.flg, 0) },
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{ FLDATA (FBF, clk_dib.fbf, 0) },
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{ FLDATA (SRQ, clk_dib.srq, 0) },
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{ FLDATA (ERR, clk_error, CLK_V_ERROR) },
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{ BRDATA (TIME, clk_time, 10, 24, 8) },
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{ ORDATA (DEVNO, clk_dib.devno, 6), REG_HRO },
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{ NULL } };
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MTAB clk_mod[] = {
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{ UNIT_DIAG, UNIT_DIAG, "diagnostic mode", "DIAG", NULL },
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{ UNIT_DIAG, 0, "calibrated", "CALIBRATED", NULL },
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{ MTAB_XTD | MTAB_VDV, 0, "DEVNO", "DEVNO",
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&hp_setdev, &hp_showdev, &clk_dev },
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{ 0 } };
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DEVICE clk_dev = {
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"CLK", &clk_unit, clk_reg, clk_mod,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, &clk_reset,
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NULL, NULL, NULL,
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&clk_dib, 0 };
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/* Paper tape reader: IOT routine */
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int32 ptrio (int32 inst, int32 IR, int32 dat)
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{
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int32 dev;
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dev = IR & I_DEVMASK; /* get device no */
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switch (inst) { /* case on opcode */
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case ioFLG: /* flag clear/set */
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if ((IR & I_HC) == 0) { setFSR (dev); } /* STF */
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break;
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case ioSFC: /* skip flag clear */
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if (FLG (dev) == 0) PC = (PC + 1) & VAMASK;
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break;
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case ioSFS: /* skip flag set */
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if (FLG (dev) != 0) PC = (PC + 1) & VAMASK;
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break;
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case ioMIX: /* merge */
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dat = dat | ptr_unit.buf;
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break;
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case ioLIX: /* load */
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dat = ptr_unit.buf;
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break;
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case ioCTL: /* control clear/set */
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if (IR & I_CTL) { /* CLC */
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clrCMD (dev); /* clear cmd, ctl */
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clrCTL (dev); }
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else { /* STC */
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setCMD (dev); /* set cmd, ctl */
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setCTL (dev);
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sim_activate (&ptr_unit, ptr_unit.wait); }
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break;
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default:
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break; }
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if (IR & I_HC) { clrFSR (dev); } /* H/C option */
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return dat;
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}
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/* Unit service */
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t_stat ptr_svc (UNIT *uptr)
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{
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int32 dev, temp;
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dev = ptr_dib.devno; /* get device no */
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clrCMD (dev); /* clear cmd */
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if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptr_stopioe, SCPE_UNATT);
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if ((temp = getc (ptr_unit.fileref)) == EOF) { /* read byte, error? */
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if (feof (ptr_unit.fileref)) { /* end of file? */
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if (ptr_trlcnt >= ptr_trllim) { /* added all trailer? */
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if (ptr_stopioe) { /* stop on error? */
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printf ("PTR end of file\n");
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return SCPE_IOERR; }
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else return SCPE_OK; } /* no, just hang */
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ptr_trlcnt++; /* count trailer */
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temp = 0; } /* read a zero */
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else { /* no, real error */
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perror ("PTR I/O error");
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clearerr (ptr_unit.fileref);
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return SCPE_IOERR; }
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}
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setFSR (dev); /* set flag */
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ptr_unit.buf = temp & 0377; /* put byte in buf */
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ptr_unit.pos = ftell (ptr_unit.fileref);
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return SCPE_OK;
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}
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/* Attach routine - clear the trailer counter */
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t_stat ptr_attach (UNIT *uptr, char *cptr)
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{
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ptr_trlcnt = 0;
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return attach_unit (uptr, cptr);
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}
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/* Reset routine - called from SCP, flags in DIB's */
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t_stat ptr_reset (DEVICE *dptr)
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{
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ptr_dib.cmd = ptr_dib.ctl = 0; /* clear cmd, ctl */
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ptr_dib.flg = ptr_dib.fbf = ptr_dib.srq = 1; /* set flg, fbf, srq */
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||
ptr_unit.buf = 0;
|
||
sim_cancel (&ptr_unit); /* deactivate unit */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Paper tape reader bootstrap routine (HP 12992K ROM) */
|
||
|
||
const uint16 ptr_rom[IBL_LNT] = {
|
||
0107700, /*ST CLC 0,C ; intr off */
|
||
0002401, /* CLA,RSS ; skip in */
|
||
0063756, /*CN LDA M11 ; feed frame */
|
||
0006700, /* CLB,CCE ; set E to rd byte */
|
||
0017742, /* JSB READ ; get #char */
|
||
0007306, /* CMB,CCE,INB,SZB ; 2's comp */
|
||
0027713, /* JMP *+5 ; non-zero byte */
|
||
0002006, /* INA,SZA ; feed frame ctr */
|
||
0027703, /* JMP *-3 */
|
||
0102077, /* HLT 77B ; stop */
|
||
0027700, /* JMP ST ; next */
|
||
0077754, /* STA WC ; word in rec */
|
||
0017742, /* JSB READ ; get feed frame */
|
||
0017742, /* JSB READ ; get address */
|
||
0074000, /* STB 0 ; init csum */
|
||
0077755, /* STB AD ; save addr */
|
||
0067755, /*CK LDB AD ; check addr */
|
||
0047777, /* ADB MAXAD ; below loader */
|
||
0002040, /* SEZ ; E =0 => OK */
|
||
0027740, /* JMP H55 */
|
||
0017742, /* JSB READ ; get word */
|
||
0040001, /* ADA 1 ; cont checksum */
|
||
0177755, /* STA AD,I ; store word */
|
||
0037755, /* ISZ AD */
|
||
0000040, /* CLE ; force wd read */
|
||
0037754, /* ISZ WC ; block done? */
|
||
0027720, /* JMP CK ; no */
|
||
0017742, /* JSB READ ; get checksum */
|
||
0054000, /* CPB 0 ; ok? */
|
||
0027702, /* JMP CN ; next block */
|
||
0102011, /* HLT 11 ; bad csum */
|
||
0027700, /* JMP ST ; next */
|
||
0102055, /*H55 HALT 55 ; bad address */
|
||
0027700, /* JMP ST ; next */
|
||
0000000, /*RD 0 */
|
||
0006600, /* CLB,CME ; E reg byte ptr */
|
||
0103710, /* STC RDR,C ; start reader */
|
||
0102310, /* SFS RDR ; wait */
|
||
0027745, /* JMP *-1 */
|
||
0106410, /* MIB RDR ; get byte */
|
||
0002041, /* SEZ,RSS ; E set? */
|
||
0127742, /* JMP RD,I ; no, done */
|
||
0005767, /* BLF,CLE,BLF ; shift byte */
|
||
0027744, /* JMP RD+2 ; again */
|
||
0000000, /*WC 000000 ; word count */
|
||
0000000, /*AD 000000 ; address */
|
||
0177765, /*M11 -11 ; feed count */
|
||
0, 0, 0, 0, 0, 0, 0, 0, /* unused */
|
||
0, 0, 0, 0, 0, 0, 0, /* unused */
|
||
0000000 }; /*MAXAD -ST ; max addr */
|
||
|
||
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
|
||
{
|
||
int32 dev;
|
||
|
||
dev = ptr_dib.devno; /* get device no */
|
||
if (ibl_copy (ptr_rom, dev)) return SCPE_IERR; /* copy boot to memory */
|
||
SR = (SR & IBL_OPT) | IBL_PTR | (dev << IBL_V_DEV); /* set SR */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Paper tape punch: IOT routine */
|
||
|
||
int32 ptpio (int32 inst, int32 IR, int32 dat)
|
||
{
|
||
int32 dev;
|
||
|
||
dev = IR & I_DEVMASK; /* get device no */
|
||
switch (inst) { /* case on opcode */
|
||
case ioFLG: /* flag clear/set */
|
||
if ((IR & I_HC) == 0) { setFSR (dev); } /* STF */
|
||
break;
|
||
case ioSFC: /* skip flag clear */
|
||
if (FLG (dev) == 0) PC = (PC + 1) & VAMASK;
|
||
break;
|
||
case ioSFS: /* skip flag set */
|
||
if (FLG (dev) != 0) PC = (PC + 1) & VAMASK;
|
||
break;
|
||
case ioLIX: /* load */
|
||
dat = 0;
|
||
case ioMIX: /* merge */
|
||
if ((ptp_unit.flags & UNIT_ATT) == 0)
|
||
dat = dat | PTP_LOW; /* out of tape? */
|
||
break;
|
||
case ioOTX: /* output */
|
||
ptp_unit.buf = dat;
|
||
break;
|
||
case ioCTL: /* control clear/set */
|
||
if (IR & I_CTL) { /* CLC */
|
||
clrCMD (dev); /* clear cmd, ctl */
|
||
clrCTL (dev); }
|
||
else { /* STC */
|
||
setCMD (dev); /* set cmd, ctl */
|
||
setCTL (dev);
|
||
sim_activate (&ptp_unit, ptp_unit.wait); }
|
||
break;
|
||
default:
|
||
break; }
|
||
if (IR & I_HC) { clrFSR (dev); } /* H/C option */
|
||
return dat;
|
||
}
|
||
|
||
/* Unit service */
|
||
|
||
t_stat ptp_svc (UNIT *uptr)
|
||
{
|
||
int32 dev;
|
||
|
||
dev = ptp_dib.devno; /* get device no */
|
||
clrCMD (dev); /* clear cmd */
|
||
setFSR (dev); /* set flag */
|
||
if ((ptp_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||
return IORETURN (ptp_stopioe, SCPE_UNATT);
|
||
if (putc (ptp_unit.buf, ptp_unit.fileref) == EOF) { /* output byte */
|
||
perror ("PTP I/O error");
|
||
clearerr (ptp_unit.fileref);
|
||
return SCPE_IOERR; }
|
||
ptp_unit.pos = ftell (ptp_unit.fileref); /* update position */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat ptp_reset (DEVICE *dptr)
|
||
{
|
||
ptp_dib.cmd = ptp_dib.ctl = 0; /* clear cmd, ctl */
|
||
ptp_dib.flg = ptp_dib.fbf = ptp_dib.srq = 1; /* set flg, fbf, srq */
|
||
ptp_unit.buf = 0;
|
||
sim_cancel (&ptp_unit); /* deactivate unit */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Terminal: IOT routine */
|
||
|
||
int32 ttyio (int32 inst, int32 IR, int32 dat)
|
||
{
|
||
int32 dev;
|
||
|
||
dev = IR & I_DEVMASK; /* get device no */
|
||
switch (inst) { /* case on opcode */
|
||
case ioFLG: /* flag clear/set */
|
||
if ((IR & I_HC) == 0) { setFSR (dev); } /* STF */
|
||
break;
|
||
case ioSFC: /* skip flag clear */
|
||
if (FLG (dev) == 0) PC = (PC + 1) & VAMASK;
|
||
break;
|
||
case ioSFS: /* skip flag set */
|
||
if (FLG (dev) != 0) PC = (PC + 1) & VAMASK;
|
||
break;
|
||
case ioLIX: /* load */
|
||
dat = 0;
|
||
case ioMIX: /* merge */
|
||
dat = dat | tty_buf;
|
||
if (!(tty_mode & TM_KBD) && sim_is_active (&tty_unit[TTO]))
|
||
dat = dat | TP_BUSY;
|
||
break;
|
||
case ioOTX: /* output */
|
||
if (dat & TM_MODE) tty_mode = dat & (TM_KBD|TM_PRI|TM_PUN);
|
||
tty_buf = dat & 0377;
|
||
break;
|
||
case ioCTL: /* control clear/set */
|
||
if (IR & I_CTL) { clrCTL (dev); } /* CLC */
|
||
else { /* STC */
|
||
setCTL (dev);
|
||
if (!(tty_mode & TM_KBD)) /* output? */
|
||
sim_activate (&tty_unit[TTO], tty_unit[TTO].wait); }
|
||
break;
|
||
default:
|
||
break; }
|
||
if (IR & I_HC) { clrFSR (dev); } /* H/C option */
|
||
return dat;
|
||
}
|
||
|
||
/* Unit service routines. Note from Dave Bryan:
|
||
|
||
Referring to the 12531C schematic, the terminal input enters on pin X
|
||
("DATA FROM EIA COMPATIBLE DEVICE"). The signal passes through four
|
||
transistor inversions (Q8, Q1, Q2, and Q3) to appear on pin 12 of NAND gate
|
||
U104C. If the flag flip-flop is not set, the terminal input passes to the
|
||
(inverted) output of U104C and thence to the D input of the first of the
|
||
flip-flops forming the data register.
|
||
|
||
In the idle condition (no key pressed), the terminal input line is marking
|
||
(voltage negative), so in passing through a total of five inversions, a
|
||
logic one is presented at the serial input of the data register. During an
|
||
output operation, the register is parallel loaded and serially shifted,
|
||
sending the output data through the register to the device and -- this is
|
||
the crux -- filling the register with logic ones from U104C.
|
||
|
||
At the end of the output operation, the card flag is set, an interrupt
|
||
occurs, and the RTE driver is entered. The driver then does an LIA SC to
|
||
read the contents of the data register. If no key has been pressed during
|
||
the output operation, the register will read as all ones (octal 377). If,
|
||
however, any key was struck, at least one zero bit will be present. If the
|
||
register value doesn't equal 377, the driver sets the system "operator
|
||
attention" flag, which will cause RTE to output the asterisk and initiate a
|
||
terminal read when the current output line is completed. */
|
||
|
||
t_stat tti_svc (UNIT *uptr)
|
||
{
|
||
int32 c, dev;
|
||
|
||
dev = tty_dib.devno; /* get device no */
|
||
sim_activate (&tty_unit[TTI], tty_unit[TTI].wait); /* continue poll */
|
||
tty_shin = 0377; /* assume inactive */
|
||
if (tty_lf) { /* auto lf pending? */
|
||
c = 012; /* force lf */
|
||
tty_lf = 0; }
|
||
else { if ((c = sim_poll_kbd ()) < SCPE_KFLAG) return c; /* no char or error? */
|
||
if (c & SCPE_BREAK) c = 0; /* break? */
|
||
else if (tty_unit[TTI].flags & UNIT_UC) { /* UC only? */
|
||
c = c & 0177;
|
||
if (islower (c)) c = toupper (c); }
|
||
else c = c & ((tty_unit[TTI].flags & UNIT_8B)? 0377: 0177);
|
||
tty_lf = ((c & 0177) == 015) && (uptr->flags & UNIT_AUTOLF);
|
||
}
|
||
if (tty_mode & TM_KBD) { /* keyboard enabled? */
|
||
tty_buf = c; /* put char in buf */
|
||
tty_unit[TTI].pos = tty_unit[TTI].pos + 1;
|
||
setFSR (dev); /* set flag */
|
||
if (c) {
|
||
tto_out (c); /* echo? */
|
||
return ttp_out (c); } } /* punch? */
|
||
else tty_shin = c; /* no, char shifts in */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat tto_svc (UNIT *uptr)
|
||
{
|
||
int32 c, dev;
|
||
t_stat r;
|
||
|
||
c = tty_buf; /* get char */
|
||
tty_buf = tty_shin; /* shift in */
|
||
tty_shin = 0377; /* line inactive */
|
||
if ((r = tto_out (c)) != SCPE_OK) { /* output; error? */
|
||
sim_activate (uptr, uptr->wait); /* retry */
|
||
return ((r == SCPE_STALL)? SCPE_OK: r); } /* !stall? report */
|
||
dev = tty_dib.devno; /* get device no */
|
||
setFSR (dev); /* set done flag */
|
||
return ttp_out (c); /* punch if enabled */
|
||
}
|
||
|
||
t_stat tto_out (int32 c)
|
||
{
|
||
t_stat r;
|
||
|
||
if (tty_mode & TM_PRI) { /* printing? */
|
||
if (tty_unit[TTO].flags & UNIT_UC) { /* UC only? */
|
||
c = c & 0177;
|
||
if (islower (c)) c = toupper (c); }
|
||
else c = c & ((tty_unit[TTO].flags & UNIT_8B)? 0377: 0177);
|
||
if (c || (tty_unit[TTO].flags & UNIT_8B)) { /* !null or 8b? */
|
||
if (r = sim_putchar_s (c)) return r; /* output char */
|
||
tty_unit[TTO].pos = tty_unit[TTO].pos + 1; }
|
||
}
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat ttp_out (int32 c)
|
||
{
|
||
if (tty_mode & TM_PUN) { /* punching? */
|
||
if ((tty_unit[TTP].flags & UNIT_ATT) == 0) /* attached? */
|
||
return IORETURN (ttp_stopioe, SCPE_UNATT);
|
||
if (putc (c, tty_unit[TTP].fileref) == EOF) { /* output char */
|
||
perror ("TTP I/O error");
|
||
clearerr (tty_unit[TTP].fileref);
|
||
return SCPE_IOERR; }
|
||
tty_unit[TTP].pos = ftell (tty_unit[TTP].fileref); }
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat tty_reset (DEVICE *dptr)
|
||
{
|
||
tty_dib.cmd = tty_dib.ctl = 0; /* clear cmd, ctl */
|
||
tty_dib.flg = tty_dib.fbf = tty_dib.srq = 1; /* set flg, fbf, srq */
|
||
tty_mode = TM_KBD; /* enable input */
|
||
tty_buf = 0;
|
||
tty_shin = 0377; /* input inactive */
|
||
tty_lf = 0; /* no lf pending */
|
||
sim_activate (&tty_unit[TTI], tty_unit[TTI].wait); /* activate poll */
|
||
sim_cancel (&tty_unit[TTO]); /* cancel output */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
t_stat tty_set_opt (UNIT *uptr, int32 val, char *cptr, void *desc)
|
||
{
|
||
int32 u = uptr - tty_dev.units;
|
||
int32 mask = (int32) desc;
|
||
|
||
if (u > 1) return SCPE_NOFNC;
|
||
tty_unit[TTI].flags = (tty_unit[TTI].flags & ~mask) | val;
|
||
tty_unit[TTO].flags = (tty_unit[TTO].flags & ~mask) | val;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Clock: IOT routine */
|
||
|
||
int32 clkio (int32 inst, int32 IR, int32 dat)
|
||
{
|
||
int32 dev;
|
||
|
||
dev = IR & I_DEVMASK; /* get device no */
|
||
switch (inst) { /* case on opcode */
|
||
case ioFLG: /* flag clear/set */
|
||
if ((IR & I_HC) == 0) { setFSR (dev); } /* STF */
|
||
break;
|
||
case ioSFC: /* skip flag clear */
|
||
if (FLG (dev) == 0) PC = (PC + 1) & VAMASK;
|
||
break;
|
||
case ioSFS: /* skip flag set */
|
||
if (FLG (dev) != 0) PC = (PC + 1) & VAMASK;
|
||
break;
|
||
case ioMIX: /* merge */
|
||
dat = dat | clk_error;
|
||
break;
|
||
case ioLIX: /* load */
|
||
dat = clk_error;
|
||
break;
|
||
case ioOTX: /* output */
|
||
clk_select = dat & 07; /* save select */
|
||
sim_cancel (&clk_unit); /* stop the clock */
|
||
clrCTL (dev); /* clear control */
|
||
break;
|
||
case ioCTL: /* control clear/set */
|
||
if (IR & I_CTL) { /* CLC */
|
||
clrCTL (dev); /* turn off clock */
|
||
sim_cancel (&clk_unit); } /* deactivate unit */
|
||
else { /* STC */
|
||
setCTL (dev); /* set CTL */
|
||
if (!sim_is_active (&clk_unit)) { /* clock running? */
|
||
sim_activate (&clk_unit,
|
||
sim_rtc_init (clk_delay (0))); /* no, start clock */
|
||
clk_ctr = clk_delay (1); } /* set repeat ctr */
|
||
clk_error = 0; } /* clear error */
|
||
break;
|
||
default:
|
||
break; }
|
||
if (IR & I_HC) { clrFSR (dev); } /* H/C option */
|
||
return dat;
|
||
}
|
||
|
||
/* Unit service */
|
||
|
||
t_stat clk_svc (UNIT *uptr)
|
||
{
|
||
int32 tim, dev;
|
||
|
||
dev = clk_dib.devno; /* get device no */
|
||
if (!CTL (dev)) return SCPE_OK; /* CTL off? done */
|
||
if (clk_unit.flags & UNIT_DIAG) /* diag mode? */
|
||
tim = clk_delay (0); /* get fixed delay */
|
||
else tim = sim_rtc_calb (clk_tps[clk_select]); /* calibrate delay */
|
||
sim_activate (uptr, tim); /* reactivate */
|
||
clk_ctr = clk_ctr - 1; /* decrement counter */
|
||
if (clk_ctr <= 0) { /* end of interval? */
|
||
tim = FLG (dev);
|
||
if (FLG (dev)) clk_error = CLK_ERROR; /* overrun? error */
|
||
else { setFSR (dev); } /* else set flag */
|
||
clk_ctr = clk_delay (1); } /* reset counter */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat clk_reset (DEVICE *dptr)
|
||
{
|
||
clk_dib.cmd = clk_dib.ctl = 0; /* clear cmd, ctl */
|
||
clk_dib.flg = clk_dib.fbf = clk_dib.srq = 1; /* set flg, fbf, srq */
|
||
clk_error = 0; /* clear error */
|
||
clk_select = 0; /* clear select */
|
||
clk_ctr = 0; /* clear counter */
|
||
sim_cancel (&clk_unit); /* deactivate unit */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Clock delay routine */
|
||
|
||
int32 clk_delay (int32 flg)
|
||
{
|
||
int32 sel = clk_select;
|
||
|
||
if ((clk_unit.flags & UNIT_DIAG) && (sel >= 4)) sel = sel - 3;
|
||
if (flg) return clk_rpt[sel];
|
||
else return clk_time[sel];
|
||
}
|