202 lines
6.4 KiB
C
202 lines
6.4 KiB
C
/* sage_cpu.c: CPU simulator for sage-II/IV system
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Copyright (c) 20092010 Holger Veit
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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Holger Veit BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Holger Veit et al shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Holger Veit et al.
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04-Oct-09 HV Initial version
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*/
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#include "sage_defs.h"
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static t_stat sagecpu_reset(DEVICE* dptr);
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static t_stat sagecpu_boot(int unit,DEVICE* dptr);
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static t_stat sage_translateaddr(t_addr in,t_addr* out, IOHANDLER** ioh,int rw,int fc,int dma);
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static t_stat sage_mem(t_addr addr,uint8** mem);
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static t_stat sagecpu_set_bios(UNIT *uptr, int32 value, CONST char *cptr, void *desc);
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static t_stat sagecpu_show_bios(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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static uint8* ROM = 0;
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static int rom_enable = TRUE; /* LS74 U51 in CPU schematic */
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extern int32 DR[];
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extern t_addr AR[];
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#define UNIT_CPU_V_BIOS UNIT_CPU_V_FREE /* has custom BIOS */
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#define UNIT_CPU_BIOS (1 << UNIT_CPU_V_BIOS)
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#define MAX_ROMSIZE 16384
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char* biosfile = NULL;
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static MTAB sagecpu_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "BIOS", "BIOS", &sagecpu_set_bios, &sagecpu_show_bios },
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M68KCPU_STDMOD,
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{ 0 }
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};
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UNIT sagecpu_unit = {
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UDATA (NULL, UNIT_FIX|UNIT_BINK|CPU_TYPE_68000|UNIT_CPU_EXC|UNIT_CPU_STOP|UNIT_CPU_PRVIO, SAGEMEM)
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};
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#define DBG_CPU_OSCPM DBG_CPU_CUSTOM1
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DEBTAB sagecpu_dt[] = {
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{ "EXC", DBG_CPU_EXC },
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{ "PC", DBG_CPU_PC },
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{ "INT", DBG_CPU_INT },
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{ "CTRACE", DBG_CPU_CTRACE },
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{ "BTRACE", DBG_CPU_BTRACE },
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{ "OSCPM", DBG_CPU_OSCPM },
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{ NULL, 0 }
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};
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DEVICE sagecpu_dev = {
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"CPU", &sagecpu_unit, m68kcpu_reg, sagecpu_mod,
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1, 16, 32, 2, 16, 16,
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&m68kcpu_ex, &m68kcpu_dep, &sagecpu_reset,
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&sagecpu_boot, NULL, NULL,
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NULL, DEV_DEBUG, 0,
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sagecpu_dt, NULL, NULL
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};
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static t_stat sagecpu_set_bios(UNIT *uptr, int32 value, CONST char *cptr, void *desc)
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{
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FILE* fp;
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if (cptr==NULL) return SCPE_ARG;
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if ((fp=fopen(cptr,"r"))==0) return SCPE_OPENERR;
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fclose(fp);
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biosfile = (char *)realloc(biosfile, strlen(cptr)+1);
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strcpy(biosfile,cptr);
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/* enforce reload of BIOS code on next boot */
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if (ROM != 0) free(ROM);
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ROM = 0;
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return SCPE_OK;
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}
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static t_stat sagecpu_show_bios(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
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{
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fprintf(st, "BIOS=%s", biosfile);
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return SCPE_OK;
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}
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t_stat sagecpu_boot(int32 unitno,DEVICE* dptr)
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{
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t_stat rc;
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if (!ROM) return SCPE_IERR;
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if (*ROM==0) {
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printf("Loading boot code from %s\n",biosfile);
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if ((rc = load_cmd(0,biosfile)) != SCPE_OK) return rc;
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}
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return m68kcpu_boot(unitno,dptr);
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}
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/* special logic: capture essential TRAP 8-14 for debugging */
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static void sage_trapcallback(DEVICE* dptr,int trapnum)
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{
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if ((dptr->dctrl & DBG_CPU_OSCPM) && sim_deb) {
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if (trapnum>=0x08 && trapnum<=0x0e) {
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fprintf(sim_deb,"SAGE: TRAP #%x: D0=%x A0=%x\n",trapnum,DR[0],AR[0]);
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}
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if (trapnum==2) {
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fprintf(sim_deb,"SAGE: CPM BDOS #%d D1=0x%x D2=0x%x\n",DR[0]&0xff,DR[1],DR[2]);
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}
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if (trapnum==3) {
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fprintf(sim_deb,"SAGE: CPM BIOS #%d D1=0x%x D2=0x%x\n",DR[0]&0xff,DR[1],DR[2]);
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}
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}
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}
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static t_stat sagecpu_reset(DEVICE* dptr)
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{
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t_stat rc;
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extern void m68k_sim_init(void);
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m68k_sim_init();
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/* set CPU pointers */
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m68kcpu_dev = &sagecpu_dev;
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m68kcpu_unit = &sagecpu_unit;
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/* redefine memory handlers */
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TranslateAddr = &sage_translateaddr;
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Mem = &sage_mem;
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if (!biosfile)
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#ifdef SAGE_IV
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sagecpu_set_bios(NULL, 0, "sage-iv.hex", NULL);
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#else
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sagecpu_set_bios(NULL, 0, "sage-ii.hex", NULL);
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#endif
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if (!ROM) ROM = (uint8*)calloc(MAX_ROMSIZE,1);
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rom_enable = TRUE;
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if ((rc=m68kcpu_reset(dptr)) != SCPE_OK) return rc;
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/* redirect callbacks */
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m68kcpu_trapcallback = &sage_trapcallback;
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return SCPE_OK;
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}
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uint8 ioemul[4] = { 0,0,0,0 };
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/* sage memory */
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static t_stat sage_mem(t_addr addr,uint8** mem)
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{
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t_addr a;
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// printf("Try to access %x\n",addr); fflush(stdout);
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if (rom_enable && (addr < MAX_ROMSIZE)) { /* boot rom mapped to zero page */
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*mem = ROM+addr;
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return SCPE_OK;
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}
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a = addr - 0xfe0000; /* boot rom at normal ROM page */
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if (a < MAX_ROMSIZE) {
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rom_enable = FALSE;
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*mem = ROM+a;
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return SCPE_OK;
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}
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a = addr - 0xffc0fe;
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if (a < 2) { /* boot rom diagnostic address: black hole */
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ioemul[0] = ioemul[1] = 0;
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*mem = ioemul+a;
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return SCPE_OK;
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}
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a = addr - 0xff0000;
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if (a < 0x10000) {
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*mem = ioemul;
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return SCPE_OK;
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}
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if (addr > MEMORYSIZE) return SIM_NOMEM;
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return m68k_mem(addr,mem);
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}
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t_stat sage_translateaddr(t_addr in,t_addr* out, IOHANDLER** ioh,int rw,int fc,int dma)
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{
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static uint32 bptype[] = { R_BKPT_SPC|SWMASK('R'), W_BKPT_SPC|SWMASK('W') };
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t_addr ma = in & addrmask;
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if (sim_brk_summ && sim_brk_test(ma, bptype[rw])) return STOP_IBKPT;
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return m68k_translateaddr(in,out,ioh,rw,fc,dma);
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}
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