87c3e3452f
I’ve always wanted to have the option to have simulated devices behave
more naturally with respect to I/O operations. By more naturally I
mean that the current simulator model I/O is either polled (for asynchronous
things link Muxes and Network), or it is performed in the middle of some
instruction execution taking possibly many milliseconds (disk and/or tapes).
The existing model creates quite deterministic behavior which helps to debug
and understand issues, but it trades off potential instruction execution
while performing these I/O operations in between instruction execution.
To address this concept (while still retaining the potential advantages of
the original model), I’ve designed an Asynch I/O model extension for simh.
In order to flesh-out and debug this design, I’ve also refactored several
devices to utilize this capability. Please read the attached
0readmeAsynchIO.txt file for concept details about the approach.
In order to make disk devices easy to implement (within or without the
AsynchIO framework), I’ve created a sim_disk.c library which is modeled
on the sim_tape.c library to generalize disk I/O like tape I/O is
generalized in sim_tape.c. This sim_disk.c library now provides that
natural place to implement support for various disk implementation formats
(just like sim_tape support several formats, and one day will be the place
to add direct physical tape access). The current sim_disk library provides
the framework for direct support of 3 different disk formats:
1) standard simh disk format
2) platform specific physical disk access
and 3) platform independent Virtual Disk format.
The Virtual Disk format is an implementation of the format described in
the ”Microsoft Virtual Hard Disk (VHD) Image Format Specification”. The
VHD specification is available for anyone to implement under the "Microsoft
Open Specification Promise" described at
http://www.microsoft.com/interop/osp/default.mspx.
The VHD implementation includes support for:
1) Fixed sized disks
2) Dynamically expanding disks
and 3) Differencing Disks.
Dynamically expanding disks don’t change their “Virtual Size”, but they
don’t consume disk space on the containing storage until the virtual
sectors in the disk are actually written to (i.e. an RA81 or RA92 VHD
with a VMS installed on it may initially only contain 30+ MB of files,
and the resulting VHD will be 30+ MB). The VHD format contains meta data
which describes the virtual device. Amongst this meta data is the simh
device type which the VHD was originally created as. This metadata is
therefore available whenever that VHD is attached to an emulated disk
device in the future so the device type & size can be automatically be
configured.
Sim_disk_attach is used by device emulations to attach a simh/vhd/raw
device to a simulated device. The following simh command switches
are used by the sim_disk_attach API:
-R Attach Read Only.
-E Must Exist (if not specified an attempt to create the
indicated virtual disk will be attempted).
-F Open the indicated disk container in a specific format
(default is to autodetect VHD defaulting to simh if the
indicated container is not a VHD).
-X When creating a VHD, create a fixed sized VHD (vs a
Dynamically expanding one).
-C Create a VHD and copy its contents from another disk
(simh, VHD, or RAW format).
-D Create a Differencing VHD (relative to an already
existing VHD disk)
Examples:
sim> show rq
RQ, address=20001468-2000146B*, no vector, 4 units
RQ0, 159MB, not attached, write enabled, RD54, autosize, SIMH format
RQ1, 159MB, not attached, write enabled, RD54, autosize, SIMH format
RQ2, 159MB, not attached, write enabled, RD54, autosize, SIMH format
RQ3, 409KB, not attached, write enabled, RX50, autosize, SIMH format
sim> atta rq0 RA81.vhd
sim> show rq0
RQ0, 456MB, attached to RA81.vhd, write enabled, RA81, autosize, VHD format
sim> set rq2 ra92
sim> att rq2 -f vhd RA92.vhd
RQ2: creating new file
sim> sho rq2
RQ2, 1505MB, attached to RA92.vhd, write enabled, RA92, autosize, VHD format
sim> ! dir RA92.vhd
Volume in drive H is New Volume
Volume Serial Number is F8DE-510C
Directory of H:\Data
04/14/2011 12:57 PM 5,120 RA92.vhd
1 File(s) 5,120 bytes
0 Dir(s) 3,074,412,544 bytes free
sim> atta rq3 -c RA92-1.vhd RA92.vhd
sim> atta rq3 -c RA92-1.vhd RA92.vhd
RQ3: creating new virtual disk 'RA92-1.vhd'
RQ3: Copied 1505MB. 99% complete.
RQ3: Copied 1505MB. Done.
sim> sh rq3
RQ3, 1505MB, attached to RA92-1.vhd, write enabled, RA92, autosize, VHD format
sim> ! dir RA92*
Volume in drive H is New Volume
Volume Serial Number is F8DE-510C
Directory of H:\Data
04/14/2011 01:12 PM 5,120 RA92-1.vhd
04/14/2011 12:58 PM 5,120 RA92.vhd
2 File(s) 10,240 bytes
0 Dir(s) 3,074,404,352 bytes free
sim> sho rq2
RQ2, 1505MB, not attached, write enabled, RA92, autosize, VHD format
sim> set rq2 ra81
sim> set rq2 noauto
sim> sho rq2
RQ2, 456MB, not attached, write enabled, RA81, noautosize, VHD format
sim> set rq2 format=simh
sim> sho rq2
RQ2, 456MB, not attached, write enabled, RA81, noautosize, SIMH format
sim> atta rq2 -c RA81-Copy.vhd VMS055.dsk
RQ2: creating new virtual disk 'RA81-Copy.vhd'
RQ2: Copied 456MB. 99% complete.
RQ2: Copied 456MB. Done.
sim> sho rq2
RQ2, 456MB, attached to RA81-Copy.vhd, write enabled, RA81, noautosize, VHD format
sim> det rq2
sim> ! dir RA81-Copy.vhd
Volume in drive H is New Volume
Volume Serial Number is F8DE-510C
Directory of H:\Data
04/14/2011 01:22 PM 178,304,512 RA81-Copy.vhd
1 File(s) 178,304,512 bytes
0 Dir(s) 2,896,097,280 bytes free
sim> ! dir VMS055.dsk
Volume in drive H is New Volume
Volume Serial Number is F8DE-510C
Directory of H:\Data
03/08/2011 01:42 PM 403,663,872 VMS055.dsk
1 File(s) 403,663,872 bytes
0 Dir(s) 2,896,097,280 bytes free
sim>
700 lines
37 KiB
C
700 lines
37 KiB
C
/* sim_defs.h: simulator definitions
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Copyright (c) 1993-2008, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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05-Jan-11 MP Added Asynch I/O support
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21-Jul-08 RMS Removed inlining support
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28-May-08 RMS Added inlining support
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28-Jun-07 RMS Added IA64 VMS support (from Norm Lastovica)
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18-Jun-07 RMS Added UNIT_IDLE flag
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18-Mar-07 RMS Added UNIT_TEXT flag
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07-Mar-07 JDB Added DEBUG_PRJ macro
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18-Oct-06 RMS Added limit check for clock synchronized keyboard waits
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13-Jul-06 RMS Guarantee CBUFSIZE is at least 256
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07-Jan-06 RMS Added support for breakpoint spaces
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Added REG_FIT flag
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16-Aug-05 RMS Fixed C++ declaration and cast problems
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11-Mar-05 RMS Moved 64b data type definitions outside USE_INT64
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07-Feb-05 RMS Added assertion fail stop
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05-Nov-04 RMS Added support for SHOW opt=val
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20-Oct-04 RMS Converted all base types to typedefs
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21-Sep-04 RMS Added switch to flag stop message printout
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06-Feb-04 RMS Moved device and unit user flags fields (V3.2)
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RMS Added REG_VMAD
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29-Dec-03 RMS Added output stall status
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15-Jun-03 RMS Added register flag REG_VMIO
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23-Apr-03 RMS Revised for 32b/64b t_addr
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14-Mar-03 RMS Lengthened default serial output wait
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31-Mar-03 RMS Added u5, u6 fields
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18-Mar-03 RMS Added logical name support
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Moved magtape definitions to sim_tape.h
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Moved breakpoint definitions from scp.c
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03-Mar-03 RMS Added sim_fsize
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08-Feb-03 RMS Changed sim_os_sleep to void, added match_ext
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05-Jan-03 RMS Added hidden switch definitions, device dyn memory support,
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parameters for function pointers, case sensitive SET support
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22-Dec-02 RMS Added break flag
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08-Oct-02 RMS Increased simulator error code space
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Added Telnet errors
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Added end of medium support
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Added help messages to CTAB
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Added flag and context fields to DEVICE
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Added restore flag masks
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Revised 64b definitions
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02-May-02 RMS Removed log status codes
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22-Apr-02 RMS Added magtape record length error
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30-Dec-01 RMS Generalized timer package, added circular arrays
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07-Dec-01 RMS Added breakpoint package
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01-Dec-01 RMS Added read-only unit support, extended SET/SHOW features,
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improved error messages
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24-Nov-01 RMS Added unit-based registers
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27-Sep-01 RMS Added queue count prototype
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17-Sep-01 RMS Removed multiple console support
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07-Sep-01 RMS Removed conditional externs on function prototypes
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31-Aug-01 RMS Changed int64 to t_int64 for Windoze
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17-Jul-01 RMS Added additional function prototypes
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27-May-01 RMS Added multiple console support
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15-May-01 RMS Increased string buffer size
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25-Feb-01 RMS Revisions for V2.6
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15-Oct-00 RMS Editorial revisions for V2.5
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11-Jul-99 RMS Added unsigned int data types
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14-Apr-99 RMS Converted t_addr to unsigned
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04-Oct-98 RMS Additional definitions for V2.4
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The interface between the simulator control package (SCP) and the
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simulator consists of the following routines and data structures
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sim_name simulator name string
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sim_devices[] array of pointers to simulated devices
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sim_PC pointer to saved PC register descriptor
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sim_interval simulator interval to next event
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sim_stop_messages[] array of pointers to stop messages
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sim_instr() instruction execution routine
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sim_load() binary loader routine
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sim_emax maximum number of words in an instruction
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In addition, the simulator must supply routines to print and parse
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architecture specific formats
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print_sym print symbolic output
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parse_sym parse symbolic input
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*/
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#ifndef _SIM_DEFS_H_
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#define _SIM_DEFS_H_ 0
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <limits.h>
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#ifndef TRUE
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#define TRUE 1
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#define FALSE 0
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#endif
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/* Length specific integer declarations */
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#if defined (VMS)
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#include <ints.h>
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#else
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typedef signed char int8;
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typedef signed short int16;
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typedef signed int int32;
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typedef unsigned char uint8;
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typedef unsigned short uint16;
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typedef unsigned int uint32;
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#endif
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typedef int t_stat; /* status */
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typedef int t_bool; /* boolean */
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/* 64b integers */
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#if defined (__GNUC__) /* GCC */
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typedef signed long long t_int64;
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typedef unsigned long long t_uint64;
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#elif defined (_WIN32) /* Windows */
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typedef signed __int64 t_int64;
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typedef unsigned __int64 t_uint64;
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#elif (defined (__ALPHA) || defined (__ia64)) && defined (VMS) /* 64b VMS */
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typedef signed __int64 t_int64;
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typedef unsigned __int64 t_uint64;
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#elif defined (__ALPHA) && defined (__unix__) /* Alpha UNIX */
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typedef signed long t_int64;
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typedef unsigned long t_uint64;
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#else /* default */
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#define t_int64 signed long long
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#define t_uint64 unsigned long long
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#endif /* end 64b */
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#if defined (USE_INT64) /* 64b data */
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typedef t_int64 t_svalue; /* signed value */
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typedef t_uint64 t_value; /* value */
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#else /* 32b data */
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typedef int32 t_svalue;
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typedef uint32 t_value;
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#endif /* end 64b data */
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#if defined (USE_INT64) && defined (USE_ADDR64) /* 64b address */
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typedef t_uint64 t_addr;
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#define T_ADDR_W 64
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#else /* 32b address */
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typedef uint32 t_addr;
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#define T_ADDR_W 32
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#endif /* end 64b address */
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/* Stubs for inlining */
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#define SIM_INLINE
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/* System independent definitions */
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#define FLIP_SIZE (1 << 16) /* flip buf size */
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#if !defined (PATH_MAX) /* usually in limits */
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#define PATH_MAX 512
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#endif
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#if (PATH_MAX >= 128)
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#define CBUFSIZE (128 + PATH_MAX) /* string buf size */
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#else
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#define CBUFSIZE 256
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#endif
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/* Breakpoint spaces definitions */
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#define SIM_BKPT_N_SPC 64 /* max number spaces */
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#define SIM_BKPT_V_SPC 26 /* location in arg */
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/* Extended switch definitions (bits >= 26) */
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#define SIM_SW_HIDE (1u << 26) /* enable hiding */
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#define SIM_SW_REST (1u << 27) /* attach/restore */
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#define SIM_SW_REG (1u << 28) /* register value */
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#define SIM_SW_STOP (1u << 29) /* stop message */
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/* Simulator status codes
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0 ok
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1 - (SCPE_BASE - 1) simulator specific
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SCPE_BASE - n general
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*/
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#define SCPE_OK 0 /* normal return */
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#define SCPE_BASE 64 /* base for messages */
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#define SCPE_NXM (SCPE_BASE + 0) /* nxm */
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#define SCPE_UNATT (SCPE_BASE + 1) /* no file */
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#define SCPE_IOERR (SCPE_BASE + 2) /* I/O error */
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#define SCPE_CSUM (SCPE_BASE + 3) /* loader cksum */
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#define SCPE_FMT (SCPE_BASE + 4) /* loader format */
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#define SCPE_NOATT (SCPE_BASE + 5) /* not attachable */
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#define SCPE_OPENERR (SCPE_BASE + 6) /* open error */
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#define SCPE_MEM (SCPE_BASE + 7) /* alloc error */
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#define SCPE_ARG (SCPE_BASE + 8) /* argument error */
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#define SCPE_STEP (SCPE_BASE + 9) /* step expired */
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#define SCPE_UNK (SCPE_BASE + 10) /* unknown command */
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#define SCPE_RO (SCPE_BASE + 11) /* read only */
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#define SCPE_INCOMP (SCPE_BASE + 12) /* incomplete */
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#define SCPE_STOP (SCPE_BASE + 13) /* sim stopped */
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#define SCPE_EXIT (SCPE_BASE + 14) /* sim exit */
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#define SCPE_TTIERR (SCPE_BASE + 15) /* console tti err */
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#define SCPE_TTOERR (SCPE_BASE + 16) /* console tto err */
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#define SCPE_EOF (SCPE_BASE + 17) /* end of file */
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#define SCPE_REL (SCPE_BASE + 18) /* relocation error */
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#define SCPE_NOPARAM (SCPE_BASE + 19) /* no parameters */
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#define SCPE_ALATT (SCPE_BASE + 20) /* already attached */
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#define SCPE_TIMER (SCPE_BASE + 21) /* hwre timer err */
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#define SCPE_SIGERR (SCPE_BASE + 22) /* signal err */
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#define SCPE_TTYERR (SCPE_BASE + 23) /* tty setup err */
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#define SCPE_SUB (SCPE_BASE + 24) /* subscript err */
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#define SCPE_NOFNC (SCPE_BASE + 25) /* func not imp */
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#define SCPE_UDIS (SCPE_BASE + 26) /* unit disabled */
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#define SCPE_NORO (SCPE_BASE + 27) /* rd only not ok */
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#define SCPE_INVSW (SCPE_BASE + 28) /* invalid switch */
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#define SCPE_MISVAL (SCPE_BASE + 29) /* missing value */
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#define SCPE_2FARG (SCPE_BASE + 30) /* too few arguments */
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#define SCPE_2MARG (SCPE_BASE + 31) /* too many arguments */
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#define SCPE_NXDEV (SCPE_BASE + 32) /* nx device */
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#define SCPE_NXUN (SCPE_BASE + 33) /* nx unit */
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#define SCPE_NXREG (SCPE_BASE + 34) /* nx register */
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#define SCPE_NXPAR (SCPE_BASE + 35) /* nx parameter */
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#define SCPE_NEST (SCPE_BASE + 36) /* nested DO */
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#define SCPE_IERR (SCPE_BASE + 37) /* internal error */
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#define SCPE_MTRLNT (SCPE_BASE + 38) /* tape rec lnt error */
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#define SCPE_LOST (SCPE_BASE + 39) /* Telnet conn lost */
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#define SCPE_TTMO (SCPE_BASE + 40) /* Telnet conn timeout */
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#define SCPE_STALL (SCPE_BASE + 41) /* Telnet conn stall */
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#define SCPE_AFAIL (SCPE_BASE + 42) /* assert failed */
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#define SCPE_KFLAG 0010000 /* tti data flag */
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#define SCPE_BREAK 0020000 /* tti break flag */
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/* Print value format codes */
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#define PV_RZRO 0 /* right, zero fill */
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#define PV_RSPC 1 /* right, space fill */
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#define PV_LEFT 2 /* left justify */
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/* Default timing parameters */
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#define KBD_POLL_WAIT 5000 /* keyboard poll */
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#define KBD_MAX_WAIT 500000
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#define SERIAL_IN_WAIT 100 /* serial in time */
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#define SERIAL_OUT_WAIT 100 /* serial output */
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#define NOQUEUE_WAIT 10000 /* min check time */
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#define KBD_LIM_WAIT(x) (((x) > KBD_MAX_WAIT)? KBD_MAX_WAIT: (x))
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#define KBD_WAIT(w,s) ((w)? w: KBD_LIM_WAIT (s))
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/* Convert switch letter to bit mask */
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#define SWMASK(x) (1u << (((int) (x)) - ((int) 'A')))
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/* String match */
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#define MATCH_CMD(ptr,cmd) strncmp ((ptr), (cmd), strlen (ptr))
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/* Device data structure */
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struct sim_device {
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char *name; /* name */
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struct sim_unit *units; /* units */
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struct sim_reg *registers; /* registers */
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struct sim_mtab *modifiers; /* modifiers */
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uint32 numunits; /* #units */
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uint32 aradix; /* address radix */
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uint32 awidth; /* address width */
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uint32 aincr; /* addr increment */
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uint32 dradix; /* data radix */
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uint32 dwidth; /* data width */
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t_stat (*examine)(t_value *v, t_addr a, struct sim_unit *up,
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int32 sw); /* examine routine */
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t_stat (*deposit)(t_value v, t_addr a, struct sim_unit *up,
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int32 sw); /* deposit routine */
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t_stat (*reset)(struct sim_device *dp);/* reset routine */
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t_stat (*boot)(int32 u, struct sim_device *dp);
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/* boot routine */
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t_stat (*attach)(struct sim_unit *up, char *cp);
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/* attach routine */
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t_stat (*detach)(struct sim_unit *up); /* detach routine */
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void *ctxt; /* context */
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uint32 flags; /* flags */
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uint32 dctrl; /* debug control */
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struct sim_debtab *debflags; /* debug flags */
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t_stat (*msize)(struct sim_unit *up, int32 v, char *cp, void *dp);
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/* mem size routine */
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char *lname; /* logical name */
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};
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/* Device flags */
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#define DEV_V_DIS 0 /* dev disabled */
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#define DEV_V_DISABLE 1 /* dev disable-able */
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#define DEV_V_DYNM 2 /* mem size dynamic */
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#define DEV_V_NET 3 /* network attach */
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#define DEV_V_DEBUG 4 /* debug capability */
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#define DEV_V_RAW 5 /* raw supported */
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#define DEV_V_RAWONLY 6 /* only raw supported */
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#define DEV_V_UF_31 12 /* user flags, V3.1 */
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#define DEV_V_UF 16 /* user flags */
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#define DEV_V_RSV 31 /* reserved */
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#define DEV_DIS (1 << DEV_V_DIS)
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#define DEV_DISABLE (1 << DEV_V_DISABLE)
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#define DEV_DYNM (1 << DEV_V_DYNM)
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#define DEV_NET (1 << DEV_V_NET)
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#define DEV_DEBUG (1 << DEV_V_DEBUG)
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#define DEV_RAW (1 << DEV_V_RAW)
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#define DEV_RAWONLY (1 << DEV_V_RAWONLY)
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#define DEV_UFMASK_31 (((1u << DEV_V_RSV) - 1) & ~((1u << DEV_V_UF_31) - 1))
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#define DEV_UFMASK (((1u << DEV_V_RSV) - 1) & ~((1u << DEV_V_UF) - 1))
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#define DEV_RFLAGS (DEV_UFMASK|DEV_DIS) /* restored flags */
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/* Unit data structure
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Parts of the unit structure are device specific, that is, they are
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not referenced by the simulator control package and can be freely
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used by device simulators. Fields starting with 'buf', and flags
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starting with 'UF', are device specific. The definitions given here
|
|
are for a typical sequential device.
|
|
*/
|
|
|
|
struct sim_unit {
|
|
struct sim_unit *next; /* next active */
|
|
t_stat (*action)(struct sim_unit *up); /* action routine */
|
|
char *filename; /* open file name */
|
|
FILE *fileref; /* file reference */
|
|
void *filebuf; /* memory buffer */
|
|
uint32 hwmark; /* high water mark */
|
|
int32 time; /* time out */
|
|
uint32 flags; /* flags */
|
|
t_addr capac; /* capacity */
|
|
t_addr pos; /* file position */
|
|
void (*io_flush)(struct sim_unit *up);/* io flush routine */
|
|
uint32 iostarttime; /* I/O start time */
|
|
int32 buf; /* buffer */
|
|
int32 wait; /* wait */
|
|
int32 u3; /* device specific */
|
|
int32 u4; /* device specific */
|
|
int32 u5; /* device specific */
|
|
int32 u6; /* device specific */
|
|
void *up7; /* device specific */
|
|
void *up8; /* device specific */
|
|
#ifdef SIM_ASYNCH_IO
|
|
void (*a_check_completion)(struct sim_unit *);
|
|
struct sim_unit *a_next; /* next asynch active */
|
|
int32 a_event_time;
|
|
int32 a_sim_interval;
|
|
t_stat (*a_activate_call)(struct sim_unit *, int32);
|
|
#endif
|
|
};
|
|
|
|
/* Unit flags */
|
|
|
|
#define UNIT_V_UF_31 12 /* dev spec, V3.1 */
|
|
#define UNIT_V_UF 16 /* device specific */
|
|
#define UNIT_V_RSV 31 /* reserved!! */
|
|
|
|
#define UNIT_ATTABLE 000001 /* attachable */
|
|
#define UNIT_RO 000002 /* read only */
|
|
#define UNIT_FIX 000004 /* fixed capacity */
|
|
#define UNIT_SEQ 000010 /* sequential */
|
|
#define UNIT_ATT 000020 /* attached */
|
|
#define UNIT_BINK 000040 /* K = power of 2 */
|
|
#define UNIT_BUFABLE 000100 /* bufferable */
|
|
#define UNIT_MUSTBUF 000200 /* must buffer */
|
|
#define UNIT_BUF 000400 /* buffered */
|
|
#define UNIT_ROABLE 001000 /* read only ok */
|
|
#define UNIT_DISABLE 002000 /* disable-able */
|
|
#define UNIT_DIS 004000 /* disabled */
|
|
#define UNIT_RAW 010000 /* raw mode */
|
|
#define UNIT_TEXT 020000 /* text mode */
|
|
#define UNIT_IDLE 040000 /* idle eligible */
|
|
|
|
#define UNIT_UFMASK_31 (((1u << UNIT_V_RSV) - 1) & ~((1u << UNIT_V_UF_31) - 1))
|
|
#define UNIT_UFMASK (((1u << UNIT_V_RSV) - 1) & ~((1u << UNIT_V_UF) - 1))
|
|
#define UNIT_RFLAGS (UNIT_UFMASK|UNIT_DIS) /* restored flags */
|
|
|
|
/* Register data structure */
|
|
|
|
struct sim_reg {
|
|
char *name; /* name */
|
|
void *loc; /* location */
|
|
uint32 radix; /* radix */
|
|
uint32 width; /* width */
|
|
uint32 offset; /* starting bit */
|
|
uint32 depth; /* save depth */
|
|
uint32 flags; /* flags */
|
|
uint32 qptr; /* circ q ptr */
|
|
};
|
|
|
|
#define REG_FMT 00003 /* see PV_x */
|
|
#define REG_RO 00004 /* read only */
|
|
#define REG_HIDDEN 00010 /* hidden */
|
|
#define REG_NZ 00020 /* must be non-zero */
|
|
#define REG_UNIT 00040 /* in unit struct */
|
|
#define REG_CIRC 00100 /* circular array */
|
|
#define REG_VMIO 00200 /* use VM data print/parse */
|
|
#define REG_VMAD 00400 /* use VM addr print/parse */
|
|
#define REG_FIT 01000 /* fit access to size */
|
|
#define REG_HRO (REG_RO | REG_HIDDEN) /* hidden, read only */
|
|
|
|
/* Command tables, base and alternate formats */
|
|
|
|
struct sim_ctab {
|
|
char *name; /* name */
|
|
t_stat (*action)(int32 flag, char *cptr);
|
|
/* action routine */
|
|
int32 arg; /* argument */
|
|
char *help; /* help string */
|
|
};
|
|
|
|
struct sim_c1tab {
|
|
char *name; /* name */
|
|
t_stat (*action)(struct sim_device *dptr, struct sim_unit *uptr,
|
|
int32 flag, char *cptr); /* action routine */
|
|
int32 arg; /* argument */
|
|
char *help; /* help string */
|
|
};
|
|
|
|
struct sim_shtab {
|
|
char *name; /* name */
|
|
t_stat (*action)(FILE *st, struct sim_device *dptr,
|
|
struct sim_unit *uptr, int32 flag, char *cptr);
|
|
int32 arg; /* argument */
|
|
char *help; /* help string */
|
|
};
|
|
|
|
/* Modifier table - only extended entries have disp, reg, or flags */
|
|
|
|
struct sim_mtab {
|
|
uint32 mask; /* mask */
|
|
uint32 match; /* match */
|
|
char *pstring; /* print string */
|
|
char *mstring; /* match string */
|
|
t_stat (*valid)(struct sim_unit *up, int32 v, char *cp, void *dp);
|
|
/* validation routine */
|
|
t_stat (*disp)(FILE *st, struct sim_unit *up, int32 v, void *dp);
|
|
/* display routine */
|
|
void *desc; /* value descriptor */
|
|
/* REG * if MTAB_VAL */
|
|
/* int * if not */
|
|
};
|
|
|
|
#define MTAB_XTD (1u << UNIT_V_RSV) /* ext entry flag */
|
|
#define MTAB_VDV 001 /* valid for dev */
|
|
#define MTAB_VUN 002 /* valid for unit */
|
|
#define MTAB_VAL 004 /* takes a value */
|
|
#define MTAB_NMO 010 /* only if named */
|
|
#define MTAB_NC 020 /* no UC conversion */
|
|
#define MTAB_SHP 040 /* show takes parameter */
|
|
|
|
/* Search table */
|
|
|
|
struct sim_schtab {
|
|
int32 logic; /* logical operator */
|
|
int32 boolop; /* boolean operator */
|
|
t_value mask; /* mask for logical */
|
|
t_value comp; /* comparison for boolean */
|
|
};
|
|
|
|
/* Breakpoint table */
|
|
|
|
struct sim_brktab {
|
|
t_addr addr; /* address */
|
|
int32 typ; /* mask of types */
|
|
int32 cnt; /* proceed count */
|
|
char *act; /* action string */
|
|
};
|
|
|
|
/* Debug table */
|
|
|
|
struct sim_debtab {
|
|
char *name; /* control name */
|
|
uint32 mask; /* control bit */
|
|
};
|
|
|
|
#define DEBUG_PRS(d) (sim_deb && d.dctrl)
|
|
#define DEBUG_PRD(d) (sim_deb && d->dctrl)
|
|
#define DEBUG_PRI(d,m) (sim_deb && (d.dctrl & (m)))
|
|
#define DEBUG_PRJ(d,m) (sim_deb && (d->dctrl & (m)))
|
|
|
|
/* The following macros define structure contents */
|
|
|
|
#define UDATA(act,fl,cap) NULL,act,NULL,NULL,NULL,0,0,(fl),(cap),0,0
|
|
|
|
#if defined (__STDC__) || defined (_WIN32)
|
|
#define ORDATA(nm,loc,wd) #nm, &(loc), 8, (wd), 0, 1
|
|
#define DRDATA(nm,loc,wd) #nm, &(loc), 10, (wd), 0, 1
|
|
#define HRDATA(nm,loc,wd) #nm, &(loc), 16, (wd), 0, 1
|
|
#define FLDATA(nm,loc,pos) #nm, &(loc), 2, 1, (pos), 1
|
|
#define GRDATA(nm,loc,rdx,wd,pos) #nm, &(loc), (rdx), (wd), (pos), 1
|
|
#define BRDATA(nm,loc,rdx,wd,dep) #nm, (loc), (rdx), (wd), 0, (dep)
|
|
#define URDATA(nm,loc,rdx,wd,off,dep,fl) \
|
|
#nm, &(loc), (rdx), (wd), (off), (dep), ((fl) | REG_UNIT)
|
|
#else
|
|
#define ORDATA(nm,loc,wd) "nm", &(loc), 8, (wd), 0, 1
|
|
#define DRDATA(nm,loc,wd) "nm", &(loc), 10, (wd), 0, 1
|
|
#define HRDATA(nm,loc,wd) "nm", &(loc), 16, (wd), 0, 1
|
|
#define FLDATA(nm,loc,pos) "nm", &(loc), 2, 1, (pos), 1
|
|
#define GRDATA(nm,loc,rdx,wd,pos) "nm", &(loc), (rdx), (wd), (pos), 1
|
|
#define BRDATA(nm,loc,rdx,wd,dep) "nm", (loc), (rdx), (wd), 0, (dep)
|
|
#define URDATA(nm,loc,rdx,wd,off,dep,fl) \
|
|
"nm", &(loc), (rdx), (wd), (off), (dep), ((fl) | REG_UNIT)
|
|
#endif
|
|
|
|
/* Typedefs for principal structures */
|
|
|
|
typedef struct sim_device DEVICE;
|
|
typedef struct sim_unit UNIT;
|
|
typedef struct sim_reg REG;
|
|
typedef struct sim_ctab CTAB;
|
|
typedef struct sim_c1tab C1TAB;
|
|
typedef struct sim_shtab SHTAB;
|
|
typedef struct sim_mtab MTAB;
|
|
typedef struct sim_schtab SCHTAB;
|
|
typedef struct sim_brktab BRKTAB;
|
|
typedef struct sim_debtab DEBTAB;
|
|
|
|
/* Function prototypes */
|
|
|
|
#include "scp.h"
|
|
#include "sim_console.h"
|
|
#include "sim_timer.h"
|
|
#include "sim_fio.h"
|
|
|
|
/* Asynch/Threaded I/O support */
|
|
|
|
#if defined (SIM_ASYNCH_IO)
|
|
#include <pthread.h>
|
|
|
|
extern pthread_mutex_t sim_asynch_lock;
|
|
extern pthread_cond_t sim_asynch_wake;
|
|
extern pthread_t sim_asynch_main_threadid;
|
|
extern struct sim_unit *sim_asynch_queue;
|
|
extern t_bool sim_idle_wait;
|
|
extern int32 sim_asynch_check;
|
|
extern int32 sim_asynch_latency;
|
|
extern int32 sim_asynch_inst_latency;
|
|
|
|
#define AIO_INIT \
|
|
if (1) { \
|
|
sim_asynch_main_threadid = pthread_self(); \
|
|
/* Empty list/list end uses the point value (void *)-1. \
|
|
This allows NULL in an entry's a_next pointer to \
|
|
indicate that the entry is not currently in any list */ \
|
|
sim_asynch_queue = (void *)-1; \
|
|
}
|
|
#define AIO_CLEANUP \
|
|
if (1) { \
|
|
pthread_mutex_destroy(&sim_asynch_lock); \
|
|
pthread_cond_destroy(&sim_asynch_wake); \
|
|
}
|
|
#if defined(_WIN32) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
|
|
#define USE_AIO_INTRINSICS 1
|
|
#endif
|
|
#ifdef USE_AIO_INTRINSICS
|
|
/* This approach uses intrinsics to manage access to the link list head */
|
|
/* sim_asynch_queue. However, once the list head state has been determined */
|
|
/* a lock is used to manage the list update and entry removal. */
|
|
/* This approach avoids the ABA issues with a completly lock free approach */
|
|
/* since the ABA problem is very likely to happen with this use model, and */
|
|
/* it avoids the lock overhead for the simple list head checking. */
|
|
#ifdef _WIN32
|
|
#include <winsock2.h>
|
|
#ifdef ERROR
|
|
#undef ERROR
|
|
#endif /* ERROR */
|
|
#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
|
|
#define InterlockedCompareExchangePointer(Destination, Exchange, Comparand) __sync_val_compare_and_swap(Destination, Comparand, Exchange)
|
|
#define InterlockedExchangePointer(Destination, value) __sync_lock_test_and_set(Destination, value)
|
|
#else
|
|
#error "Implementation of functions InterlockedCompareExchangePointer() and InterlockedExchangePointer() are needed to build with USE_AIO_INTRINSICS"
|
|
#endif
|
|
#define AIO_QUEUE_VAL InterlockedCompareExchangePointer(&sim_asynch_queue, sim_asynch_queue, NULL)
|
|
#define AIO_QUEUE_SET(val) InterlockedExchangePointer(&sim_asynch_queue, val)
|
|
#define AIO_UPDATE_QUEUE \
|
|
if (1) { \
|
|
UNIT *uptr; \
|
|
if (AIO_QUEUE_VAL != (void *)-1) { \
|
|
pthread_mutex_lock (&sim_asynch_lock); \
|
|
while ((uptr = AIO_QUEUE_VAL) != (void *)-1) { \
|
|
int32 a_event_time; \
|
|
AIO_QUEUE_SET(uptr->a_next); \
|
|
uptr->a_next = NULL; /* hygiene */ \
|
|
a_event_time = uptr->a_event_time-(uptr->a_sim_interval-sim_interval); \
|
|
if (a_event_time < 0) a_event_time = 0; \
|
|
uptr->a_activate_call (uptr, a_event_time); \
|
|
if (uptr->a_check_completion) { \
|
|
pthread_mutex_unlock (&sim_asynch_lock); \
|
|
uptr->a_check_completion (uptr); \
|
|
pthread_mutex_lock (&sim_asynch_lock); \
|
|
} \
|
|
} \
|
|
pthread_mutex_unlock (&sim_asynch_lock); \
|
|
} \
|
|
sim_asynch_check = sim_asynch_inst_latency; \
|
|
}
|
|
#define AIO_ACTIVATE(caller, uptr, event_time) \
|
|
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
|
|
pthread_mutex_lock (&sim_asynch_lock); \
|
|
if (uptr->a_next) { \
|
|
uptr->a_activate_call = sim_activate_abs; \
|
|
} else { \
|
|
uptr->a_next = AIO_QUEUE_VAL; \
|
|
uptr->a_event_time = event_time; \
|
|
uptr->a_sim_interval = sim_interval; \
|
|
uptr->a_activate_call = caller; \
|
|
AIO_QUEUE_SET(uptr); \
|
|
} \
|
|
if (sim_idle_wait) \
|
|
pthread_cond_signal (&sim_asynch_wake); \
|
|
pthread_mutex_unlock (&sim_asynch_lock); \
|
|
return SCPE_OK; \
|
|
}
|
|
#else /* !USE_AIO_INTRINSICS */
|
|
/* This approach uses a pthread mutex to manage access to the link list */
|
|
/* head sim_asynch_queue. It will always work, but may be slower than the */
|
|
/* partially lock free approach when using USE_AIO_INTRINSICS */
|
|
#define AIO_UPDATE_QUEUE \
|
|
if (1) { \
|
|
UNIT *uptr; \
|
|
pthread_mutex_lock (&sim_asynch_lock); \
|
|
while (sim_asynch_queue != (void *)-1) { /* List !Empty */ \
|
|
int32 a_event_time; \
|
|
uptr = sim_asynch_queue; \
|
|
sim_asynch_queue = uptr->a_next; \
|
|
uptr->a_next = NULL; \
|
|
a_event_time = uptr->a_event_time-(uptr->a_sim_interval-sim_interval); \
|
|
if (a_event_time < 0) a_event_time = 0; \
|
|
uptr->a_activate_call (uptr, a_event_time); \
|
|
if (uptr->a_check_completion) { \
|
|
pthread_mutex_unlock (&sim_asynch_lock); \
|
|
uptr->a_check_completion (uptr); \
|
|
pthread_mutex_lock (&sim_asynch_lock); \
|
|
} \
|
|
} \
|
|
pthread_mutex_unlock (&sim_asynch_lock); \
|
|
sim_asynch_check = sim_asynch_inst_latency; \
|
|
}
|
|
#define AIO_ACTIVATE(caller, uptr, event_time) \
|
|
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
|
|
pthread_mutex_lock (&sim_asynch_lock); \
|
|
if (uptr->a_next) { \
|
|
uptr->a_activate_call = sim_activate_abs; \
|
|
} else { \
|
|
uptr->a_next = sim_asynch_queue; \
|
|
uptr->a_event_time = event_time; \
|
|
uptr->a_sim_interval = sim_interval; \
|
|
uptr->a_activate_call = caller; \
|
|
sim_asynch_queue = uptr; \
|
|
} \
|
|
if (sim_idle_wait) \
|
|
pthread_cond_signal (&sim_asynch_wake); \
|
|
pthread_mutex_unlock (&sim_asynch_lock); \
|
|
return SCPE_OK; \
|
|
}
|
|
#endif /* USE_AIO_INTRINSICS */
|
|
#define AIO_VALIDATE if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) abort()
|
|
#define AIO_CHECK_EVENT \
|
|
if (0 > --sim_asynch_check) { \
|
|
AIO_UPDATE_QUEUE; \
|
|
}
|
|
#define AIO_SET_INTERRUPT_LATENCY(instpersec) \
|
|
if (1) { \
|
|
sim_asynch_inst_latency = (int32)((((double)(instpersec))*sim_asynch_latency)/1000000000);\
|
|
if (sim_asynch_inst_latency == 0) \
|
|
sim_asynch_inst_latency = 1; \
|
|
}
|
|
#else /* !SIM_ASYNCH_IO */
|
|
#define AIO_UPDATE_QUEUE
|
|
#define AIO_ACTIVATE(caller, uptr, event_time)
|
|
#define AIO_VALIDATE
|
|
#define AIO_CHECK_EVENT
|
|
#define AIO_INIT
|
|
#define AIO_CLEANUP
|
|
#define AIO_SET_INTERRUPT_LATENCY(instpersec)
|
|
#endif /* SIM_ASYNCH_IO */
|
|
|
|
#endif
|