ec60bbf329
The memory layout for the Interdata simulators has been changed. Do not use Interdata SAVE files from prior revisions with V3.4. 1. New Features in 3.4 1.1 SCP and Libraries - Revised interpretation of fprint_sym, fparse_sym returns - Revised syntax for SET DEBUG - DO command nesting allowed to ten levels 1.2 Interdata - Revised memory model to be 16b instead of 8b 1.3 HP2100 - Added Fast FORTRAN Processor instructions - Added SET OFFLINE/ONLINE and SET UNLOAD/LOAD commands to tapes and disks 2. Bugs Fixed in 3.4-0 2.1 Interdata - Fixed bug in show history routine (from Mark Hittinger) - Fixed bug in initial memory allocation 2.2 PDP-10 - Fixed TU bug, ERASE and WREOF should not clear done (reported by Rich Alderson) - Fixed TU error reporting 2.3 PDP-11 - Fixed TU error reporting
508 lines
18 KiB
C
508 lines
18 KiB
C
/* hp2100_fp1.c: HP 2100/21MX extended-precision floating point routines
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Copyright (c) 2005, J. David Bryan
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of the author shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from the author.
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Primary references:
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- HP 1000 M/E/F-Series Computers Technical Reference Handbook
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(5955-0282, Mar-1980)
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- DOS/RTE Relocatable Library Reference Manual
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(24998-90001, Oct-1981)
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The extended-precision floating-point format is a 48-bit extension of the
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32-bit format used for single precision. A packed "XP" number consists of a
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40-bit twos-complement mantissa and an 8-bit twos-complement exponent. The
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exponent is rotated left so that the sign is in the LSB. Pictorially, an XP
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number appears in memory as follows:
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15 14 0
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+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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|S | mantissa high | : M
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+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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| mantissa middle | : M + 1
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+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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| mantissa low | exponent |XS| : M + 2
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+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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15 8 7 1 0
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In a normalized value, the sign and MSB of the mantissa differ. Zero is
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represented by all three words = 0.
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Internally, an unpacked XP number is contained in a structure having a signed
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64-bit mantissa and a signed 32-bit exponent. The mantissa is masked to 48
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bits and left-justified, while the exponent is right-justified.
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*/
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#include "hp2100_defs.h"
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#include "hp2100_cpu.h"
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#include "hp2100_fp1.h"
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#if defined (HAVE_INT64) /* we need int64 support */
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/* packed starting bit numbers */
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#define XP_PAD 16 /* padding LSBs */
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#define XP_V_MSIGN (47 + XP_PAD) /* mantissa sign */
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#define XP_V_MANT ( 8 + XP_PAD) /* mantissa */
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#define XP_V_EXP ( 1 + XP_PAD) /* exponent */
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#define XP_V_ESIGN ( 0 + XP_PAD) /* exponent sign */
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/* packed bit widths */
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#define XP_W_MSIGN 1 /* mantissa sign */
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#define XP_W_MANT 39 /* mantissa */
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#define XP_W_EXP 7 /* exponent */
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#define XP_W_ESIGN 1 /* exponent sign */
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/* packed bit masks */
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#define XP_M_MSIGN (((t_uint64) 1 << XP_W_MSIGN) - 1) /* mantissa sign */
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#define XP_M_MANT (((t_uint64) 1 << XP_W_MANT) - 1) /* mantissa */
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#define XP_M_EXP (((t_uint64) 1 << XP_W_EXP) - 1) /* exponent */
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#define XP_M_ESIGN (((t_uint64) 1 << XP_W_ESIGN) - 1) /* exponent sign */
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/* packed field masks */
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#define XP_MSIGN (XP_M_MSIGN << XP_V_MSIGN) /* mantissa sign */
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#define XP_MANT (XP_M_MANT << XP_V_MANT) /* mantissa */
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#define XP_SMANT (XP_MSIGN | XP_MANT) /* signed mantissa */
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/* unpacked starting bit numbers */
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#define XP_V_UMANT (0 + XP_PAD) /* signed mantissa */
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/* unpacked bit widths */
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#define XP_W_USMANT 48 /* signed mantissa */
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/* unpacked bit masks */
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#define XP_M_USMANT (((t_uint64) 1 << XP_W_USMANT) - 1) /* mantissa */
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/* unpacked field masks */
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#define XP_USMANT (XP_M_USMANT << XP_V_UMANT) /* signed mantissa */
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/* values */
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#define XP_ONEHALF ((t_int64) 1 << (XP_V_MSIGN - 1)) /* mantissa = 0.5 */
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#define XP_HALSBPOS ((t_int64) 1 << (XP_V_MANT - 1)) /* + 1/2 LSB */
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#define XP_HALSBNEG ((t_int64) XP_HALSBPOS - 1) /* - 1/2 LSB */
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#define XP_MAXPOS ((t_int64) XP_MANT) /* maximum pos mantissa */
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#define XP_MAXNEG ((t_int64) XP_MSIGN) /* maximum neg mantissa */
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#define XP_MAXEXP ((t_int64) XP_M_EXP) /* maximum pos exponent */
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/* helpers */
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#define DENORM(x) ((((x) ^ (x) << 1) & XP_MSIGN) == 0)
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#define TO_INT64(xpn) ((t_int64) ((t_uint64) (xpn).high << 32 | (xpn).low))
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/* internal unpacked extended-precision representation */
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typedef struct { t_int64 mantissa;
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int32 exponent; } XPU;
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/* Private routines */
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/* Pack an unpacked mantissa and exponent */
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static XPN to_xpn (t_uint64 m, int32 e)
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{
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XPN packed;
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packed.high = (uint32) (m >> 32);
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packed.low = (uint32) (m | ((e & XP_M_EXP) << XP_V_EXP) | ((e < 0) << XP_V_ESIGN));
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return packed;
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}
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/* Unpack a packed number */
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static XPU unpack (XPN packed)
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{
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XPU unpacked;
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unpacked.mantissa = TO_INT64 (packed) & XP_SMANT; /* left-justify mantissa */
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unpacked.exponent = (int8) ((packed.low >> XP_V_EXP & XP_M_EXP) | /* sign-extend exponent */
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packed.low >> (XP_V_ESIGN - XP_W_EXP));
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return unpacked;
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}
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/* Normalize an unpacked number */
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static void normalize (XPU *unpacked)
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{
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if (unpacked->mantissa) { /* non-zero? */
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while (DENORM (unpacked->mantissa)) { /* normal form? */
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unpacked->exponent = unpacked->exponent - 1; /* no, so shift */
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unpacked->mantissa = unpacked->mantissa << 1; } }
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else unpacked->exponent = 0; /* clean for zero */
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return;
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}
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/* Round and pack an unpacked number */
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static uint32 pack (XPN *packed, XPU unpacked)
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{
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int32 sign, overflow = 0;
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normalize (&unpacked); /* normalize */
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sign = (unpacked.mantissa < 0); /* save sign */
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unpacked.mantissa = (unpacked.mantissa + /* round the number */
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(sign? XP_HALSBNEG: XP_HALSBPOS)) & XP_SMANT; /* mask off rounding bits */
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if (sign != (unpacked.mantissa < 0)) { /* pos overflow? */
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unpacked.mantissa = /* renormalize */
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(t_uint64) unpacked.mantissa >> 1 & XP_SMANT; /* and remask */
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unpacked.exponent = unpacked.exponent + 1; }
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else normalize (&unpacked); /* neg overflow? renorm */
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unpacked.mantissa = unpacked.mantissa & XP_SMANT;
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if (unpacked.mantissa == 0) /* result 0? */
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packed->high = packed->low = 0; /* return 0 */
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else if (unpacked.exponent < -(XP_MAXEXP + 1)) { /* underflow? */
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packed->high = packed->low = 0; /* return 0 */
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overflow = 1; } /* and set overflow */
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else if (unpacked.exponent > XP_MAXEXP) { /* overflow? */
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if (sign) *packed = to_xpn (XP_MAXNEG, XP_MAXEXP); /* return neg infinity */
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else *packed = to_xpn (XP_MAXPOS, XP_MAXEXP); /* or pos infinity */
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overflow = 1; } /* with overflow */
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else *packed = to_xpn (unpacked.mantissa, unpacked.exponent);
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return overflow;
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}
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/* Complement an unpacked number */
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static void complement (XPU *result)
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{
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result->mantissa = -result->mantissa; /* negate mantissa */
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if (result->mantissa == XP_MAXNEG) { /* maximum negative? */
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result->mantissa = (t_uint64) result->mantissa >> 1; /* renormalize to pos */
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result->exponent = result->exponent + 1; } /* correct exponent */
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return;
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}
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/* Add two unpacked numbers
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The mantissas are first aligned (if necessary) by scaling the smaller of the
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two operands. If the magnitude of the difference between the exponents is
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greater than the number of significant bits, then the smaller number has been
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scaled to zero, and so the sum is simply the larger operand. Otherwise, the
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sum is computed and checked for overflow, which has occured if the signs of
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the operands are the same but differ from that of the result. Scaling and
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renormalization is perfomed if overflow occurred. */
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static void add (XPU *sum, XPU augend, XPU addend)
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{
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int32 magn;
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if (augend.mantissa == 0) *sum = addend; /* x + 0 = x */
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else if (addend.mantissa == 0) *sum = augend; /* 0 + x = x */
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else {
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magn = augend.exponent - addend.exponent; /* difference exponents */
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if (magn > 0) { /* addend smaller? */
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*sum = augend; /* preset augend */
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addend.mantissa = addend.mantissa >> magn; } /* align addend */
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else { /* augend smaller? */
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*sum = addend; /* preset addend */
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magn = -magn; /* make difference positive */
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augend.mantissa = augend.mantissa >> magn; } /* align augend */
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if (magn <= XP_W_MANT + 1) { /* check mangitude */
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sum->mantissa = addend.mantissa + augend.mantissa; /* add mantissas */
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if (((addend.mantissa < 0) == (augend.mantissa < 0)) && /* chk overflow */
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((addend.mantissa < 0) != (sum->mantissa < 0))) {
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sum->mantissa = (addend.mantissa & XP_MSIGN) | /* restore sign */
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(t_uint64) sum->mantissa >> 1; /* renormalize */
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sum->exponent = sum->exponent + 1; } } } /* adjust exponent */
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return;
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}
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/* Multiply two unpacked numbers
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The firmware first negates the operands as necessary so that the values are
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positive. Then it performs six of the nine 16-bit x 16-bit = 32-bit unsigned
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multiplications required for a full 96-bit product. Given a 48-bit
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multiplicand "a1a2a3" and a 48-bit multiplier "b1b2b3", the firmware performs
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these calculations to develop a 48-bit product:
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a1 a2 a3
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+-------+-------+-------+
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b1 b2 b3
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+-------+-------+-------+
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_________________________
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a1 * b3 [m1]
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+-------+-------+
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a2 * b2 [m2]
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+-------+-------+
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a1 * b2 [m3]
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+-------+-------+
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a3 * b1 [m4]
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+-------+-------+
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a2 * b1 [m5]
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+-------+-------+
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a1 * b1 [m6]
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+-------+-------+
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_________________________________
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product
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+-------+-------+-------+
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The least-significant words of intermediate multiplications [m1], [m2], and
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[m4] are used only to develop a carry bit into the 48-bit sum. The product
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is complemented if necessary to restore the sign.
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Instead of implementing this algorithm directly, it is more efficient under
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simulation to use 32 x 32 = 64-bit multiplications, thereby reducing the
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number required from six to four. */
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static void multiply (XPU *product, XPU multiplicand, XPU multiplier)
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{
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uint32 ah, al, bh, bl, carry, sign = 0;
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t_uint64 hi, m1, m2, m3;
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if ((multiplicand.mantissa == 0) || (multiplier.mantissa == 0)) /* x * 0 = 0 */
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product->mantissa = product->exponent = 0;
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else {
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if (multiplicand.mantissa < 0) { /* negative? */
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complement (&multiplicand); /* complement operand */
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sign = ~sign; } /* track sign */
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if (multiplier.mantissa < 0) { /* negative? */
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complement (&multiplier); /* complement operand */
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sign = ~sign; } /* track sign */
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product->exponent = multiplicand.exponent + /* compute exponent */
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multiplier.exponent + 1;
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ah = (uint32) (multiplicand.mantissa >> 32); /* split multiplicand */
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al = (uint32) multiplicand.mantissa; /* into high and low parts */
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bh = (uint32) (multiplier.mantissa >> 32); /* split multiplier */
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bl = (uint32) multiplier.mantissa; /* into high and low parts */
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hi = ((t_uint64) ah * bh); /* form four cross products */
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m1 = ((t_uint64) ah * bl); /* using 32 x 32 = 64-bit */
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m2 = ((t_uint64) al * bh); /* hardware multiplies */
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m3 = ((t_uint64) al * bl);
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carry = ((uint32) m1 + (uint32) m2 + /* form a carry bit */
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(uint32) (m3 >> 32)) >> (31 - XP_V_UMANT); /* and align to LSB - 1 */
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product->mantissa = (hi + (m1 >> 32) + /* align, sum, and mask */
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(m2 >> 32) + carry) & XP_USMANT;
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if (sign) complement (product); } /* negate if required */
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return;
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}
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/* Divide two unpacked numbers
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The firmware performs division by calculating (1.0 / divisor) and then
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multiplying by the dividend. The simulator uses 64-bit division and uses a
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"divide-and-correct" algorithm similar to the one employed by the base set
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single-precision floating-point division routine. */
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static void divide (XPU *quotient, XPU dividend, XPU divisor)
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{
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t_int64 bh, bl, m1, m2, m3, m4;
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if (divisor.mantissa == 0) { /* division by zero? */
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if (dividend.mantissa < 0)
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quotient->mantissa = XP_MSIGN; /* return minus infinity */
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else quotient->mantissa = XP_MANT; /* or plus infinity */
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quotient->exponent = XP_MAXEXP + 1; }
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else if (dividend.mantissa == 0) /* dividend zero? */
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quotient->mantissa = quotient->exponent = 0; /* yes; result is zero */
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else {
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quotient->exponent = dividend.exponent - /* division subtracts exponents */
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divisor.exponent + 1;
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bh = divisor.mantissa >> 32; /* split divisor */
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bl = divisor.mantissa & 0xFFFFFFFF;
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m1 = (dividend.mantissa >> 2) / bh; /* form 1st partial quotient */
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m2 = (dividend.mantissa >> 2) % bh; /* obtain remainder */
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m3 = bl * m1; /* calculate correction */
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m4 = ((m2 - (m3 >> 32)) << 32) / bh; /* form 2nd partial quotient */
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quotient->mantissa = (m1 << 32) + m4; /* merge quotients */
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}
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return;
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}
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#endif
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/* Global routines */
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/* Extended-precision memory read */
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XPN ReadX (uint32 va)
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{
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XPN packed;
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packed.high = ReadW (va) << 16 | ReadW ((va + 1) & VAMASK);
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packed.low = ReadW ((va + 2) & VAMASK) << 16; /* read and pack */
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return packed;
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}
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/* Extended-precision memory write */
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void WriteX (uint32 va, XPN packed)
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{
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WriteW (va, (packed.high >> 16) & DMASK); /* write high word */
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WriteW ((va + 1) & VAMASK, packed.high & DMASK); /* write middle word */
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WriteW ((va + 2) & VAMASK, (packed.low >> 16) & DMASK); /* write low word */
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}
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#if defined (HAVE_INT64)
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/* Extended-precision add */
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uint32 x_add (XPN *sum, XPN augend, XPN addend)
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{
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XPU usum, uaddend, uaugend;
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uaugend = unpack (augend); /* unpack augend */
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uaddend = unpack (addend); /* unpack addend */
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add (&usum, uaugend, uaddend); /* calculate sum */
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return pack (sum, usum); /* pack sum */
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}
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/* Extended-precision subtract */
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uint32 x_sub (XPN *difference, XPN minuend, XPN subtrahend)
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{
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XPU udifference, uminuend, usubtrahend;
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uminuend = unpack (minuend); /* unpack minuend */
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usubtrahend = unpack (subtrahend); /* unpack subtrahend */
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complement (&usubtrahend); /* calculate difference */
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add (&udifference, uminuend, usubtrahend); /* pack difference */
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return pack (difference, udifference);
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}
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/* Extended-precision multiply */
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uint32 x_mpy (XPN *product, XPN multiplicand, XPN multiplier)
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{
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XPU uproduct, umultiplicand, umultiplier;
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umultiplicand = unpack (multiplicand); /* unpack multiplicand */
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umultiplier = unpack (multiplier); /* unpack multiplier */
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multiply (&uproduct, umultiplicand, umultiplier); /* calculate product */
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return pack (product, uproduct); /* pack product */
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}
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/* Extended-precision divide */
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uint32 x_div (XPN *quotient, XPN dividend, XPN divisor)
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{
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XPU uquotient, udividend, udivisor;
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udividend = unpack (dividend); /* unpack dividend */
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udivisor = unpack (divisor); /* unpack divisor */
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divide (&uquotient, udividend, udivisor); /* calculate quotient */
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return pack (quotient, uquotient); /* pack quotient */
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}
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/* Pack an extended-precision number
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An unpacked mantissa is passed as a "packed" number with an unused exponent.
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*/
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uint32 x_pak (XPN *result, XPN mantissa, int32 exponent)
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{
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XPU unpacked;
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unpacked.mantissa = TO_INT64 (mantissa); /* retrieve mantissa */
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unpacked.exponent = exponent; /* and exponent */
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return pack (result, unpacked); /* pack them */
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}
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/* Complement an extended-precision mantissa
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An unpacked mantissa is passed as a "packed" number with an unused exponent.
|
||
We return the exponent increment, i.e., either zero or one, depending on
|
||
whether a renormalization was required. */
|
||
|
||
uint32 x_com (XPN *mantissa)
|
||
{
|
||
XPU unpacked;
|
||
|
||
unpacked.mantissa = TO_INT64 (*mantissa); /* retrieve mantissa */
|
||
unpacked.exponent = 0; /* exponent is irrelevant */
|
||
complement (&unpacked); /* negate it */
|
||
*mantissa = to_xpn (unpacked.mantissa, 0); /* replace mantissa */
|
||
return (uint32) unpacked.exponent; /* return exponent increment */
|
||
}
|
||
|
||
|
||
/* Complement an extended-precision number */
|
||
|
||
uint32 x_dcm (XPN *packed)
|
||
{
|
||
XPU unpacked;
|
||
|
||
unpacked = unpack (*packed); /* unpack the number */
|
||
complement (&unpacked); /* negate it */
|
||
return pack (packed, unpacked); /* and repack */
|
||
}
|
||
|
||
|
||
/* Truncate an extended-precision number */
|
||
|
||
void x_trun (XPN *result, XPN source)
|
||
{
|
||
t_uint64 mask;
|
||
uint32 bitslost;
|
||
XPU unpacked;
|
||
const XPU one = { XP_ONEHALF, 1 }; /* 0.5 * 2 ** 1 = 1.0 */
|
||
|
||
unpacked = unpack (source);
|
||
if (unpacked.exponent < 0) /* number < 0.5? */
|
||
result->high = result->low = 0; /* return 0 */
|
||
else if (unpacked.exponent > XP_W_MANT) /* no fractional bits? */
|
||
*result = source; /* already integer */
|
||
else {
|
||
mask = (XP_MANT >> unpacked.exponent) & XP_MANT;/* mask fractional bits */
|
||
bitslost = (uint32) (unpacked.mantissa & mask); /* flag if bits lost */
|
||
unpacked.mantissa = unpacked.mantissa & ~mask; /* mask off fraction */
|
||
if ((unpacked.mantissa < 0) && bitslost) /* negative? */
|
||
add (&unpacked, unpacked, one); /* truncate toward zero */
|
||
pack (result, unpacked); } /* (overflow cannot occur) */
|
||
return;
|
||
}
|
||
|
||
#endif /* defined (HAVE_INT64) */
|