86d1e36f29
This should work on all byte addressable host systems using GCC/clang to build. The QEMU slirp code has been pried out of QEMU and stubs have been created to solve where the current slirp is entangled with the QEMU code. Ths slirp/simh directory contains all the necessary include and glue files to make this useful. Everything in the slirp directory is unmodified QEMU code.
49 lines
1.6 KiB
C
49 lines
1.6 KiB
C
/*
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* Memory transaction attributes
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*
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* Copyright (c) 2015 Linaro Limited.
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*
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* Authors:
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* Peter Maydell <peter.maydell@linaro.org>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#ifndef MEMATTRS_H
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#define MEMATTRS_H
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/* Every memory transaction has associated with it a set of
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* attributes. Some of these are generic (such as the ID of
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* the bus master); some are specific to a particular kind of
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* bus (such as the ARM Secure/NonSecure bit). We define them
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* all as non-overlapping bitfields in a single struct to avoid
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* confusion if different parts of QEMU used the same bit for
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* different semantics.
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*/
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typedef struct MemTxAttrs {
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/* Bus masters which don't specify any attributes will get this
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* (via the MEMTXATTRS_UNSPECIFIED constant), so that we can
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* distinguish "all attributes deliberately clear" from
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* "didn't specify" if necessary.
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*/
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unsigned int unspecified:1;
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/* ARM/AMBA: TrustZone Secure access
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* x86: System Management Mode access
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*/
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unsigned int secure:1;
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/* Memory access is usermode (unprivileged) */
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unsigned int user:1;
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/* Stream ID (for MSI for example) */
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unsigned int stream_id:16;
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} MemTxAttrs;
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/* Bus masters which don't specify any attributes will get this,
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* which has all attribute bits clear except the topmost one
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* (so that we can distinguish "all attributes deliberately clear"
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* from "didn't specify" if necessary).
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*/
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#define MEMTXATTRS_UNSPECIFIED ((MemTxAttrs) { .unspecified = 1 })
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#endif
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