35eac703c3
The makefile now works for Linux and most Unix's. However, for Solaris and MacOS, you must first export the OSTYPE environment variable: > export OSTYPE > make Otherwise, you will get build errors. 1. New Features 1.1 3.8-0 1.1.1 SCP and Libraries - BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and show (respectively) a breakpoint at the current PC. 1.1.2 GRI - Added support for the GRI-99 processor. 1.1.3 HP2100 - Added support for the BACI terminal interface. - Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions. 1.1.4 Nova - Added support for 64KW memory (implemented in third-party CPU's). 1.1.5 PDP-11 - Added support for DC11, RC11, KE11A, KG11A. - Added modem control support for DL11. - Added ASCII character support for all 8b devices. 1.2 3.8-1 1.2.1 SCP and libraries - Added capability to set line connection order for terminal multiplexers. 1.2.2 HP2100 - Added support for 12620A/12936A privileged interrupt fence. - Added support for 12792C eight-channel asynchronous multiplexer. 1.3 3.8-2 1.3.1 1401 - Added "no rewind" option to magtape boot. 1.3.2 PDP-11 - Added RD32 support to RQ - Added debug support to RL 1.3.3 PDP-8 - Added FPP support (many thanks to Rick Murphy for debugging the code) 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
478 lines
18 KiB
C
478 lines
18 KiB
C
/* pdp11_kg.c - Communications Arithmetic Option KG11-A
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Copyright (c) 2007-2010, John A. Dundas III
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of the author shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from the author.
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kg KG11-A Communications Arithmetic Option (M7251)
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03-Jan-10 JAD Eliminate gcc warnings
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08-Jan-08 JAD First public release integrated with SIMH V3.7-3.
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09-Dec-07 JAD SIMH-style debugging.
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Finished validating against real hardware.
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Support for up to 8 units, the maximum.
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Keep all module data in the UNIT structure.
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Clean up bit and mask definitions.
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01-Dec-07 JAD Now work on the corner cases that the
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diagnostic does not check.
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CLR does not clear the QUO bit.
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Correct SR write logic.
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29-Nov-07 JAD Original implementation and testing based on
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an idea from 07-Jul-03. Passes the ZKGAB0
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diagnostic.
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Information necessary to create this simulation was gathered from
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a number of sources including:
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KG11-A Exclusive-OR and CRC block check manual, DEC-11-HKGAA-B-D
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<http://www.computer.museum.uq.edu.au/pdf/DEC-11-HKGAA-B-D%20KG11-A%20Exclusive-OR%20and%20CRC%20Block%20Check%20Manual.pdf>
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Maintenance print set
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<http://bitsavers.org/pdf/dec/unibus/KG11A_EngrDrws.pdf>
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A Painless Guide to CRC Error Detection Algorithms, Ross N. Williams
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<http://www.ross.net/crc/download/crc_v3.txt">
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The original PDP-11 instruction set, as implemented in the /20,
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/15, /10, and /5, did not include XOR. [One of the differences
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tables incorrectly indicates the /04 does not implement this
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instruction.] This device implements XOR, XORB, and a variety of
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CRCs.
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The maintenance prints indicate that the device was probably available
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starting in late 1971. May need to check further. The first edition
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of the manual was May 1972.
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The device was still sold at least as late as mid-1982 according
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to the PDP-11 Systems and Options Summary. RSTS/E included support
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for up to 8 units in support of the 2780 emulation or for use with
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DP11, DU11, or DUP11. The device appears to have been retired by
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1983-03, and possibly earlier.
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I/O Page Registers
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SR 7707x0 (read-write) status
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BCC 7707x2 (read-only) BCC (block check character)
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DR 7707x4 (write-only) data
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Vector: none
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Priority: none
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The KG11-A is a programmed-I/O, non-interrupting device. Therefore
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no vector or bus request level are necessary. It is a Unibus device
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but since it does not address memory itself (it only presents
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registers in the I/O page) it is compatible with extended Unibus
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machines (22-bit) as well as traditional Unibus.
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Implements 5 error detection codes:
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LRC-8
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LRC-16
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CRC-12
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CRC-16
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CRC-CCITT
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*/
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#if !defined (VM_PDP11)
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#error "KG11 is not supported!"
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#endif
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#include "pdp11_defs.h"
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extern FILE *sim_deb;
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extern REG cpu_reg[];
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extern int32 R[];
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#ifndef KG_UNITS
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#define KG_UNITS (8)
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#endif
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/* Control and Status Register */
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#define KGSR_V_QUO (8) /* RO */
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#define KGSR_V_DONE (7) /* RO */
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#define KGSR_V_SEN (6) /* R/W shift enable */
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#define KGSR_V_STEP (5) /* W */
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#define KGSR_V_CLR (4) /* W */
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#define KGSR_V_DDB (3) /* R/W double data byte */
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#define KGSR_V_CRCIC (2) /* R/W */
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#define KGSR_V_LRC (1) /* R/W */
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#define KGSR_V_16 (0) /* R/W */
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#define KGSR_M_QUO (1u << KGSR_V_QUO)
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#define KGSR_M_DONE (1u << KGSR_V_DONE)
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#define KGSR_M_SEN (1u << KGSR_V_SEN)
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#define KGSR_M_STEP (1u << KGSR_V_STEP)
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#define KGSR_M_CLR (1u << KGSR_V_CLR)
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#define KGSR_M_DDB (1u << KGSR_V_DDB)
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#define KGSR_M_CRCIC (1u << KGSR_V_CRCIC)
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#define KGSR_M_LRC (1u << KGSR_V_LRC)
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#define KGSR_M_16 (1u << KGSR_V_16)
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#define KG_SR_RDMASK (KGSR_M_QUO | KGSR_M_DONE | KGSR_M_SEN | KGSR_M_DDB | \
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KGSR_M_CRCIC | KGSR_M_LRC | KGSR_M_16)
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#define KG_SR_WRMASK (KGSR_M_SEN | KGSR_M_DDB | KGSR_M_CRCIC | \
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KGSR_M_LRC | KGSR_M_16)
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#define KG_SR_POLYMASK (KGSR_M_CRCIC|KGSR_M_LRC|KGSR_M_16)
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/* Unit structure redefinitions */
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#define SR u3
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#define BCC u4
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#define DR u5
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#define PULSCNT u6
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#define POLY_LRC8 (0x0008)
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#define POLY_LRC16 (0x0080)
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#define POLY_CRC12 (0x0f01)
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#define POLY_CRC16 (0xa001)
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#define POLY_CCITT (0x8408)
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static const struct {
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uint16 poly;
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uint16 pulses;
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const char * const name;
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} config[] = {
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/* DDB=0 */
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{ POLY_CRC12, 6, "CRC-12" },
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{ POLY_CRC16, 8, "CRC-16" },
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{ POLY_LRC8, 8, "LRC-8" },
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{ POLY_LRC16, 8, "LRC-16" },
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{ 0, 0, "undefined" },
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{ POLY_CCITT, 8, "CRC-CCITT" },
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{ 0, 0, "undefined" },
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{ 0, 0, "undefined" },
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/* DDB=1 */
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{ POLY_CRC12, 12, "CRC-12" },
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{ POLY_CRC16, 16, "CRC-16" },
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{ POLY_LRC8, 16, "LRC-8" },
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{ POLY_LRC16, 16, "LRC-16" },
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{ 0, 0, "undefined" },
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{ POLY_CCITT, 16, "CRC-CCITT" },
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{ 0, 0, "undefined" },
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{ 0, 0, "undefined" }
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};
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/* Forward declarations */
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static t_stat kg_rd (int32 *, int32, int32);
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static t_stat kg_wr (int32, int32, int32);
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static t_stat kg_reset (DEVICE *);
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static void do_poly (int, t_bool);
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static t_stat set_units (UNIT *, int32, char *, void *);
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/* 16-bit rotate right */
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#define ROR(n,v) (((v >> n) & DMASK) | ((v << (16 - n)) & DMASK))
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/* 8-bit rotate right */
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#define RORB(n,v) (((v & 0377) >> n) | ((v << (8 - n)) & 0377))
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/* KG data structures
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kg_dib KG PDP-11 device information block
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kg_unit KG unit descriptor
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kg_reg KG register list
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kg_mod KG modifiers table
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kg_debug KG debug names table
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kg_dev KG device descriptor
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*/
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static DIB kg_dib = {
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IOBA_KG,
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(IOLN_KG + 2) * KG_UNITS,
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&kg_rd,
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&kg_wr,
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0, 0, 0, { NULL }
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};
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static UNIT kg_unit[] = {
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{ UDATA (NULL, 0, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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};
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static const REG kg_reg[] = {
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{ ORDATA (SR0, kg_unit[0].SR, 16) },
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{ ORDATA (SR1, kg_unit[1].SR, 16) },
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{ ORDATA (SR2, kg_unit[2].SR, 16) },
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{ ORDATA (SR3, kg_unit[3].SR, 16) },
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{ ORDATA (SR4, kg_unit[4].SR, 16) },
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{ ORDATA (SR5, kg_unit[5].SR, 16) },
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{ ORDATA (SR6, kg_unit[6].SR, 16) },
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{ ORDATA (SR7, kg_unit[7].SR, 16) },
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{ ORDATA (BCC0, kg_unit[0].BCC, 16) },
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{ ORDATA (BCC1, kg_unit[1].BCC, 16) },
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{ ORDATA (BCC2, kg_unit[2].BCC, 16) },
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{ ORDATA (BCC3, kg_unit[3].BCC, 16) },
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{ ORDATA (BCC4, kg_unit[4].BCC, 16) },
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{ ORDATA (BCC5, kg_unit[5].BCC, 16) },
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{ ORDATA (BCC6, kg_unit[6].BCC, 16) },
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{ ORDATA (BCC7, kg_unit[7].BCC, 16) },
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{ ORDATA (DR0, kg_unit[0].DR, 16) },
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{ ORDATA (DR1, kg_unit[1].DR, 16) },
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{ ORDATA (DR2, kg_unit[2].DR, 16) },
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{ ORDATA (DR3, kg_unit[3].DR, 16) },
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{ ORDATA (DR4, kg_unit[4].DR, 16) },
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{ ORDATA (DR5, kg_unit[5].DR, 16) },
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{ ORDATA (DR6, kg_unit[6].DR, 16) },
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{ ORDATA (DR7, kg_unit[7].DR, 16) },
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{ ORDATA (PULSCNT0, kg_unit[0].PULSCNT, 16) },
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{ ORDATA (PULSCNT1, kg_unit[1].PULSCNT, 16) },
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{ ORDATA (PULSCNT2, kg_unit[2].PULSCNT, 16) },
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{ ORDATA (PULSCNT3, kg_unit[3].PULSCNT, 16) },
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{ ORDATA (PULSCNT4, kg_unit[4].PULSCNT, 16) },
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{ ORDATA (PULSCNT5, kg_unit[5].PULSCNT, 16) },
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{ ORDATA (PULSCNT6, kg_unit[6].PULSCNT, 16) },
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{ ORDATA (PULSCNT7, kg_unit[7].PULSCNT, 16) },
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{ ORDATA (DEVADDR, kg_dib.ba, 32), REG_HRO },
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{ NULL }
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};
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static const MTAB kg_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL, NULL, &show_addr, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "UNITS=0..8", &set_units, NULL, NULL },
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{ 0 }
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};
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#define DBG_REG (01)
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#define DBG_POLY (02)
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#define DBG_CYCLE (04)
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static const DEBTAB kg_debug[] = {
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{"REG", DBG_REG},
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{"POLY", DBG_POLY},
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{"CYCLE", DBG_CYCLE},
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{0},
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};
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DEVICE kg_dev = {
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"KG", (UNIT *) &kg_unit, (REG *) kg_reg, (MTAB *) kg_mod,
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KG_UNITS, 8, 16, 2, 8, 16,
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NULL, /* examine */
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NULL, /* deposit */
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&kg_reset, /* reset */
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NULL, /* boot */
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NULL, /* attach */
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NULL, /* detach */
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&kg_dib,
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DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_DEBUG,
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0, /* debug control */
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(DEBTAB *) &kg_debug, /* debug flags */
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NULL, /* memory size chage */
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NULL /* logical name */
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};
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/* KG I/O address routines */
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static t_stat kg_rd (int32 *data, int32 PA, int32 access)
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{
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int unit = (PA >> 3) & 07;
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if ((unit >= KG_UNITS) || (kg_unit[unit].flags & UNIT_DIS))
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return (SCPE_NXM);
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switch ((PA >> 1) & 03) {
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case 00: /* SR */
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d: rd SR %06o, PC %06o\n",
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unit, kg_unit[unit].SR, PC);
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*data = kg_unit[unit].SR & KG_SR_RDMASK;
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break;
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case 01: /* BCC */
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d rd BCC %06o, PC %06o\n",
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unit, kg_unit[unit].BCC, PC);
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*data = kg_unit[unit].BCC & DMASK;
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break;
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case 02: /* DR */
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break;
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default:
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break;
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}
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return (SCPE_OK);
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}
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static t_stat kg_wr (int32 data, int32 PA, int32 access)
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{
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int setup;
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int unit = (PA >> 3) & 07;
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if ((unit >= KG_UNITS) || (kg_unit[unit].flags & UNIT_DIS))
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return (SCPE_NXM);
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switch ((PA >> 1) & 03) {
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case 00: /* SR */
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if (access == WRITEB)
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data = (PA & 1) ?
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(kg_unit[unit].SR & 0377) | (data << 8) :
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(kg_unit[unit].SR & ~0377) | data;
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d: wr SR %06o, PC %06o\n",
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unit, data, PC);
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if (data & KGSR_M_CLR) {
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kg_unit[unit].PULSCNT = 0; /* not sure about this */
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kg_unit[unit].BCC = 0;
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kg_unit[unit].SR |= KGSR_M_DONE;
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}
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setup = (kg_unit[unit].SR & 017) ^ (data & 017);
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kg_unit[unit].SR = (kg_unit[unit].SR & ~KG_SR_WRMASK) |
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(data & KG_SR_WRMASK);
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/* if low 4b changed, reset C1 & C2 */
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if (setup) {
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kg_unit[unit].PULSCNT = 0;
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if (DEBUG_PRI(kg_dev, DBG_POLY))
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fprintf (sim_deb, ">>KG%d poly %s %d\n",
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unit, config[data & 017].name, config[data & 017].pulses);
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}
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if (data & KGSR_M_SEN)
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break;
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if (data & KGSR_M_STEP) {
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do_poly (unit, TRUE);
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break;
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}
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break;
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case 01: /* BCC */
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break; /* ignored */
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case 02: /* DR */
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if (access == WRITEB)
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data = (PA & 1) ?
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(kg_unit[unit].DR & 0377) | (data << 8) :
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(kg_unit[unit].DR & ~0377) | data;
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kg_unit[unit].DR = data & DMASK;
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d: wr DR %06o, data %06o, PC %06o\n",
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unit, kg_unit[unit].DR, data, PC);
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kg_unit[unit].SR &= ~KGSR_M_DONE;
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/* In a typical device, this is normally where we would use sim_activate()
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to initiate an I/O to be completed later. The KG is a little
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different. When it was first introduced, it's computation operation
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completed before another instruction could execute (on early PDP-11s),
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and software often took "advantage" of this fact by not bothering
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to check the status of the DONE bit. In reality, the execution
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time of the polynomial is dependent upon the width of the poly; if
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8 bits 1us, if 16 bits, 2us. Since known existing software will
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break if we actually defer the computation, it is performed immediately
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instead. However this could easily be made into a run-time option,
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if there were software to validate correct operation. */
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if (kg_unit[unit].SR & KGSR_M_SEN)
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do_poly (unit, FALSE);
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break;
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default:
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break;
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}
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return (SCPE_OK);
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}
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/* KG reset */
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static t_stat kg_reset (DEVICE *dptr)
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{
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int i;
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG: reset PC %06o\n", PC);
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for (i = 0; i < KG_UNITS; i++) {
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kg_unit[i].SR = KGSR_M_DONE;
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kg_unit[i].BCC = 0;
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kg_unit[i].PULSCNT = 0;
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}
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return (SCPE_OK);
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}
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static void cycleOneBit (int unit)
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{
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int quo;
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if (DEBUG_PRI(kg_dev, DBG_CYCLE))
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fprintf (sim_deb, ">>KG%d: cycle s BCC %06o DR %06o\n",
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unit, kg_unit[unit].BCC, kg_unit[unit].DR);
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||
if (kg_unit[unit].SR & KGSR_M_DONE)
|
||
return;
|
||
if ((kg_unit[unit].SR & KG_SR_POLYMASK) == 0)
|
||
kg_unit[unit].BCC = (kg_unit[unit].BCC & 077) |
|
||
((kg_unit[unit].BCC >> 2) & 07700);
|
||
kg_unit[unit].SR &= ~KGSR_M_QUO;
|
||
quo = (kg_unit[unit].BCC & 01) ^ (kg_unit[unit].DR & 01);
|
||
kg_unit[unit].BCC = (kg_unit[unit].BCC & ~01) | quo;
|
||
if (kg_unit[unit].SR & KGSR_M_LRC)
|
||
kg_unit[unit].BCC = (kg_unit[unit].SR & KGSR_M_16) ?
|
||
ROR(1, kg_unit[unit].BCC) :
|
||
RORB(1, kg_unit[unit].BCC);
|
||
else
|
||
kg_unit[unit].BCC = (kg_unit[unit].BCC & 01) ?
|
||
(kg_unit[unit].BCC >> 1) ^ config[kg_unit[unit].SR & 07].poly :
|
||
kg_unit[unit].BCC >> 1;
|
||
kg_unit[unit].DR >>= 1;
|
||
kg_unit[unit].SR |= quo << KGSR_V_QUO;
|
||
if ((kg_unit[unit].SR & KG_SR_POLYMASK) == 0)
|
||
kg_unit[unit].BCC = (kg_unit[unit].BCC & 077) |
|
||
((kg_unit[unit].BCC & 07700) << 2);
|
||
kg_unit[unit].PULSCNT++;
|
||
if (kg_unit[unit].PULSCNT >= config[kg_unit[unit].SR & 017].pulses)
|
||
kg_unit[unit].SR |= KGSR_M_DONE;
|
||
if (DEBUG_PRI(kg_dev, DBG_CYCLE))
|
||
fprintf (sim_deb, ">>KG%d: cycle e BCC %06o DR %06o\n",
|
||
unit, kg_unit[unit].BCC, kg_unit[unit].DR);
|
||
}
|
||
|
||
static void do_poly (int unit, t_bool step)
|
||
{
|
||
if (kg_unit[unit].SR & KGSR_M_DONE)
|
||
return;
|
||
if (step)
|
||
cycleOneBit (unit);
|
||
else {
|
||
while (!(kg_unit[unit].SR & KGSR_M_DONE))
|
||
cycleOneBit (unit);
|
||
}
|
||
}
|
||
|
||
static t_stat set_units (UNIT *u, int32 val, char *s, void *desc)
|
||
{
|
||
int32 i, units;
|
||
t_stat stat;
|
||
|
||
if (s == NULL)
|
||
return (SCPE_ARG);
|
||
units = get_uint (s, 10, KG_UNITS, &stat);
|
||
if (stat != SCPE_OK)
|
||
return (stat);
|
||
for (i = 0; i < KG_UNITS; i++) {
|
||
if (i < units)
|
||
kg_unit[i].flags &= ~UNIT_DIS;
|
||
else
|
||
kg_unit[i].flags |= UNIT_DIS;
|
||
}
|
||
kg_dev.numunits = units;
|
||
return (SCPE_OK);
|
||
}
|