9515201238
Card reader handle EOF correctly.
Line printer proper handling of paging.
Magtape clean up debug message.
Update 7010, 7070, 7080 for EOF handling.
1710 lines
67 KiB
C
1710 lines
67 KiB
C
/* i7090_chan.c: IBM 7090 Channel simulator
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Copyright (c) 2005-2016, Richard Cornwell
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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channel
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The system state for the IBM 7090 channel is:
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There are 4 types of channel:
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704: Basic polled mode transfer. Channel only manages
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status and disconnect of devices.
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7607: Basic channel.
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7909: Enhanced channel for disk, hypertape and com controlers.
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7289: Special CTSS channel, like 7607, but first command
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is drum address.
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Common registers to all but 704 channels.
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ADDR<0:16> Address of next command.
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CMD<0:6> Channel command.
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WC<0:15> Word count remaining.
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ASM<0:35> Assembled data from devices.
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LOCATION<0:16> Location to read or write next word from.
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7909 adds following two registers.
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SMS<0:6> Select register.
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COUNT<0:6> Counter.
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Simulation registers to handle device handshake.
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STATUS<0:16> Simulated register for basic channel status.
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SENSE<0:16> Additional flags for 7909 channels.
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*/
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#include "i7090_defs.h"
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extern uint16 iotraps;
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extern uint8 iocheck;
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extern uint8 dualcore;
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extern UNIT cpu_unit;
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extern uint16 IC;
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extern t_uint64 MQ;
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extern uint32 drum_addr;
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extern t_uint64 hsdrm_addr;
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t_stat chan_reset(DEVICE * dptr);
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void chan_fetch(int chan);
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t_stat chan_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
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const char *cptr);
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const char *chan_description (DEVICE *dptr);
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void chan9_seqcheck(int chan);
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uint32 dly_cmd(UNIT *, uint16, uint16);
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/* Channel data structures
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chan_dev Channel device descriptor
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chan_unit Channel unit descriptor
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chan_reg Channel register list
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chan_mod Channel modifiers list
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*/
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uint16 caddr[NUM_CHAN]; /* Channel memory address */
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uint8 bcnt[NUM_CHAN]; /* Channel character count */
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uint8 cmd[NUM_CHAN]; /* Current command */
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uint16 wcount[NUM_CHAN]; /* Word count */
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t_uint64 assembly[NUM_CHAN]; /* Assembly register */
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uint16 location[NUM_CHAN]; /* Pointer to next opcode */
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uint32 chan_flags[NUM_CHAN]; /* Unit status */
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uint16 chan_info[NUM_CHAN]; /* Private channel info */
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uint8 counter[NUM_CHAN]; /* Channel counter */
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uint8 sms[NUM_CHAN]; /* Channel mode infomation */
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uint8 chan_irq[NUM_CHAN]; /* Channel has a irq pending */
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/* 7607 channel commands */
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#define IOCD 000
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#define TCH 010
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#define IORP 020
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#define IORT 030
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#define IOCP 040
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#define IOCT 050
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#define IOSP 060
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#define IOST 070
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/* 7909 channel commands */
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#define WTR 000
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#define WTRX 004
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#define XMT 001
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#define XMTX 005
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#define TCH9 010
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#define TCHX 014
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#define LIPT 011
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#define LIPTX 015
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#define CTL 020
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#define CTLR 021
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#define CTLW 024
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#define SNS 025
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#define LAR 030
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#define SAR 031
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#define TWT 034
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#define XXXX 035
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#define CPYP 040
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#define CPYP2 041
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#define CPYP3 044
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#define CPYP4 045
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#define CPYD 050
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#define TCM 051
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#define CPYDX 054
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#define TCMX 055
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#define XXXZ 060
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#define LIP 061
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#define TDC 064
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#define LCC 065
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#define SMS 070
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#define ICC 071
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#define ICCX 075
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/* Values for chan_info */
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#define CHAINF_START 1 /* Channel started */
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#define CHAINF_RUN 2 /* Transfer in progress */
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#define nxt_chan_addr(chan) caddr[chan] = \
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((dualcore) ? (0100000 & caddr[chan]) : 0) | \
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((caddr[chan] + 1) & MEMMASK);
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/* Globally visible flags */
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const char *chan_type_name[] = {
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"Polled", "Unit Record", "7607", "7909", "7289"};
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/* Delay device for IOD instruction */
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DIB dly_dib =
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{ CH_TYP_PIO, 1, 0333, 07777, &dly_cmd, NULL };
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UNIT chan_unit[] = {
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/* Puesdo channel for 704 devices */
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{UDATA(NULL, UNIT_DISABLE | CHAN_SET |
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CHAN_S_TYPE(CHAN_PIO)|UNIT_S_CHAN(0), 0)},
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/* Normal channels */
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#if NUM_CHAN > 1
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{UDATA(NULL, CHAN_AUTO | CHAN_SET | CHAN_S_TYPE(CHAN_7607)|
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UNIT_S_CHAN(CHAN_A), 0)}, /* A */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_B), 0)}, /* B */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_C), 0)}, /* C */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_D), 0)}, /* D */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_E), 0)}, /* E */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_F), 0)}, /* F */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_G), 0)}, /* G */
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{UDATA(NULL, UNIT_DISABLE | CHAN_AUTO|UNIT_S_CHAN(CHAN_H), 0)} /* H */
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#endif
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};
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REG chan_reg[] = {
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{BRDATA(ADDR, caddr, 8, 16, NUM_CHAN), REG_RO|REG_FIT},
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{BRDATA(CMD, cmd, 8, 6, NUM_CHAN), REG_RO|REG_FIT},
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{BRDATA(WC, wcount, 8, 15, NUM_CHAN), REG_RO|REG_FIT},
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{BRDATA(ASM, assembly, 8, 36, NUM_CHAN), REG_RO|REG_FIT},
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{BRDATA(LOCATION, location, 8, 16, NUM_CHAN), REG_RO|REG_FIT},
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{BRDATA(FLAGS, chan_flags, 2, 32, NUM_CHAN), REG_RO|REG_FIT},
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{BRDATA(COUNTER, counter, 8, 6, NUM_CHAN), REG_RO|REG_FIT },
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{BRDATA(SMS, sms, 2, 6, NUM_CHAN), REG_RO|REG_FIT},
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{NULL}
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};
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MTAB chan_mod[] = {
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#ifdef I7090
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{CHAN_MODEL, CHAN_S_TYPE(CHAN_PIO), "704 Channel", NULL, NULL, NULL, NULL},
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{CHAN_MODEL, CHAN_S_TYPE(CHAN_7607), "7607", "7607", NULL, NULL, NULL},
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{CHAN_MODEL, CHAN_S_TYPE(CHAN_7909), "7909", "7909", NULL, NULL, NULL},
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{CHAN_MODEL, CHAN_S_TYPE(CHAN_7289), "7289", "7289", NULL, NULL, NULL},
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{CHAN_AUTO, 0, "FIXED", "FIXED", NULL, NULL, NULL},
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{CHAN_AUTO, CHAN_AUTO, "AUTO", "AUTO", NULL, NULL, NULL},
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{CHAN_SET, CHAN_SET, "set", NULL, NULL, NULL, NULL},
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{MTAB_VUN, 0, "Units", NULL, NULL, &print_chan, NULL},
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#endif
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{0}
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};
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/* Simulator debug controls */
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DEBTAB chn_debug[] = {
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{"CHANNEL", DEBUG_CHAN},
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{"TRAP", DEBUG_TRAP},
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{"CMD", DEBUG_CMD},
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{"DATA", DEBUG_DATA},
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{"DETAIL", DEBUG_DETAIL},
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{"EXP", DEBUG_EXP},
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{"SENSE", DEBUG_SNS},
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{"CH0", 0x0100 << 0},
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{"CHA", 0x0100 << 1},
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{"CHB", 0x0100 << 2},
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{"CHC", 0x0100 << 3},
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{"CHD", 0x0100 << 4},
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{"CHE", 0x0100 << 5},
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{"CHF", 0x0100 << 6},
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{"CHG", 0x0100 << 7},
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{"CHH", 0x0100 << 8},
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{0, 0}
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};
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DEVICE chan_dev = {
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"CH", chan_unit, chan_reg, chan_mod,
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NUM_CHAN, 8, 15, 1, 8, 36,
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NULL, NULL, &chan_reset, NULL, NULL, NULL,
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&dly_dib, DEV_DEBUG, 0, chn_debug,
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NULL, NULL, &chan_help, NULL, NULL, &chan_description
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};
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/* Nothing special to do, just return true if cmd is write and we got here */
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uint32 dly_cmd(UNIT * uptr, uint16 cmd, uint16 dev)
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{
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if (cmd == IO_WRS)
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return SCPE_OK;
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return SCPE_NODEV;
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}
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t_stat
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chan_reset(DEVICE * dptr)
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{
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int i;
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/* Clear channel assignment */
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for (i = 0; i < NUM_CHAN; i++) {
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if (chan_unit[i].flags & CHAN_AUTO)
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chan_unit[i].flags &= ~CHAN_SET;
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else
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chan_unit[i].flags |= CHAN_SET;
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chan_flags[i] = 0;
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chan_info[i] = 0;
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caddr[i] = 0;
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cmd[i] = 0;
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sms[i] = 0;
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bcnt[i] = 6;
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chan_irq[i] = 0;
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wcount[i] = 0;
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location[i] = 0;
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counter[i] = 0;
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}
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return chan_set_devs(dptr);
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}
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/* Boot from given device */
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t_stat
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chan_boot(int32 unit_num, DEVICE * dptr)
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{
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/* Tell device to do a read, 3 records */
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/* Set channel address = 0, wc = 3, location = 0, CMD=0 */
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/* Set M[1] = TCO? 1, IC = 1 */
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UNIT *uptr = &dptr->units[unit_num];
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int chan = UNIT_G_CHAN(uptr->flags);
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if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO) {
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IC = 0;
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} else {
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IC = 1;
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/* Grab next channel command */
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location[chan] = 0;
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chan_fetch(chan);
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}
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chan_flags[chan] |= STA_ACTIVE;
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chan_flags[chan] &= ~STA_PEND;
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return SCPE_OK;
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}
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/* Preform BCD to binary translation for 7909 channel */
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void
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bcd_xlat(int chan, int direction)
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{
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int i;
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t_uint64 na = 0;
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for (i = 30; i >= 0; i -= 6) {
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uint8 ch = (uint8)(assembly[chan] >> i) & 077;
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if (direction) { /* D->M Read */
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switch (ch & 060) {
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case 000:
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if (ch == 0)
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ch = 060;
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else if (ch == 012)
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ch = 0;
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break;
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case 020:
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case 060:
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ch ^= 040;
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case 040:
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break;
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}
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} else { /* M->D Write */
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switch (ch & 060) {
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case 000:
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if (ch == 0)
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ch = 012;
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else if (ch == 012)
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ch = 020;
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break;
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case 060:
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if (ch == 060)
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ch = 060; /* => 000 */
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case 020:
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ch ^= 040;
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case 040:
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break;
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}
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}
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na |= ((t_uint64) ch) << i;
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}
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assembly[chan] = na;
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}
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/* Execute the next channel instruction. */
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void
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chan_proc()
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{
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int chan;
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#ifdef I7090
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int cmask;
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#endif
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/* Scan channels looking for work */
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for (chan = 0; chan < NUM_CHAN; chan++) {
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/* Skip if channel is disabled */
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if (chan_unit[chan].flags & UNIT_DIS)
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continue;
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/* If channel is disconnecting, do nothing */
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if (chan_flags[chan] & DEV_DISCO)
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continue;
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#ifdef I7090
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cmask = 0x0100 << chan;
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#endif
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switch (CHAN_G_TYPE(chan_unit[chan].flags)) {
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case CHAN_PIO:
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if ((chan_flags[chan] & (DEV_REOR|DEV_SEL|DEV_FULL)) ==
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(DEV_SEL|DEV_REOR)) {
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sim_debug(DEBUG_DETAIL, &chan_dev, "chan got EOR\n");
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chan_flags[chan] |= (DEV_DISCO);
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}
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break;
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#ifdef I7090
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case CHAN_7289: /* Special channel for HS drum */
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/* On first command, copy it to drum address and load another */
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if ((chan_info[chan] & (CHAINF_RUN | CHAINF_START)) ==
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CHAINF_START) {
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hsdrm_addr = M[location[chan] - 1];
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chan_info[chan] |= CHAINF_RUN;
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if (chan_dev.dctrl & cmask)
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sim_debug(DEBUG_DETAIL, &chan_dev, "chan %d HDaddr %012llo\n",
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chan, hsdrm_addr);
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chan_fetch(chan);
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continue;
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}
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if ((chan_info[chan] & CHAINF_START) == 0)
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continue;
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/* Fall through and behave like 7607 from now on */
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case CHAN_7607:
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/* If no select, stop channel */
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if ((chan_flags[chan] & DEV_SEL) == 0
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&& (chan_flags[chan] & STA_TWAIT)) {
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if (chan_dev.dctrl & cmask)
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sim_debug(DEBUG_TRAP, &chan_dev, "chan %d Trap IC=%06o\n",
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chan, IC);
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iotraps |= 1 << chan;
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chan_flags[chan] &= ~(STA_START | STA_ACTIVE | STA_WAIT | STA_TWAIT);
|
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chan_info[chan] = 0;
|
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continue;
|
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}
|
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|
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/* If device requested attention, abort current command */
|
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if (chan_flags[chan] & CHS_ATTN) {
|
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if (chan_flags[chan] & DEV_SEL)
|
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chan_flags[chan] |= (DEV_DISCO);
|
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chan_flags[chan] &=
|
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~(CHS_ATTN | STA_START | STA_ACTIVE | STA_WAIT);
|
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chan_info[chan] = 0;
|
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switch(cmd[chan]) {
|
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case IORT:
|
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case IOCT:
|
||
case IOST:
|
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iotraps |= 1 << chan;
|
||
break;
|
||
}
|
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if (chan_dev.dctrl & cmask)
|
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sim_debug(DEBUG_DETAIL, &chan_dev,
|
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"chan %d attn< %o\n", chan, cmd[chan] & 070);
|
||
continue;
|
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}
|
||
|
||
/* If we are waiting and get EOR, then continue along */
|
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if ((chan_flags[chan] & (STA_WAIT|DEV_REOR|DEV_FULL)) ==
|
||
(STA_WAIT|DEV_REOR)) {
|
||
chan_flags[chan] &= ~(STA_WAIT|DEV_WEOR);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev, "chan %d clr wait EOR\n",
|
||
chan);
|
||
}
|
||
|
||
/* All done if waiting for EOR */
|
||
if (chan_flags[chan] & STA_WAIT)
|
||
continue;
|
||
|
||
/* No activity, nothing happening here folks, move along */
|
||
if ((chan_flags[chan] & (STA_ACTIVE | STA_WAIT)) == 0) {
|
||
/* Check if Trap wait and no pending LCHx, force disconnect */
|
||
if ((chan_flags[chan] & (STA_TWAIT|STA_PEND|DEV_SEL))
|
||
== (STA_TWAIT|DEV_SEL))
|
||
chan_flags[chan] |= DEV_DISCO|DEV_WEOR;
|
||
continue;
|
||
}
|
||
|
||
/* If command is a transfer, Do transfer */
|
||
if ((cmd[chan] & 070) == TCH) {
|
||
location[chan] = caddr[chan];
|
||
chan_fetch(chan);
|
||
/* Give up bus if next command is a tranfer. */
|
||
if ((cmd[chan] & 070) == TCH)
|
||
continue;
|
||
}
|
||
|
||
/* None disabled, active channel is if transfering */
|
||
switch (chan_flags[chan] & (DEV_WRITE | DEV_FULL)) {
|
||
/* Device has given us a dataword */
|
||
case DEV_FULL:
|
||
/* If we are not waiting EOR save it in memory */
|
||
if (/*(chan_flags[chan] & CHS_ERR) == 0 &&*/ (cmd[chan] & 1) == 0) {
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DATA, &chan_dev, "chan %d data < %012llo\n",
|
||
chan, assembly[chan]);
|
||
M[caddr[chan]] = assembly[chan];
|
||
} else {
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DATA, &chan_dev, "chan %d data * %012llo\n",
|
||
chan, assembly[chan]);
|
||
}
|
||
nxt_chan_addr(chan);
|
||
assembly[chan] = 0;
|
||
bcnt[chan] = 6;
|
||
wcount[chan]--;
|
||
chan_flags[chan] &= ~DEV_FULL;
|
||
|
||
/* Device does not need a word and has not given us one */
|
||
case 0:
|
||
/* Device idle, expecting data from it */
|
||
|
||
/* Check if got EOR */
|
||
if (chan_flags[chan] & DEV_REOR) {
|
||
switch (cmd[chan] & 070) {
|
||
case IORP:
|
||
case IOSP:
|
||
chan_flags[chan] &= ~(DEV_REOR|DEV_WEOR/* | STA_WAIT*/);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d EOR< %o\n",
|
||
chan, cmd[chan] & 070);
|
||
chan_fetch(chan);
|
||
chan_flags[chan] |= STA_ACTIVE;
|
||
continue; /* Handle new command next time */
|
||
case IORT:
|
||
case IOST:
|
||
chan_flags[chan] &= ~(DEV_REOR|DEV_WEOR);
|
||
chan_flags[chan] &= ~(STA_ACTIVE/*|STA_WAIT*/);
|
||
chan_flags[chan] |= STA_TWAIT;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d EOR< %o\n",
|
||
chan, cmd[chan] & 070);
|
||
continue;
|
||
}
|
||
}
|
||
|
||
/* Done with transfer */
|
||
if (wcount[chan] == 0
|
||
/* && (chan_flags[chan] & STA_WAIT) == 0*/) {
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d < WC0 %o\n", chan,
|
||
cmd[chan] & 070);
|
||
switch (cmd[chan] & 070) {
|
||
case IOCD: /* Transfer and disconnect */
|
||
chan_flags[chan] |= DEV_DISCO | DEV_WEOR;
|
||
chan_flags[chan] &=
|
||
~(STA_START | STA_ACTIVE | STA_PEND);
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7289) {
|
||
iotraps |= 1 << chan;
|
||
sim_debug(DEBUG_TRAP, &chan_dev, "chan %d Trap\n",
|
||
chan);
|
||
}
|
||
chan_info[chan] = 0;
|
||
break;
|
||
|
||
case IORP: /* Transfer until end of record */
|
||
chan_flags[chan] |= STA_WAIT | DEV_WEOR;
|
||
break;
|
||
case IOSP: /* Transfer and proceed */
|
||
case IOCP: /* Transfer and proceed, no eor */
|
||
chan_fetch(chan);
|
||
break;
|
||
|
||
case IORT: /* Transfer, continue if LCH pending, */
|
||
/* else trap, Skip rest of record */
|
||
chan_flags[chan] |= STA_WAIT | DEV_WEOR /*| STA_TWAIT*/;
|
||
break;
|
||
case IOST: /* Transfer, continue if LCH, else trap */
|
||
case IOCT: /* Transfer but no end of record, else trap */
|
||
chan_flags[chan] &= ~(STA_ACTIVE/*|STA_WAIT*/);
|
||
chan_flags[chan] |= STA_TWAIT;
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* Check if device left us */
|
||
if ((chan_flags[chan] & DEV_SEL) == 0) {
|
||
switch (cmd[chan] & 070) {
|
||
case IOCP:
|
||
case IORP:
|
||
case IOSP:
|
||
case IOCD:
|
||
chan_flags[chan] &= ~(STA_START|STA_ACTIVE|STA_WAIT);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d -Sel< %o\n", chan, cmd[chan] & 070);
|
||
continue; /* Handle new command next time */
|
||
case IOCT:
|
||
case IORT:
|
||
case IOST: /* Behave like EOR */
|
||
chan_flags[chan] &= ~(STA_ACTIVE|STA_WAIT);
|
||
chan_flags[chan] |= STA_TWAIT;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d -Sel< %o\n", chan, cmd[chan] & 070);
|
||
continue;
|
||
}
|
||
}
|
||
|
||
break;
|
||
|
||
/* Device has word, but has not taken it yet */
|
||
case DEV_WRITE | DEV_FULL:
|
||
if (chan_flags[chan] & DEV_REOR) {
|
||
switch (cmd[chan] & 070) {
|
||
case IORP:
|
||
case IORT:
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d EOR>+ %o\n", chan, cmd[chan] & 070);
|
||
chan_flags[chan] &= ~DEV_FULL;
|
||
}
|
||
}
|
||
continue; /* Do nothing if no data xfer pending */
|
||
|
||
/* Device needs a word of data */
|
||
case DEV_WRITE: /* Device needs data word */
|
||
/* Check if device left us */
|
||
if ((chan_flags[chan] & DEV_SEL) == 0) {
|
||
switch (cmd[chan] & 070) {
|
||
case IOCP:
|
||
case IORP:
|
||
case IOSP:
|
||
chan_fetch(chan);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d -Sel< %o\n", chan, cmd[chan] & 070);
|
||
continue; /* Handle new command next time */
|
||
case IOCD:
|
||
chan_flags[chan] &= ~(STA_START|STA_ACTIVE);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d -Sel< %o\n", chan, cmd[chan] & 070);
|
||
continue;
|
||
case IOCT:
|
||
case IORT:
|
||
case IOST:
|
||
chan_flags[chan] &= ~(STA_ACTIVE);
|
||
chan_flags[chan] |= STA_TWAIT;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d -Sel< %o\n", chan, cmd[chan] & 070);
|
||
continue;
|
||
}
|
||
}
|
||
|
||
/* Wait for device to recognize EOR */
|
||
if (chan_flags[chan] & DEV_WEOR) {
|
||
continue;
|
||
}
|
||
|
||
/* Check if got EOR */
|
||
if (chan_flags[chan] & DEV_REOR) {
|
||
switch (cmd[chan] & 070) {
|
||
case IORP:
|
||
chan_flags[chan] &= ~(DEV_REOR);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d EOR> %o\n", chan, cmd[chan] & 070);
|
||
chan_fetch(chan);
|
||
chan_flags[chan] |= STA_ACTIVE;
|
||
break;
|
||
case IORT:
|
||
chan_flags[chan] &= ~(DEV_REOR|STA_ACTIVE);
|
||
chan_flags[chan] |= STA_TWAIT;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d EOR> %o\n", chan, cmd[chan] & 070);
|
||
continue;
|
||
}
|
||
}
|
||
|
||
/* Give device new word if we have one */
|
||
if (wcount[chan] != 0) {
|
||
|
||
if (cmd[chan] & 1) {
|
||
assembly[chan] = 0;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DATA, &chan_dev,
|
||
"chan %d data > *\n", chan);
|
||
} else {
|
||
assembly[chan] = M[caddr[chan]];
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DATA, &chan_dev,
|
||
"chan %d data > %012llo\n", chan,
|
||
assembly[chan]);
|
||
}
|
||
nxt_chan_addr(chan);
|
||
bcnt[chan] = 6;
|
||
wcount[chan]--;
|
||
chan_flags[chan] |= DEV_FULL;
|
||
continue; /* Don't start next command until data taken */
|
||
}
|
||
|
||
/* Get here if wcount == 0 */
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d > WC0 %o stat=%08x\n",
|
||
chan, cmd[chan] & 070, chan_flags[chan]);
|
||
|
||
switch (cmd[chan] & 070) {
|
||
case IOCD: /* Transfer and disconnect */
|
||
chan_flags[chan] |= DEV_DISCO | DEV_WEOR;
|
||
chan_flags[chan] &=
|
||
~(STA_START | STA_ACTIVE | STA_PEND);
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7289)
|
||
iotraps |= 1 << chan;
|
||
chan_info[chan] = 0;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d > DISCO\n", chan);
|
||
break;
|
||
|
||
case IORP: /* Transfer until end of record */
|
||
chan_flags[chan] |= DEV_WEOR|STA_WAIT;
|
||
break;
|
||
case IOSP: /* Transfer and proceed */
|
||
case IOCP: /* Transfer and proceed, no eor */
|
||
chan_fetch(chan);
|
||
break;
|
||
|
||
case IORT: /* Transfer, continue if LCH pending, */
|
||
/* else trap, Skip rest of record */
|
||
chan_flags[chan] |= DEV_WEOR|STA_WAIT;
|
||
break;
|
||
case IOST: /* Transfer, continue if LCH, else trap */
|
||
case IOCT: /* Transfer but no end of record, else trap */
|
||
chan_flags[chan] &= ~STA_ACTIVE;
|
||
chan_flags[chan] |= STA_TWAIT;
|
||
break;
|
||
}
|
||
}
|
||
break;
|
||
|
||
case CHAN_7909:
|
||
again:
|
||
/* If waiting for EOR just spin */
|
||
if (chan_flags[chan] & STA_WAIT) {
|
||
if (chan_flags[chan] & DEV_REOR) {
|
||
chan_flags[chan] &=
|
||
~(STA_WAIT|DEV_REOR|CTL_SNS|CTL_READ|CTL_WRITE);
|
||
if (chan_flags[chan] & DEV_SEL)
|
||
chan_flags[chan] |= DEV_DISCO;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d EOR Continue\n", chan);
|
||
}
|
||
continue;
|
||
}
|
||
|
||
/* Nothing more to do if not active. */
|
||
if (chan_flags[chan] & STA_ACTIVE) {
|
||
/* Execute the next command */
|
||
switch (cmd[chan]) {
|
||
case XXXZ:
|
||
case XXXX:
|
||
case TWT:
|
||
/* Check if command not allowed */
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_TRAP, &chan_dev, "chan %d CPU Trap\n",
|
||
chan);
|
||
iotraps |= 1 << chan;
|
||
chan_flags[chan] |= CTL_INHB;
|
||
case WTR:
|
||
case WTRX:
|
||
/* Check if command not allowed */
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
/* Go into a wait state */
|
||
chan_flags[chan] &= ~STA_ACTIVE;
|
||
location[chan]--;
|
||
break;
|
||
case XMT:
|
||
case XMTX:
|
||
/* Check if command not allowed */
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
if (wcount[chan] == 0)
|
||
break;
|
||
wcount[chan]--;
|
||
M[caddr[chan]] = M[location[chan]];
|
||
nxt_chan_addr(chan);
|
||
bcnt[chan] = 6;
|
||
location[chan]++;
|
||
continue;
|
||
case LIPT:
|
||
case LIPTX:
|
||
chan_flags[chan] &= ~(SNS_IRQ | SNS_IMSK | SNS_UEND);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_TRAP, &chan_dev, "chan %d %02o LIPT\n",
|
||
chan, chan_flags[chan] & 077);
|
||
/* Fall through */
|
||
|
||
case TCH9:
|
||
case TCHX:
|
||
location[chan] = caddr[chan];
|
||
break;
|
||
case LIP:
|
||
chan_flags[chan] &= ~(SNS_IRQ | SNS_IMSK | SNS_UEND);
|
||
location[chan] = (uint16)M[040 + (2 * chan)] & MEMMASK;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_TRAP, &chan_dev, "chan %d %02o LIP\n",
|
||
chan, chan_flags[chan] & 077);
|
||
break;
|
||
case CTL:
|
||
if (chan_flags[chan] & CTL_CNTL)
|
||
goto xfer;
|
||
if (chan_flags[chan] & (CTL_READ | CTL_WRITE | CTL_SNS)) {
|
||
chan9_seqcheck(chan);
|
||
continue;
|
||
}
|
||
chan_flags[chan] |= CTL_CNTL;
|
||
goto finddev;
|
||
case CTLR:
|
||
if (chan_flags[chan] & CTL_CNTL)
|
||
goto xfer;
|
||
if (chan_flags[chan] & (CTL_READ | CTL_WRITE | CTL_SNS)) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
chan_flags[chan] |= CTL_CNTL | CTL_PREAD;
|
||
goto finddev;
|
||
case CTLW:
|
||
if (chan_flags[chan] & CTL_CNTL)
|
||
goto xfer;
|
||
if (chan_flags[chan] & (CTL_READ | CTL_WRITE | CTL_SNS)) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
chan_flags[chan] |= CTL_CNTL | CTL_PWRITE;
|
||
goto finddev;
|
||
case SNS:
|
||
if (chan_flags[chan] & (CTL_CNTL | CTL_READ | CTL_WRITE)) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
chan_flags[chan] |= CTL_SNS;
|
||
finddev:
|
||
chan_flags[chan] &= ~(DEV_REOR|CTL_END|DEV_WEOR);
|
||
{
|
||
DEVICE **dptr;
|
||
UNIT *uptr;
|
||
DIB *dibp;
|
||
|
||
for (dptr = sim_devices; *dptr != NULL; dptr++) {
|
||
int num = (*dptr)->numunits;
|
||
int j;
|
||
|
||
dibp = (DIB *) (*dptr)->ctxt;
|
||
/* If not device or 7909 type, just skip */
|
||
if (dibp == 0 || (dibp->ctype & CH_TYP_79XX) == 0)
|
||
continue;
|
||
uptr = (*dptr)->units;
|
||
for (j = 0; j < num; j++, uptr++) {
|
||
if ((uptr->flags & UNIT_DIS) == 0 &&
|
||
UNIT_G_CHAN(uptr->flags) == chan &&
|
||
(sms[chan] & 1) ==
|
||
((UNIT_SELECT & uptr->flags) != 0)) {
|
||
goto found;
|
||
}
|
||
}
|
||
}
|
||
/* If no device, stop right now */
|
||
chan9_set_error(chan, SNS_ADCHECK);
|
||
chan_flags[chan] &= ~(CTL_PREAD | CTL_PWRITE | CTL_SNS |
|
||
CTL_CNTL);
|
||
iotraps |= 1 << chan;
|
||
chan_flags[chan] &= ~STA_ACTIVE;
|
||
break;
|
||
found:
|
||
/* Get channel ready to transfer */
|
||
chan_flags[chan] &=
|
||
~(CTL_END|CTL_SEL|DEV_REOR|DEV_FULL);
|
||
bcnt[chan] = 6;
|
||
|
||
/* Call device to start it running */
|
||
if (sms[chan] & 1)
|
||
chan_flags[chan] |= CTL_SEL;
|
||
switch (dibp->cmd(uptr, cmd[chan], sms[chan])) {
|
||
case SCPE_IOERR:
|
||
case SCPE_NODEV:
|
||
chan9_set_error(chan, SNS_IOCHECK);
|
||
iotraps |= 1 << chan;
|
||
chan_flags[chan] &= ~(CTL_PREAD|CTL_PWRITE|CTL_SNS|
|
||
CTL_CNTL|STA_ACTIVE);
|
||
continue;
|
||
case SCPE_BUSY: /* Device not ready yet, wait */
|
||
continue;
|
||
case SCPE_OK: /* Device will be waiting for command */
|
||
break;
|
||
}
|
||
}
|
||
/* Special out for sense command */
|
||
if (cmd[chan] == SNS) {
|
||
chan_flags[chan] &= ~DEV_WRITE;
|
||
chan_flags[chan] |= DEV_SEL;
|
||
break;
|
||
}
|
||
chan_flags[chan] |= DEV_WRITE;
|
||
xfer:
|
||
/* Check if comand tranfer done */
|
||
if (chan_flags[chan] & DEV_REOR) {
|
||
chan_flags[chan] &=
|
||
~(DEV_WRITE | DEV_REOR | DEV_FULL);
|
||
chan_flags[chan] &= ~(CTL_READ | CTL_WRITE);
|
||
if ((chan_flags[chan] & CTL_END) == 0)
|
||
chan_flags[chan] |= (chan_flags[chan] &
|
||
(CTL_PREAD | CTL_PWRITE)) >> 2;
|
||
if ((chan_flags[chan] & (SNS_UEND|CTL_END)) ==
|
||
(SNS_UEND|CTL_END) && (sms[chan] & 010) == 0)
|
||
chan_flags[chan] &= ~STA_ACTIVE;
|
||
chan_flags[chan] &= ~(CTL_CNTL | CTL_PREAD |
|
||
CTL_PWRITE | CTL_END);
|
||
if (chan_flags[chan] & CTL_WRITE)
|
||
chan_flags[chan] |= DEV_WRITE;
|
||
bcnt[chan] = 6;
|
||
break;
|
||
}
|
||
|
||
/* Check if device ready for next command word */
|
||
if ((chan_flags[chan] & (DEV_WRITE | DEV_FULL)) ==
|
||
DEV_WRITE) {
|
||
assembly[chan] = M[caddr[chan]];
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_CMD, &chan_dev,
|
||
"chan %d cmd > %012llo\n",
|
||
chan, assembly[chan]);
|
||
nxt_chan_addr(chan);
|
||
bcnt[chan] = 6;
|
||
chan_flags[chan] |= DEV_FULL;
|
||
}
|
||
continue;
|
||
|
||
case LAR:
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
assembly[chan] = M[caddr[chan]];
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_CMD, &chan_dev,
|
||
"chan %d LAR > %012llo\n",
|
||
chan, assembly[chan]);
|
||
break;
|
||
case SAR:
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_CMD, &chan_dev,
|
||
"chan %d SAR < %012llo\n",
|
||
chan, assembly[chan]);
|
||
M[caddr[chan]] = assembly[chan];
|
||
break;
|
||
case CPYP:
|
||
case CPYP2:
|
||
case CPYP3:
|
||
case CPYP4:
|
||
if (chan_flags[chan] & (DEV_REOR|CTL_END)) {
|
||
if (sms[chan] & 0100) {
|
||
chan9_set_error(chan, SNS_UEND);
|
||
if (chan_flags[chan] & DEV_SEL)
|
||
chan_flags[chan] |= (DEV_DISCO | DEV_WEOR);
|
||
chan_flags[chan] &=
|
||
~(STA_WAIT|DEV_REOR|CTL_SNS|CTL_READ|CTL_WRITE);
|
||
break;
|
||
}
|
||
if (wcount[chan] != 0)
|
||
chan_flags[chan] &= ~(DEV_REOR);
|
||
}
|
||
case CPYD:
|
||
case CPYDX:
|
||
if ((chan_flags[chan] & (CTL_READ|CTL_WRITE|CTL_SNS))==0) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
|
||
|
||
if ((chan_flags[chan] & DEV_FULL) == 0) {
|
||
/* Check if we still have a select signal */
|
||
if (wcount[chan] != 0 &&
|
||
(chan_flags[chan] & DEV_SEL) == 0) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
|
||
/* Check if last word transfered */
|
||
if (wcount[chan] == 0) {
|
||
if (cmd[chan] == CPYD || cmd[chan] == CPYDX ||
|
||
chan_flags[chan] & SNS_UEND) {
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d DISC %o\n", chan, cmd[chan] & 070);
|
||
if (sms[chan] & 0100 &&
|
||
(chan_flags[chan] & DEV_REOR) == 0)
|
||
chan9_set_error(chan, SNS_UEND);
|
||
chan_flags[chan] |= (DEV_WEOR);
|
||
if (chan_flags[chan] & DEV_SEL)
|
||
chan_flags[chan] |= DEV_DISCO;
|
||
chan_flags[chan] &=
|
||
~(CTL_SNS | CTL_READ | CTL_WRITE);
|
||
if ((chan_flags[chan] & (SNS_UEND|CTL_END)) ==
|
||
(SNS_UEND|CTL_END) &&
|
||
(sms[chan] & 010) == 0)
|
||
chan_flags[chan] &= ~STA_ACTIVE;
|
||
} else {
|
||
if (chan_flags[chan] & DEV_REOR)
|
||
chan_flags[chan] &= ~DEV_REOR;
|
||
}
|
||
break;
|
||
}
|
||
|
||
/* Check for record end in non-concurrent IRQ mode*/
|
||
if (chan_flags[chan] & DEV_REOR && sms[chan] & 0100) {
|
||
chan9_set_error(chan, SNS_UEND);
|
||
chan_flags[chan] &= ~(CTL_SNS|CTL_READ|CTL_WRITE);
|
||
if (chan_flags[chan] & DEV_SEL)
|
||
chan_flags[chan] |= (DEV_DISCO | DEV_WEOR);
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* Check if ready to transfer something */
|
||
switch (chan_flags[chan] & (DEV_WRITE | DEV_FULL)) {
|
||
case DEV_WRITE | DEV_FULL:
|
||
case 0:
|
||
/* If device ended, quit transfer */
|
||
if (chan_flags[chan] & CTL_END) {
|
||
/* Disconnect channel if select still active */
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan_flags[chan] |= (DEV_DISCO);
|
||
chan_flags[chan] &= ~(STA_WAIT);
|
||
}
|
||
if (sms[chan] & 0100 && wcount[chan] != 0)
|
||
chan9_set_error(chan, SNS_UEND);
|
||
chan_flags[chan] &= ~(DEV_WRITE|DEV_FULL|DEV_REOR|
|
||
CTL_SNS|CTL_READ|CTL_WRITE|CTL_END);
|
||
/* Get new command ready after disco */
|
||
chan_fetch(chan);
|
||
}
|
||
continue; /* Do nothing if no data xfer */
|
||
case DEV_WRITE: /* Device needs data word */
|
||
assembly[chan] = M[caddr[chan]];
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DATA, &chan_dev,
|
||
"chan %d data > %012llo\n",
|
||
chan, assembly[chan]);
|
||
if (sms[chan] & 020) /* BCD Xlat mode */
|
||
bcd_xlat(chan, 0);
|
||
if (sms[chan] & 040) { /* Read backward */
|
||
caddr[chan] =
|
||
((dualcore) ? (0100000 & caddr[chan]) : 0) |
|
||
((caddr[chan] - 1) & MEMMASK);
|
||
} else {
|
||
nxt_chan_addr(chan);
|
||
}
|
||
bcnt[chan] = 6;
|
||
wcount[chan]--;
|
||
chan_flags[chan] |= DEV_FULL;
|
||
break;
|
||
case DEV_FULL: /* Device has given us a dataword */
|
||
if (bcnt[chan] != 0)
|
||
assembly[chan] <<= 6 * bcnt[chan];
|
||
if (sms[chan] & 020) /* BCD Xlat mode */
|
||
bcd_xlat(chan, 1);
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DATA, &chan_dev,
|
||
"chan %d data < %012llo\n",
|
||
chan, assembly[chan]);
|
||
M[caddr[chan]] = assembly[chan];
|
||
if (sms[chan] & 040) { /* Read backward */
|
||
caddr[chan] =
|
||
((dualcore) ? (0100000 & caddr[chan]) : 0) |
|
||
((caddr[chan] - 1) & MEMMASK);
|
||
} else {
|
||
nxt_chan_addr(chan);
|
||
}
|
||
assembly[chan] = 0;
|
||
bcnt[chan] = 6;
|
||
wcount[chan]--;
|
||
chan_flags[chan] &= ~DEV_FULL;
|
||
break;
|
||
}
|
||
|
||
continue;
|
||
|
||
case TCM:
|
||
case TCMX:
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
} else {
|
||
/* Compare wordcount high to wordcound low */
|
||
/* 0 = chan check, 1-6 = assmebly, 7 = 0 */
|
||
uint8 v;
|
||
uint8 ch = wcount[chan] >> 12;
|
||
uint8 mask = wcount[chan] & 077;
|
||
uint8 flag = wcount[chan] & 0100;
|
||
|
||
if (ch == 0) {
|
||
v = (chan_flags[chan] >> 5) & 077;
|
||
} else if (ch == 7) {
|
||
v = 0;
|
||
} else {
|
||
v = (uint8)(077 & (assembly[chan] >> (6 * (6-ch))));
|
||
}
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"TCM %d:%02o & %02o\n\r", ch, v, mask);
|
||
if ((v == mask && flag == 0)
|
||
|| ((v & mask) == mask && flag != 0))
|
||
location[chan] = caddr[chan];
|
||
}
|
||
break;
|
||
case TDC:
|
||
if (counter[chan] != 0) {
|
||
location[chan] = caddr[chan];
|
||
counter[chan]--;
|
||
}
|
||
break;
|
||
case LCC:
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
counter[chan] = caddr[chan] & 077;
|
||
break;
|
||
case SMS:
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan %d SMS %03o -> %03o %03o ",
|
||
chan, sms[chan], caddr[chan] & 0177,
|
||
(SNS_IRQS & chan_flags[chan])>>5);
|
||
sms[chan] = caddr[chan] & 0177;
|
||
/* Check to see if IRQ still pending */
|
||
if ((chan_flags[chan] & CTL_INHB) == 0 &&
|
||
chan_flags[chan] & SNS_IRQS &
|
||
(~((sms[chan] << 5) & (SNS_IMSK ^ SNS_IRQS)))) {
|
||
chan_irq[chan] = 1;
|
||
}
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev, "Irqs = %03o %o\n",
|
||
((chan_flags[chan] & SNS_IRQS)>>5) &
|
||
((sms[chan] ^ 016) | 061), chan_irq[chan]);
|
||
break;
|
||
case ICC:
|
||
case ICCX:
|
||
if (chan_flags[chan] & DEV_SEL) {
|
||
chan9_seqcheck(chan);
|
||
break;
|
||
}
|
||
/* transfer counter from wordcount high to assembly */
|
||
/* 0 = SMS to 6, 1-6 = assmebly, 7 = nop */
|
||
{
|
||
t_uint64 v = counter[chan] & 077;
|
||
uint8 ch = wcount[chan] >> 12;
|
||
|
||
if (ch == 0) {
|
||
/* Not what POO says, but what diags want */
|
||
/* POO says other digits not affected. */
|
||
assembly[chan] = sms[chan] & 00137;
|
||
} else if (ch != 7) {
|
||
assembly[chan] &= ~(077L << (6 * (6 - ch)));
|
||
assembly[chan] |= (v << (6 * (6 - ch)));
|
||
}
|
||
}
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* Check for intrupts */
|
||
if (chan_irq[chan] ||
|
||
/* Can only interupt when channel inactive */
|
||
((chan_flags[chan] & (DEV_SEL | STA_ACTIVE | CTL_CNTL | CTL_SNS
|
||
| SNS_IRQ | CTL_INHB | CTL_READ | CTL_WRITE)) == 0 &&
|
||
cmd[chan] != TWT &&
|
||
(chan_flags[chan] & SNS_IRQS &
|
||
(((sms[chan] ^ 016) | 061) << 5)))) {
|
||
uint8 ocmd = cmd[chan];
|
||
M[040 + (chan * 2)] = location[chan] & MEMMASK;
|
||
M[040 + (chan * 2)] |= ((t_uint64) caddr[chan]) << 18;
|
||
chan_flags[chan] |= STA_ACTIVE|CTL_INHB;
|
||
location[chan] = 041 + (chan * 2);
|
||
chan_irq[chan] = 0;
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_TRAP, &chan_dev, "chan irq %d\n\r", chan);
|
||
chan_fetch(chan);
|
||
/* Fake a xec type trap */
|
||
if ((ocmd & 073) == WTR || ocmd == TWT)
|
||
location[chan] = (uint16)(M[040 + (chan * 2)] + 1)& MEMMASK;
|
||
else
|
||
location[chan] = (uint16)M[040 + (chan * 2)] & MEMMASK;
|
||
goto again;
|
||
}
|
||
|
||
if (chan_flags[chan] & STA_ACTIVE) {
|
||
uint8 c = cmd[chan];
|
||
chan_fetch(chan);
|
||
/* Check if we should interupt during unusual end */
|
||
if (sms[chan] & 0100 && (c & 070) == CPYP &&
|
||
(cmd[chan] & 071) == CPYD && wcount[chan] == 0) {
|
||
if (chan_dev.dctrl & cmask)
|
||
sim_debug(DEBUG_DETAIL, &chan_dev,
|
||
"chan non-concur %d\n\r", chan);
|
||
chan9_set_error(chan, SNS_UEND);
|
||
chan_flags[chan] &= ~(CTL_SNS|CTL_READ|CTL_WRITE);
|
||
if (chan_flags[chan] & DEV_SEL)
|
||
chan_flags[chan] |= DEV_WEOR|DEV_DISCO;
|
||
chan_fetch(chan);
|
||
}
|
||
if (cmd[chan] != TCM && (chan_flags[chan] & DEV_DISCO) == 0)
|
||
goto again;
|
||
}
|
||
#endif
|
||
}
|
||
}
|
||
}
|
||
|
||
void
|
||
chan_fetch(int chan)
|
||
{
|
||
uint16 loc;
|
||
t_uint64 temp;
|
||
|
||
sim_interval--;
|
||
loc = location[chan] & MEMMASK;
|
||
if (dualcore)
|
||
loc |= location[chan] & 0100000;
|
||
temp = M[loc];
|
||
location[chan] = ((loc + 1) & MEMMASK) | (loc & 0100000);
|
||
cmd[chan] = (uint8)(((temp >> 30) & 074) | ((temp >> 16) & 1));
|
||
wcount[chan] = (uint16)(temp >> 18) & 077777;
|
||
caddr[chan] = (uint16)temp & MEMMASK;
|
||
if (dualcore)
|
||
caddr[chan] |= temp & 0100000;
|
||
/* Check indirect bit */
|
||
if (temp & 0400000) {
|
||
caddr[chan] = (uint16)M[caddr[chan]];
|
||
if (dualcore)
|
||
caddr[chan] &= 0100000 | MEMMASK;
|
||
else
|
||
caddr[chan] &= MEMMASK;
|
||
sim_interval--;
|
||
}
|
||
/* Clear pending IO traps for channel */
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_CHAN, &chan_dev,
|
||
"chan %d fetch adr=%05o cmd=%03o caddr=%05o wcount=%05o\n",
|
||
chan, location[chan], cmd[chan], caddr[chan],
|
||
wcount[chan]);
|
||
}
|
||
|
||
/* Reset the channel, clear any pending device */
|
||
void
|
||
chan_rst(int chan, int type)
|
||
{
|
||
/* Issure reset command to device */
|
||
if (type == 0 && CHAN_G_TYPE(chan_unit[chan].flags) != CHAN_7909)
|
||
return;
|
||
if (type != 0 && CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7909)
|
||
return;
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_CHAN, &chan_dev, "Reset channel\n");
|
||
/* Clear outstanding traps on reset */
|
||
if (type)
|
||
iotraps &= ~(1 << chan);
|
||
chan_info[chan] &= ~(CHAINF_START | CHAINF_RUN);
|
||
chan_flags[chan] &= (CHS_EOF|CHS_BOT|CHS_EOT|DEV_DISCO|DEV_SEL);
|
||
caddr[chan] = 0;
|
||
cmd[chan] = 0;
|
||
sms[chan] = 0;
|
||
chan_irq[chan] = 0;
|
||
wcount[chan] = 0;
|
||
location[chan] = 0;
|
||
counter[chan] = 0; /* Channel memory address */
|
||
}
|
||
|
||
/* Issue a command to a channel */
|
||
int
|
||
chan_cmd(uint16 dev, uint16 dcmd)
|
||
{
|
||
UNIT *uptr;
|
||
int32 chan;
|
||
DEVICE **dptr;
|
||
DIB *dibp;
|
||
int j;
|
||
|
||
/* Find device on given channel and give it the command */
|
||
chan = (dev >> 9) & 017;
|
||
/* If no channel device, quick exit */
|
||
if (chan_unit[chan].flags & UNIT_DIS)
|
||
return SCPE_IOERR;
|
||
/* On 704 device new command aborts current operation */
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO &&
|
||
(chan_flags[chan] & (DEV_SEL | DEV_DISCO)) == DEV_SEL) {
|
||
/* Check if device picked up last transfer */
|
||
if ((chan_flags[chan] & (DEV_FULL|DEV_WRITE)) == (DEV_FULL|DEV_WRITE))
|
||
return SCPE_BUSY;
|
||
/* Yes, disconnect device and tell it to write a EOR */
|
||
if ((chan_flags[chan] & (DEV_WRITE)) == (DEV_WRITE) ||
|
||
(chan_flags[chan] & (DEV_FULL)) == (DEV_FULL))
|
||
chan_flags[chan] |= DEV_DISCO | DEV_WEOR;
|
||
return SCPE_BUSY;
|
||
}
|
||
/* Unit is busy doing something, wait */
|
||
if (chan_flags[chan] & (DEV_SEL | DEV_DISCO | STA_TWAIT | STA_WAIT))
|
||
return SCPE_BUSY;
|
||
chan_flags[chan] &= ~(DEV_REOR|DEV_WEOR|DEV_FULL|DEV_WRITE|STA_WAIT);
|
||
/* Ok, try and find the unit */
|
||
dev &= 07777;
|
||
for (dptr = sim_devices; *dptr != NULL; dptr++) {
|
||
int r;
|
||
|
||
dibp = (DIB *) (*dptr)->ctxt;
|
||
/* If no DIB, not channel device */
|
||
if (dibp == NULL || dibp->ctype == CHAN_7909 ||
|
||
(dibp->addr & dibp->mask) != (dev & dibp->mask))
|
||
continue;
|
||
uptr = (*dptr)->units;
|
||
if (dibp->upc == 1) {
|
||
int num = (*dptr)->numunits;
|
||
|
||
for (j = 0; j < num; j++) {
|
||
if (UNIT_G_CHAN(uptr->flags) == chan) {
|
||
r = dibp->cmd(uptr, dcmd, dev);
|
||
if (r != SCPE_NODEV) {
|
||
bcnt[chan] = 6;
|
||
cmd[chan] = 0;
|
||
caddr[chan] = 0;
|
||
location[chan] = 0;
|
||
return r;
|
||
}
|
||
}
|
||
uptr++;
|
||
}
|
||
} else {
|
||
if (UNIT_G_CHAN(uptr->flags) == chan) {
|
||
r = dibp->cmd(uptr, dcmd, dev);
|
||
if (r != SCPE_NODEV) {
|
||
bcnt[chan] = 6;
|
||
cmd[chan] = 0;
|
||
caddr[chan] = 0;
|
||
location[chan] = 0;
|
||
return r;
|
||
}
|
||
}
|
||
}
|
||
}
|
||
return SCPE_NODEV;
|
||
}
|
||
|
||
|
||
/* Give channel a new address to start working at */
|
||
int
|
||
chan_start(int chan, uint16 addr)
|
||
{
|
||
/* Hold this command until after channel has disconnected */
|
||
if (chan_flags[chan] & DEV_DISCO)
|
||
return SCPE_BUSY;
|
||
|
||
/* Depending on channel type controls how command works */
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7909) {
|
||
if (chan_flags[chan] & STA_ACTIVE)
|
||
return SCPE_BUSY;
|
||
chan_flags[chan] &=
|
||
~(CTL_CNTL | CTL_SNS | CTL_READ | CTL_PREAD | CTL_INHB |
|
||
CTL_WRITE | CTL_PWRITE | SNS_UEND | SNS_IOCHECK);
|
||
} else {
|
||
/* All clear, start ball rolling on new command */
|
||
/* Force iocheck if attempt to load inactive channel with command */
|
||
if ((chan_flags[chan] & DEV_SEL) == 0) {
|
||
/* Fetch next command */
|
||
location[chan] = addr;
|
||
chan_fetch(chan);
|
||
return SCPE_IOERR;
|
||
}
|
||
}
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_CHAN, &chan_dev,
|
||
"chan %d start IC=%05o addr=%o\n\r", chan, IC - 1, addr);
|
||
/* Fetch next command */
|
||
location[chan] = addr;
|
||
chan_fetch(chan);
|
||
chan_flags[chan] &= ~(STA_PEND|STA_TWAIT|STA_WAIT|DEV_WEOR|DEV_FULL);
|
||
chan_flags[chan] |= STA_START | STA_ACTIVE;
|
||
chan_info[chan] |= CHAINF_START;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Give channel a new address to start working at */
|
||
int
|
||
chan_load(int chan, uint16 addr)
|
||
{
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7909) {
|
||
if (chan_flags[chan] & STA_ACTIVE)
|
||
return SCPE_BUSY;
|
||
/* Ignore command if this waiting on IRQ */
|
||
if (cmd[chan] == TWT && iotraps & (1 << chan))
|
||
return SCPE_OK;
|
||
chan_flags[chan] &= ~(CTL_INHB);
|
||
location[chan] = caddr[chan];
|
||
} else {
|
||
/* Force iocheck if attempt to load channel with command,
|
||
that has not been started or is not in select state */
|
||
if ((chan_flags[chan] & (DEV_SEL | STA_START)) != (DEV_SEL|STA_START))
|
||
return SCPE_IOERR;
|
||
|
||
/* If channel active, or waiting EOR, should hold CPU */
|
||
if (chan_flags[chan] & (STA_ACTIVE | STA_WAIT)) {
|
||
chan_flags[chan] |= STA_PEND;
|
||
return SCPE_BUSY;
|
||
}
|
||
chan_flags[chan] &= ~(STA_PEND|STA_TWAIT);
|
||
location[chan] = addr;
|
||
}
|
||
/* All clear, start ball rolling on new command */
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_CHAN, &chan_dev,
|
||
"chan %d load IC=%05o addr=%o stat=%08x\n\r", chan, IC - 1,
|
||
addr, chan_flags[chan]);
|
||
chan_fetch(chan);
|
||
chan_flags[chan] |= STA_ACTIVE;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* return the channels current command address */
|
||
void
|
||
chan_store(int chan, uint16 loc)
|
||
{
|
||
t_uint64 reg = 0LL;
|
||
|
||
/* Check if channel has units attached */
|
||
if (chan_unit[chan].flags & CHAN_SET) {
|
||
/* Return command/addr/xcmd/location */
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7909) {
|
||
reg = location[chan] & MEMMASK;
|
||
reg |= ((t_uint64) caddr[chan]) << 18;
|
||
/* Check if channel has units attached */
|
||
} else {
|
||
/* If doing a TCH, process it */
|
||
if ((cmd[chan] & 070) == TCH)
|
||
chan_proc();
|
||
reg = caddr[chan];
|
||
reg |= ((t_uint64) (location[chan] & MEMMASK)) << 18;
|
||
reg |= ((t_uint64) (cmd[chan] & 070)) << 30;
|
||
reg |= ((t_uint64) (cmd[chan] & 01)) << 16;
|
||
}
|
||
}
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_SNS, &chan_dev, "chan %d status %012llo\n\r",
|
||
chan,reg);
|
||
M[loc & (MEMMASK | 0100000)] = reg;
|
||
}
|
||
|
||
/* Store channel diagnostic bits */
|
||
void
|
||
chan_store_diag(int chan, uint16 loc)
|
||
{
|
||
t_uint64 reg;
|
||
int results;
|
||
|
||
/* Counter[6], iocheck,seq check, unusal end, attn 1,
|
||
* attn 2, adpter check, prepare to read, prepare to write,
|
||
* read status, write status, interupt */
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_7909) {
|
||
reg = ((t_uint64) counter[chan]) << 30;
|
||
results = SNS_MASK & chan_flags[chan];
|
||
if (results & (((sms[chan] ^ 016) | 061) << 5))
|
||
results |= 1;
|
||
reg |= ((t_uint64) (results)) << 19;
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_SNS, &chan_dev, "chan %d diags %012llo\n\r",
|
||
chan,reg);
|
||
M[loc & (MEMMASK | 0100000)] = reg;
|
||
}
|
||
}
|
||
|
||
/*
|
||
* Write a word to the assembly register.
|
||
*/
|
||
int
|
||
chan_write(int chan, t_uint64 * data, int flags)
|
||
{
|
||
|
||
/* Check if last data still not taken */
|
||
if (chan_flags[chan] & DEV_FULL) {
|
||
/* Nope, see if we are waiting for end of record. */
|
||
if (chan_flags[chan] & DEV_WEOR) {
|
||
chan_flags[chan] |= DEV_REOR;
|
||
chan_flags[chan] &= ~(DEV_WEOR|DEV_FULL);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* If active set attention, report IO error if
|
||
device does not want to disconnect */
|
||
if (chan_flags[chan] & STA_ACTIVE) {
|
||
chan_flags[chan] |= CHS_ATTN;
|
||
if ((flags & DEV_DISCO) == 0)
|
||
iocheck = 1;
|
||
}
|
||
|
||
/* If requested, force disconnect */
|
||
chan_flags[chan] |= DEV_DISCO & flags;
|
||
|
||
return TIME_ERROR;
|
||
} else {
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO)
|
||
MQ = *data;
|
||
assembly[chan] = *data;
|
||
bcnt[chan] = 6;
|
||
chan_flags[chan] |= DEV_FULL;
|
||
chan_flags[chan] &= ~DEV_WRITE;
|
||
if (flags & DEV_REOR) {
|
||
chan_flags[chan] |= DEV_REOR;
|
||
}
|
||
}
|
||
|
||
return DATA_OK;
|
||
}
|
||
|
||
/*
|
||
* Read next word from assembly register.
|
||
*/
|
||
int
|
||
chan_read(int chan, t_uint64 * data, int flags)
|
||
{
|
||
|
||
/* Return END_RECORD if requested */
|
||
if (flags & DEV_WEOR) {
|
||
chan_flags[chan] |= DEV_REOR;
|
||
chan_flags[chan] &= ~(DEV_WEOR);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* Check if no data waiting */
|
||
if ((chan_flags[chan] & DEV_FULL) == 0) {
|
||
/* Nope, see if we are waiting for end of record. */
|
||
if (chan_flags[chan] & DEV_WEOR) {
|
||
chan_flags[chan] |= DEV_WRITE;
|
||
chan_flags[chan] &= ~(DEV_WEOR);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* If active set attention, report IO error if
|
||
device does not want to disconnect */
|
||
if (chan_flags[chan] & STA_ACTIVE) {
|
||
chan_flags[chan] |= CHS_ATTN;
|
||
if ((flags & DEV_DISCO) == 0)
|
||
iocheck = 1;
|
||
}
|
||
|
||
/* If requested, force disconnect */
|
||
chan_flags[chan] |= DEV_DISCO & flags;
|
||
|
||
return TIME_ERROR;
|
||
} else {
|
||
*data = assembly[chan];
|
||
bcnt[chan] = 6;
|
||
chan_flags[chan] &= ~DEV_FULL;
|
||
/* If end of record, don't transfer any data */
|
||
if (flags & DEV_REOR) {
|
||
chan_flags[chan] &= ~(DEV_WRITE);
|
||
chan_flags[chan] |= DEV_REOR;
|
||
} else
|
||
chan_flags[chan] |= DEV_WRITE;
|
||
}
|
||
return DATA_OK;
|
||
}
|
||
|
||
/*
|
||
* Write a char to the assembly register.
|
||
*/
|
||
int
|
||
chan_write_char(int chan, uint8 * data, int flags)
|
||
{
|
||
/* If Writing end of record, abort */
|
||
if (chan_flags[chan] & DEV_WEOR) {
|
||
chan_flags[chan] &= ~(DEV_FULL | DEV_WEOR);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* Check if last data still not taken */
|
||
if (chan_flags[chan] & DEV_FULL) {
|
||
/* Nope, see if we are waiting for end of record. */
|
||
if (chan_flags[chan] & DEV_WEOR) {
|
||
chan_flags[chan] |= DEV_REOR;
|
||
chan_flags[chan] &= ~(DEV_WEOR|DEV_FULL);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* If active set attention, report IO error if
|
||
device does not want to disconnect */
|
||
if (chan_flags[chan] & STA_ACTIVE) {
|
||
chan_flags[chan] |= CHS_ATTN;
|
||
if ((flags & DEV_DISCO) == 0)
|
||
iocheck = 1;
|
||
}
|
||
|
||
/* If requested, force disconnect */
|
||
chan_flags[chan] |= DEV_DISCO & flags;
|
||
|
||
return TIME_ERROR;
|
||
} else {
|
||
int cnt = --bcnt[chan];
|
||
t_uint64 wd;
|
||
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO)
|
||
wd = MQ;
|
||
else
|
||
wd = assembly[chan];
|
||
wd &= 0007777777777LL;
|
||
wd <<= 6;
|
||
wd |= (*data) & 077;
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO)
|
||
MQ = wd;
|
||
else
|
||
assembly[chan] = wd;
|
||
|
||
if (cnt == 0) {
|
||
chan_flags[chan] |= DEV_FULL;
|
||
chan_flags[chan] &= ~DEV_WRITE;
|
||
}
|
||
if (flags & DEV_REOR) {
|
||
chan_flags[chan] |= DEV_FULL|DEV_REOR;
|
||
chan_flags[chan] &= ~DEV_WRITE;
|
||
}
|
||
}
|
||
|
||
|
||
return DATA_OK;
|
||
}
|
||
|
||
/*
|
||
* Read next char from assembly register.
|
||
*/
|
||
int
|
||
chan_read_char(int chan, uint8 * data, int flags)
|
||
{
|
||
|
||
/* Return END_RECORD if requested */
|
||
if (flags & DEV_WEOR) {
|
||
chan_flags[chan] &= ~(DEV_WEOR);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* Check if he write out last data */
|
||
if ((chan_flags[chan] & DEV_FULL) == 0) {
|
||
/* Nope, see if we are waiting for end of record. */
|
||
if (chan_flags[chan] & DEV_WEOR) {
|
||
chan_flags[chan] |= DEV_WRITE|DEV_REOR;
|
||
chan_flags[chan] &= ~(DEV_WEOR);
|
||
return END_RECORD;
|
||
}
|
||
|
||
/* If active set attention, report IO error if
|
||
device does not want to disconnect */
|
||
if (chan_flags[chan] & STA_ACTIVE) {
|
||
chan_flags[chan] |= CHS_ATTN;
|
||
if ((flags & DEV_DISCO) == 0)
|
||
iocheck = 1;
|
||
}
|
||
|
||
/* If requested, force disconnect */
|
||
chan_flags[chan] |= DEV_DISCO & flags;
|
||
|
||
return TIME_ERROR;
|
||
} else {
|
||
int cnt = --bcnt[chan];
|
||
t_uint64 wd = assembly[chan];
|
||
*data = (uint8)(077 & (wd >> 30));
|
||
wd <<= 6;
|
||
wd |= 077 & (wd >> 36);
|
||
wd &= 0777777777777LL;
|
||
if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO)
|
||
MQ = wd;
|
||
assembly[chan] = wd;
|
||
if (cnt == 0) {
|
||
chan_flags[chan] &= ~DEV_FULL;
|
||
bcnt[chan] = 6;
|
||
}
|
||
/* If end of record, don't transfer any data */
|
||
if (flags & DEV_REOR) {
|
||
chan_flags[chan] &= ~(DEV_WRITE|DEV_FULL);
|
||
chan_flags[chan] |= DEV_REOR;
|
||
} else
|
||
chan_flags[chan] |= DEV_WRITE;
|
||
}
|
||
return DATA_OK;
|
||
}
|
||
|
||
void
|
||
chan9_seqcheck(int chan)
|
||
{
|
||
/* Disconnect channel if active */
|
||
if (chan_flags[chan] & DEV_SEL)
|
||
chan_flags[chan] |= DEV_DISCO;
|
||
chan_flags[chan] &= ~(CTL_READ|CTL_WRITE|CTL_SNS|STA_ACTIVE);
|
||
if (chan_dev.dctrl & (0x0100 << chan))
|
||
sim_debug(DEBUG_EXP, &chan_dev, "chan %d seq\n", chan);
|
||
chan9_set_error(chan, SNS_SEQCHECK);
|
||
}
|
||
|
||
void
|
||
chan9_set_error(int chan, uint32 mask)
|
||
{
|
||
if (chan_flags[chan] & mask)
|
||
return;
|
||
chan_flags[chan] |= mask;
|
||
if (mask & (~((sms[chan] << 5) & (SNS_IMSK ^ SNS_IRQS)))) {
|
||
chan_irq[chan] = 1;
|
||
}
|
||
}
|
||
|
||
t_stat
|
||
chan_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
|
||
{
|
||
#ifdef I7090
|
||
fprintf(st, "%s\n\n", chan_description(dptr));
|
||
fprintf (st, "The 7090 supports up to 8 channels. Channel models include\n\n");
|
||
fprintf (st, " Unit record Polled mode I/O devices\n");
|
||
fprintf (st, " 7607 standard multiplexor channel\n");
|
||
fprintf (st, " 7909 advanced capabilities channel\n");
|
||
fprintf (st, " 7289 special channel for high speed drum\n\n");
|
||
fprintf (st, "Channels can be reconfigured on the 7090, this generally ");
|
||
fprintf (st, "happens automatically.\nHowever at times it can be useful to ");
|
||
fprintf (st, "force a channel to a specific device. If\ndevices are attached");
|
||
fprintf (st, "to incorrect channel types an error will be reported at sim\n");
|
||
fprintf (st, "start. The first channel is fixed for Polled mode devices.\n\n");
|
||
fprint_set_help(st, dptr);
|
||
fprint_show_help(st, dptr);
|
||
#else
|
||
fprintf(st, "IBM 704 Channel\n\n");
|
||
fprintf(st, "Psuedo device to display IBM 704 I/O. The IBM 704 used polled");
|
||
fprintf(st, " I/O,\nThe assembly register and the flags can be displayed\n");
|
||
fprintf(st, "There are no options for the this device\n");
|
||
#endif
|
||
return SCPE_OK;
|
||
}
|
||
|
||
const char *
|
||
chan_description(DEVICE *dptr)
|
||
{
|
||
return "IBM 7090 channel controller";
|
||
}
|