1cb2f3b96c
Fix divide of 0 on KS10 processor.
Fix write access for auxiliary processor memory.
Updated support new PIDP10 panel.
Allow eight Unibux ports on the TEN device.
Added GE DATANET-760 device to PDP6
Removed USER mode restriction for idle detection.
Added Data Disc 6600 Television Display System.
461 lines
14 KiB
C
461 lines
14 KiB
C
/* ka10_ten11.c: Rubin 10-11 interface.
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Copyright (c) 2018-2019, Lars Brinkhoff
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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This is a device which interfaces with eight Unibuses. It's
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specific to the MIT AI lab PDP-10.
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*/
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#include "kx10_defs.h"
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#include "sim_tmxr.h"
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#ifndef NUM_DEVS_TEN11
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#define NUM_DEVS_TEN11 0
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#endif
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#if (NUM_DEVS_TEN11 > 0)
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/* Rubin 10-11 pager. */
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static uint64 ten11_pager[256];
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/* Physical address range of TEN11 moby. */
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t_addr ten11_base = 03000000;
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t_addr ten11_end = 04000000;
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/* Number of Unibuses. */
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#define UNIBUSES 8
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/* Physical address of 10-11 control page. */
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#define T11CPA 0776000 //Offset inside TEN11 moby.
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/* Bits in a 10-11 page table entry. */
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#define T11VALID (0400000000000LL)
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#define T11WRITE (0200000000000LL)
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#define T11PDP11 (0003400000000LL)
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#define T11ADDR (0000377776000LL)
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#define T11LIMIT (0000000001777LL)
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/* External Unibus interface. */
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#define DATO 1
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#define DATI 2
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#define ACK 3
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#define ERR 4
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#define TIMEOUT 5
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#define TEN11_POLL 100
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/* Simulator time units for a Unibus memory cycle. */
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#define UNIBUS_MEM_CYCLE 100
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static t_stat ten11_svc (UNIT *uptr);
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static t_stat ten11_reset (DEVICE *dptr);
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static t_stat ten11_attach (UNIT *uptr, CONST char *ptr);
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static t_stat ten11_detach (UNIT *uptr);
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static t_stat ten11_set_base (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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static t_stat ten11_show_base (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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static t_stat ten11_attach_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
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static const char *ten11_description (DEVICE *dptr);
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UNIT ten11_unit[1] = {
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{ UDATA (&ten11_svc, UNIT_IDLE|UNIT_ATTABLE, 0), 1000 },
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};
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static REG ten11_reg[] = {
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{ DRDATAD (POLL, ten11_unit[0].wait, 24, "poll interval"), PV_LEFT },
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{ NULL }
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};
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static MTAB ten11_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "base address", "BASE",
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&ten11_set_base, &ten11_show_base },
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{ 0 }
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};
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#define DBG_TRC 1
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#define DBG_CMD 2
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static DEBTAB ten11_debug[] = {
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{"TRACE", DBG_TRC, "Routine trace"},
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{"CMD", DBG_CMD, "Command Processing"},
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{0},
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};
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DEVICE ten11_dev = {
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"TEN11", ten11_unit, ten11_reg, ten11_mod,
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1, 8, 16, 2, 8, 16,
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NULL, /* examine */
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NULL, /* deposit */
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&ten11_reset, /* reset */
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NULL, /* boot */
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ten11_attach, /* attach */
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ten11_detach, /* detach */
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NULL, /* context */
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DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX,
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DBG_CMD, /* debug control */
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ten11_debug, /* debug flags */
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NULL, /* memory size chage */
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NULL, /* logical name */
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NULL, /* help */
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&ten11_attach_help, /* attach help */
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NULL, /* help context */
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&ten11_description, /* description */
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};
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static TMLN ten11_ldsc[UNIBUSES]; /* line descriptor */
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static TMXR ten11_desc = { 8, 0, 0, ten11_ldsc }; /* mux descriptor */
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static t_stat ten11_reset (DEVICE *dptr)
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{
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sim_debug(DBG_TRC, dptr, "ten11_reset()\n");
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ten11_unit[0].flags |= UNIT_ATTABLE | UNIT_IDLE;
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ten11_desc.packet = TRUE;
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ten11_desc.notelnet = TRUE;
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ten11_desc.buffered = 2048;
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if (ten11_unit[0].flags & UNIT_ATT)
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sim_activate_abs (&ten11_unit[0], 0);
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else
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sim_cancel (&ten11_unit[0]);
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return SCPE_OK;
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}
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static t_stat ten11_attach (UNIT *uptr, CONST char *cptr)
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{
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t_stat r;
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if (!cptr || !*cptr)
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return SCPE_ARG;
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if (!(uptr->flags & UNIT_ATTABLE))
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return SCPE_NOATT;
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r = tmxr_attach_ex (&ten11_desc, uptr, cptr, FALSE);
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if (r != SCPE_OK) /* error? */
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return r;
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sim_debug(DBG_TRC, &ten11_dev, "activate connection\n");
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sim_activate_abs (uptr, 0); /* start poll */
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uptr->flags |= UNIT_ATT;
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return SCPE_OK;
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}
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static t_stat ten11_detach (UNIT *uptr)
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{
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t_stat r;
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if (!(uptr->flags & UNIT_ATT))
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return SCPE_OK;
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sim_cancel (uptr);
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r = tmxr_detach (&ten11_desc, uptr);
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uptr->flags &= ~UNIT_ATT;
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free (uptr->filename);
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uptr->filename = NULL;
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return r;
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}
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static void build (unsigned char *request, unsigned char octet)
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{
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request[0]++;
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request[request[0]] = octet;
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}
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static t_stat ten11_svc (UNIT *uptr)
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{
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int i;
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tmxr_poll_rx (&ten11_desc);
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for (i = 0; i < UNIBUSES; i++) {
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if (ten11_ldsc[i].rcve && !ten11_ldsc[i].conn) {
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ten11_ldsc[i].rcve = 0;
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tmxr_reset_ln (&ten11_ldsc[i]);
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}
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}
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i = tmxr_poll_conn(&ten11_desc);
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if (i >= 0) {
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sim_debug(DBG_CMD, &ten11_dev, "got connection\n");
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ten11_ldsc[i].rcve = 1;
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uptr->wait = TEN11_POLL;
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}
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sim_clock_coschedule (uptr, uptr->wait);
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return SCPE_OK;
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}
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static t_stat ten11_attach_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
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{
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const char helpString[] =
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/* The '*'s in the next line represent the standard text width of a help line */
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/****************************************************************************/
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" The %D device is an implementation of the Rubin PDP-10 to PDP-11 interface\n"
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" facility. This allows a PDP 10 system to reach into a PDP-11 simulator\n"
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" and modify or access the contents of the PDP-11 memory.\n\n"
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" The device must be attached to a receive port, this is done by using the\n"
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" ATTACH command to specify the receive port number.\n"
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"\n"
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"+sim> ATTACH %U port\n"
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"\n"
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;
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return scp_help (st, dptr, uptr, flag, helpString, cptr);
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return SCPE_OK;
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}
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static const char *ten11_description (DEVICE *dptr)
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{
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return "Rubin PDP-10 to PDP-11 interface";
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}
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static int error (int unibus, const char *message)
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{
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sim_debug (DBG_TRC, &ten11_dev, "Port %d: %s\r\n", unibus, message);
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sim_debug (DBG_TRC, &ten11_dev, "CLOSE\r\n");
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ten11_ldsc[unibus].rcve = 0;
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tmxr_reset_ln (&ten11_ldsc[unibus]);
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return -1;
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}
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static int transaction (int unibus, unsigned char *request, unsigned char *response)
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{
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const uint8 *ten11_request;
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size_t size;
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t_stat stat;
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stat = tmxr_put_packet_ln (&ten11_ldsc[unibus], request + 1, (size_t)request[0]);
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if (stat != SCPE_OK)
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return error (unibus, "Write error in transaction");
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do {
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tmxr_poll_rx (&ten11_desc);
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stat = tmxr_get_packet_ln (&ten11_ldsc[unibus], &ten11_request, &size);
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if (!ten11_ldsc[unibus].conn)
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return error (unibus, "Connection lost");
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} while (stat != SCPE_OK || size == 0);
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if (size > 7)
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return error (unibus, "Malformed transaction");
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memcpy (response, ten11_request, size);
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return 0;
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}
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static int read_word (int unibus, t_addr addr, int *data)
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{
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unsigned char request[8];
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unsigned char response[8];
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sim_interval -= UNIBUS_MEM_CYCLE;
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if ((ten11_unit[0].flags & UNIT_ATT) == 0) {
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*data = 0;
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return 0;
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}
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memset (request, 0, sizeof request);
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build (request, DATI);
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build (request, (addr >> 16) & 0377);
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build (request, (addr >> 8) & 0377);
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build (request, (addr) & 0377);
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if (transaction (unibus, request, response) == -1) {
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/* Network error. */
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*data = 0;
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return 0;
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}
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switch (response[0])
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{
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case ACK:
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*data = response[2];
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*data |= response[1] << 8;
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sim_debug (DBG_TRC, &ten11_dev, "Read word %06o\n", *data);
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break;
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case ERR:
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fprintf (stderr, "TEN11: Read error %06o\r\n", addr);
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*data = 0;
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break;
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case TIMEOUT:
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fprintf (stderr, "TEN11: Read timeout %06o\r\n", addr);
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*data = 0;
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break;
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default:
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return error (unibus, "Protocol error");
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}
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return 0;
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}
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int ten11_read (t_addr addr, uint64 *data)
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{
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int offset = addr & 01777;
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int word1, word2;
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addr &= RMASK; //Address offset inside moby.
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if (addr >= T11CPA) {
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/* Accessing the control page. */
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if (offset >= 0400) {
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sim_debug (DBG_TRC, &ten11_dev,
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"Control page read NXM: %o @ %o\n",
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offset, PC);
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return 1;
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}
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*data = ten11_pager[offset];
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} else {
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/* Accessing a memory page. */
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int page = (addr >> 10) & 0377;
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uint64 mapping = ten11_pager[page];
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int unibus, uaddr, limit;
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limit = mapping & T11LIMIT;
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if ((mapping & T11VALID) == 0 || offset > limit) {
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sim_debug (DBG_TRC, &ten11_dev,
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"(%o) %07o >= 4,,000000 / %llo / %o > %o\n",
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page, addr, (mapping & T11VALID), offset, limit);
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return 1;
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}
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unibus = (mapping & T11PDP11) >> 26;
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uaddr = ((mapping & T11ADDR) >> 10) + offset;
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uaddr <<= 2;
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read_word (unibus, uaddr, &word1);
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read_word (unibus, uaddr + 2, &word2);
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*data = ((uint64)word1 << 20) | (word2 << 4);
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sim_debug (DBG_TRC, &ten11_dev,
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"Read: (%o) %06o -> %012llo\n",
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unibus, uaddr, *data);
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}
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return 0;
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}
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static int write_word (int unibus, t_addr addr, uint16 data)
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{
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unsigned char request[8];
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unsigned char response[8];
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sim_interval -= UNIBUS_MEM_CYCLE;
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if ((ten11_unit[0].flags & UNIT_ATT) == 0) {
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return 0;
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}
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memset (request, 0, sizeof request);
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build (request, DATO);
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build (request, (addr >> 16) & 0377);
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build (request, (addr >> 8) & 0377);
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build (request, (addr) & 0377);
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build (request, (data >> 8) & 0377);
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build (request, (data) & 0377);
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transaction (unibus, request, response);
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switch (response[0])
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{
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case ACK:
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break;
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case ERR:
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fprintf (stderr, "TEN11: Write error %06o\r\n", addr);
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break;
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case TIMEOUT:
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fprintf (stderr, "TEN11: Write timeout %06o\r\n", addr);
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break;
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default:
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return error (unibus, "Protocol error");
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}
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return 0;
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}
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int ten11_write (t_addr addr, uint64 data)
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{
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int offset = addr & 01777;
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addr &= RMASK; //Address offset inside moby.
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if (addr >= T11CPA) {
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/* Accessing the control page. */
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if (offset >= 0400) {
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sim_debug (DBG_TRC, &ten11_dev,
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"Control page write NXM: %o @ %o\n",
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offset, PC);
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return 1;
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}
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ten11_pager[offset] = data;
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sim_debug (DBG_TRC, &ten11_dev,
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"Page %03o: %s %s (%llo) %06llo/%04llo\n",
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offset,
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(data & T11VALID) ? "V" : "I",
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(data & T11WRITE) ? "RW" : "R",
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(data & T11PDP11) >> 26,
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(data & T11ADDR) >> 10,
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(data & T11LIMIT));
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} else {
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/* Accessing a memory page. */
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int page = (addr >> 10) & 0377;
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uint64 mapping = ten11_pager[page];
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int unibus, uaddr, limit;
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limit = mapping & T11LIMIT;
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if ((mapping & T11VALID) == 0 || offset > limit) {
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sim_debug (DBG_TRC, &ten11_dev,
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"(%o) %07o >= 4,,000000 / %llo / %o > %o\n",
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page, addr, (mapping & T11VALID), offset, limit);
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return 1;
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}
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unibus = (mapping & T11PDP11) >> 26;
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uaddr = ((mapping & T11ADDR) >> 10) + offset;
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uaddr <<= 2;
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sim_debug (DBG_TRC, &ten11_dev,
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"Write: (%o) %06o <- %012llo\n",
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unibus, uaddr, data);
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if ((data & 010) == 0)
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write_word (unibus, uaddr, (data >> 20) & 0177777);
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if ((data & 004) == 0)
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write_word (unibus, uaddr + 2, (data >> 4) & 0177777);
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}
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return 0;
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}
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static t_stat ten11_set_base (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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t_stat r;
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t_value x;
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if (cptr == NULL || *cptr == 0)
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return SCPE_ARG;
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x = get_uint (cptr, 8, 03777777, &r);
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if (r != SCPE_OK)
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return SCPE_ARG;
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ten11_base = (t_addr)(x&03777777);
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/* The end of the TEN11 range is the start of the next moby. */
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ten11_end = (ten11_base + 01000000) & LMASK;
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return SCPE_OK;
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}
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static t_stat ten11_show_base (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
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{
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fprintf (st, "Base: %011o", ten11_base);
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return SCPE_OK;
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}
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#endif
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