152 lines
5.5 KiB
C
152 lines
5.5 KiB
C
/* sage_defs.h: simulator header file for sage-II system
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Copyright (c) 2009-2010 Holger Veit
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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Holger Veit BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Holger Veit et al shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Holger Veit et al.
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10-Jan-10 HV Defines for certain chip bits/registers
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04-Oct-09 HV Initial version
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*/
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#ifndef SAGE_DEFS_H_
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#define SAGE_DEFS_H_
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#include "sim_defs.h"
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#include "m68k_cpu.h"
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/* don't define this yet, won't work */
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#undef SAGE_IV
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#define UNIT_CPU_V_ROM UNIT_CPU_V_FREE /* has switchable ROM */
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#define UNIT_CPU_ROM (1 << UNIT_CPU_V_ROM)
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#define SAGEMEM (128*1024)
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#define ROMBASE 0xfe0000 /* base address of ROM */
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#ifdef SAGE_IV
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#define ROMSIZE 0x004000 /* size of ROM (4K words) */
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#else
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#define ROMSIZE 0x002000 /* size of ROM (4K words) */
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#endif
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/* simh timers */
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#define TMR_RTC1 0
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#define TMR_RTC2 1
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#define TMR_CONS 2
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#define TMR_INT 3
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/* definitions for certain chips */
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#include "chip_defs.h"
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/* PIC base address */
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#define U73_ADDR 0xffc041
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extern t_stat sage_raiseint(int level); /* sage specific interrupt handler */
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/* 8255 for dip switches and floppy control */
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#define U22_ADDR 0xffc021
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extern uint32 *u22_portc; /* exposed for use by FD device */
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#define U22C_FRES 0x80
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#define U22C_PCRMP 0x40
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#define U22C_MOT 0x20
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#define U22C_SL1 0x10
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#define U22C_SL0 0x08
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#define U22C_FDIE 0x04
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#define U22C_RDY 0x02
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#define U22C_TC 0x01
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/* 8253 timer units */
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#define U75_ADDR 0xffc001
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#define U74_ADDR 0xffc081
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#define TIMER2C0_PICINT 6
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#define TIMER2C2_PICINT 0
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/* FDC */
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#define U21_ADDR 0xffc051
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extern I8272 u21;
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#define FDC_AUTOINT 6
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/* LP port */
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#define U39_ADDR 0xffc061
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#define LP_PICINT 5
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#define SI_PICINT 7
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#define U39B_FDI 0x01
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#define U39B_WP 0x02
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#define U39B_RG 0x04
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#define U39B_CD 0x08
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#define U39B_BUSY 0x10
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#define U39B_PAPER 0x20
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#define U39B_SEL 0x40
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#define U39B_FAULT 0x80
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#define U39C_PRES 0x01
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#define U39C_SC 0x02
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#define U39C_SI 0x04
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#define U39C_LEDR 0x08
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#define U39C_STROBE 0x10
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#define U39C_PRIME 0x20
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#define U39C_RCNI 0x40
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#define U39C_RMI 0x80
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/* SIO port */
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#define U58_ADDR 0xffc031
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#define SIORX_PICINT 1
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#define SIOTX_PICINT 3
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/* CONS port */
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#define U57_ADDR 0xffc071
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#define CONSRX_AUTOINT 5
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#define CONSTX_PICINT 2
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/* unimplemented */
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#define IEEEBASE 0xffc011 /* IEEE-488 interface (TMS9914) */
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/* winchester board: not yet */
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#define S2651d 0xffc401 /* aux serial 4 */
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#define S2651d_DATA (S2651d+0) /* RW data port aux 4 */
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#define S2651d_STATUS (S2651d+2) /* R status aux 4 */
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#define S2651d_MODE (S2651d+4) /* W mode aux 4 */
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#define S2651d_CTRL (S2651d+6) /* W mode aux 4 */
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#define S2651c 0xffc441 /* aux serial 3 */
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#define S2651c_DATA (S2651c+0) /* RW data port aux 3 */
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#define S2651c_STATUS (S2651c+2) /* R status aux 3 */
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#define S2651c_MODE (S2651c+4) /* W mode aux 3 */
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#define S2651c_CTRL (S2651c+6) /* W mode aux 3 */
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#define S2651b 0xffc481 /* aux serial 2 */
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#define S2651b_DATA (S2651b+0) /* RW data port aux 2 */
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#define S2651b_STATUS (S2651b+2) /* R status aux 2 */
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#define S2651b_MODE (S2651b+4) /* W mode aux 2 */
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#define S2651b_CTRL (S2651b+6) /* W mode aux 2 */
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#define S2651a 0xff4c1 /* aux serial 1 */
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#define S2651a_DATA (S2651a+0) /* RW data port aux 1 */
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#define S2651a_STATUS (S2651a+2) /* R status aux 1 */
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#define S2651a_MODE (S2651a+4) /* W mode aux 1 */
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#define S2651a_CTRL (S2651a+6) /* W mode aux 1 */
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/* must be included at the end */
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#include "m68k_cpu.h"
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#endif
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