36605c4950
- Add new CP and CR devices - COC: Zero delay from SIO to INIT state Detect and UEN on 0xFF order - COC: Moved SIO int pending test to devices - DK: Zero delay from SIO to INIT state - DP: Added case points for RDEES, dp_aio_status - DP: Zero delay from SIO to INIT state - defs: Added chaining modifier flag - defs: Fixed DVT_NODEV definition - defs: Added chan_chk_dvi definition - io: Added chaining modifier flag - LP: Zero delay from SIO to INIT state - LP: Added INIT test for illegal command - LP: Moved SIO interrupt test to devices - MT: Zero delay from SIO to INIT state - PT: Zero delay from SIO to INIT state - PT: Moved SIO interrupt test to devices - RAD: Zero delay from SIO to INIT state - RAD: Fixed nx unit test - RAD: Fixed write protect test - TT: Zero delay from SIO to INIT state - TT: Moved SIO int pending test to devices
704 lines
29 KiB
C
704 lines
29 KiB
C
/* sigma_mt.c: Sigma 732X 9-track magnetic tape
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Copyright (c) 2007-2024, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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mt 7320 and 7322/7323 magnetic tape
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17-Feb-24 RMS Zero delay from SIO to INIT state (Ken Rector)
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11-Feb-24 RMS Report non-operational if not attached (Ken Rector)
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01-Feb-24 RMS Fixed nx unit test (Ken Rector)
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01-Nov-23 RMS Fixed reset not to clear BOT
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31-Mar-23 RMS Mask unit flag before calling status in AIO (Ken Rector)
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07-Feb-23 RMS Silenced Mac compiler warnings (Ken Rector)
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15-Dec-22 RMS Moved SIO interrupt test to devices
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20-Jul-22 RMS Space record must set EOF flag on tape mark (Ken Rector)
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03-Jul-22 RMS Fixed error in handling of channel errors (Ken Rector)
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02-Jul-22 RMS Fixed bugs in multi-unit operation
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07-Jun-22 RMS Removed unused variables (V4)
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26-Mar-22 RMS Added extra case points for new MTSE definitions
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23-Mar-20 RMS Unload should call sim_tape_detach (Mark Pizzolato)
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13-Mar-17 RMS Annotated fall through in switch
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Magnetic tapes are represented as a series of variable records
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of the form:
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32b byte count
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byte 0
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byte 1
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:
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byte n-2
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byte n-1
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32 byte count
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If the byte count is odd, the record is padded with an extra byte
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of junk. File marks are represented by a byte count of 0.
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*/
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#include "sigma_io_defs.h"
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#include "sim_tape.h"
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/* Device definitions */
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#define MT_NUMDR 8 /* #drives */
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#define MT_REW (MT_NUMDR) /* rewind threads */
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#define UST u3 /* unit status */
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#define UCMD u4 /* unit command */
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#define MT_MAXFR (1 << 16) /* max record lnt */
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/* Unit commands */
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#define MCM_INIT 0x100
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#define MCM_END 0x101
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#define MCM_WRITE 0x01
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#define MCM_READ 0x02
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#define MCM_SETC 0x03
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#define MCM_SENSE 0x04
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#define MCM_RDBK 0x0C
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#define MCM_RWI 0x13
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#define MCM_RWU 0x23
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#define MCM_REW 0x33
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#define MCM_SFWR 0x43
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#define MCM_SBKR 0x4B
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#define MCM_SFWF 0x53
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#define MCM_SBKF 0x5B
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#define MCM_ERS 0x63
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#define MCM_WTM 0x73
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/* Command flags */
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#define O_ATT 0x01 /* req attached */
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#define O_WRE 0x02 /* req write enb */
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#define O_REV 0x04 /* reverse oper */
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#define O_NMT 0x10 /* no motion */
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/* Device status in UST, ^ = dynamic */
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#define MTDV_OVR 0x80 /* overrun - NI */
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#define MTDV_WRE 0x40 /* write enabled^ */
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#define MTDV_WLE 0x20 /* write lock err */
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#define MTDV_EOF 0x10 /* end of file */
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#define MTDV_DTE 0x08 /* data error */
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#define MTDV_BOT 0x04 /* begin of tape */
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#define MTDV_EOT 0x02 /* end of tape^ */
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#define MTDV_REW 0x01 /* rewinding^ */
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#define MTAI_MASK (MTDV_OVR|MTDV_WLE|MTDV_EOF|MTDV_DTE)
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#define MTAI_V_INT 6
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#define MTAI_INT (1u << MTAI_V_INT)
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uint32 mt_stopioe = 1;
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int32 mt_rwtime = 10000; /* rewind latency */
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int32 mt_ctime = 100; /* command latency */
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int32 mt_time = 10; /* record latency */
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uint32 mt_rwi = 0; /* rewind interrupts */
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t_mtrlnt mt_bptr;
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t_mtrlnt mt_blim;
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uint8 mt_xb[MT_MAXFR]; /* transfer buffer */
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uint8 mt_op[128] = {
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0, O_ATT|O_WRE, O_ATT, O_NMT, O_NMT, 0, 0, 0, /* wr, rd, set, sense */
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0, 0, 0, 0, O_ATT|O_REV, 0, 0, 0, /* rd rev */
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0, 0, 0, O_ATT, 0, 0, 0, 0, /* rewind & int */
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, O_ATT, 0, 0, 0, 0, /* rewind offline */
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, O_ATT, 0, 0, 0, 0, /* rewind */
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, O_ATT, 0, 0, 0, 0, /* space fwd rec */
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0, 0, 0, O_ATT|O_REV, 0, 0, 0, 0, /* space bk rec */
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0, 0, 0, O_ATT, 0, 0, 0, 0, /* space fwd file */
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0, 0, 0, O_ATT|O_REV, 0, 0, 0, 0, /* space bk file */
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0, 0, 0, O_NMT, 0, 0, 0, 0, /* set erase */
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, O_ATT|O_WRE, 0, 0, 0, 0, /* write tmk */
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0, 0, 0, 0, 0, 0, 0, 0
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};
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extern uint32 chan_ctl_time;
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extern uint8 ascii_to_ebcdic[128];
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extern uint8 ebcdic_to_ascii[256];
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uint32 mt_disp (uint32 op, uint32 dva, uint32 *dvst);
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uint32 mt_tio_status (uint32 un);
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uint32 mt_tdv_status (uint32 un);
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t_stat mt_chan_err (uint32 dva, uint32 st);
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t_stat mtu_svc (UNIT *uptr);
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t_stat mtr_svc (UNIT *uptr);
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t_stat mt_reset (DEVICE *dptr);
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t_stat mt_attach (UNIT *uptr, CONST char *cptr);
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t_stat mt_detach (UNIT *uptr);
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t_stat mt_flush_buf (UNIT *uptr);
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t_stat mt_map_err (UNIT *uptr, t_stat r);
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int32 mt_clr_int (uint32 dva);
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void mt_set_rwi (uint32 un);
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void mt_clr_rwi (uint32 un);
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/* MT data structures
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mt_dev MT device descriptor
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mt_unit MT unit descriptors
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mt_reg MT register list
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mt_mod MT modifiers list
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*/
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dib_t mt_dib = { DVA_MT, mt_disp };
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/* First 'n' units are tape drives; second 'n' are rewind threads */
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UNIT mt_unit[] = {
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtu_svc, UNIT_ATTABLE+UNIT_ROABLE+UNIT_DISABLE, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) },
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{ UDATA (&mtr_svc, UNIT_DIS, 0) }
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};
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REG mt_reg[] = {
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{ BRDATA (BUF, mt_xb, 16, 8, MT_MAXFR) },
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{ DRDATA (BPTR, mt_bptr, 17) },
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{ DRDATA (BLNT, mt_blim, 17) },
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{ HRDATA (RWINT, mt_rwi, MT_NUMDR) },
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{ DRDATA (TIME, mt_time, 24), PV_LEFT+REG_NZ },
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{ DRDATA (CTIME, mt_ctime, 24), PV_LEFT+REG_NZ },
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{ DRDATA (RWTIME, mt_rwtime, 24), PV_LEFT+REG_NZ },
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{ URDATA (UST, mt_unit[0].UST, 16, 8, 0, MT_NUMDR, 0) },
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{ URDATA (UCMD, mt_unit[0].UCMD, 16, 8, 0, 2 * MT_NUMDR, 0) },
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{ URDATA (POS, mt_unit[0].pos, 10, T_ADDR_W, 0,
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MT_NUMDR, PV_LEFT | REG_RO) },
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{ FLDATA (STOP_IOE, mt_stopioe, 0) },
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{ HRDATA (DEVNO, mt_dib.dva, 12), REG_HRO },
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{ NULL }
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};
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MTAB mt_mod[] = {
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{ MTUF_WLK, 0, "write enabled", "WRITEENABLED", NULL },
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{ MTUF_WLK, MTUF_WLK, "write locked", "LOCKED", NULL },
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{ MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT",
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&sim_tape_set_fmt, &sim_tape_show_fmt, NULL },
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{ MTAB_XTD|MTAB_VUN, 0, "CAPACITY", "CAPACITY",
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&sim_tape_set_capac, &sim_tape_show_capac, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "CHAN", "CHAN",
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&io_set_dvc, &io_show_dvc, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "DVA", "DVA",
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&io_set_dva, &io_show_dva, NULL },
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{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "CSTATE", NULL,
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NULL, &io_show_cst, NULL },
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{ 0 }
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};
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DEVICE mt_dev = {
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"MT", mt_unit, mt_reg, mt_mod,
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MT_NUMDR * 2, 10, T_ADDR_W, 1, 16, 8,
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NULL, NULL, &mt_reset,
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&io_boot, &mt_attach, &mt_detach,
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&mt_dib, DEV_DISABLE | DEV_TAPE
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};
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/* Magtape: IO dispatch routine
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For all calls except AIO, dva is the full channel/device/unit address
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For AIO, the handler must return the unit number
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*/
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uint32 mt_disp (uint32 op, uint32 dva, uint32 *dvst)
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{
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uint32 un = DVA_GETUNIT (dva);
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UNIT *uptr = &mt_unit[un];
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if ((un >= MT_NUMDR) || /* inv unit num? */
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(uptr-> flags & UNIT_DIS)) { /* disabled unit? */
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*dvst = DVT_NODEV;
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return 0;
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}
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switch (op) { /* case on op */
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case OP_SIO: /* start I/O */
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*dvst = mt_tio_status (un); /* get status */
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if (chan_chk_dvi (dva)) /* int pending? */
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*dvst |= (CC2 << DVT_V_CC); /* SIO fails */
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else if ((*dvst & (DVS_CST|DVS_DST)) == 0) { /* ctrl + dev idle? */
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uptr->UCMD = MCM_INIT; /* start dev thread */
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sim_activate (uptr, 0);
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}
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break;
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case OP_TIO: /* test status */
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*dvst = mt_tio_status (un); /* return status */
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break;
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case OP_TDV: /* test status */
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*dvst = mt_tdv_status (un); /* return status */
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break;
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case OP_HIO: /* halt I/O */
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*dvst = mt_tio_status (un); /* get status */
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if ((int32) un == chan_chk_chi (dva)) /* halt active ctlr int? */
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chan_clr_chi (dva); /* clear ctlr int */
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if (sim_is_active (uptr)) { /* chan active? */
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sim_cancel (uptr); /* stop unit */
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chan_uen (dva); /* uend */
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}
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mt_clr_rwi (un); /* clear rewind int */
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sim_cancel (uptr + MT_REW); /* cancel rewind */
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break;
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case OP_AIO: /* acknowledge int */
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un = mt_clr_int (mt_dib.dva); /* clr int, get unit and flag */
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*dvst =
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(mt_tdv_status (un & DVA_M_DEVMU) & MTAI_MASK) | /* device status */
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(un & MTAI_INT) | /* device int flag */
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((un & DVA_M_UNIT) << DVT_V_UN); /* unit number */
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break;
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default:
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*dvst = 0;
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return SCPE_IERR;
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}
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return 0;
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}
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/* Unit service
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1. The full unit address must be reconstructed at entry, for use in interrupt/error routines
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2. The magtape error library returns status code 'r' that overlaps SCP error codes. mt_map_err
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translates/acts upon these code and returns 'st'. This can incude channel error codes,
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so mt_chan_err finally resolves the errors to machine-specific actions (UEND) or an
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error code to return to SCP.
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3. Channel routines always return channel error codes and must invoke mt_chan_err.
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4. Tape mark can be encountered on any read or space command. Except for space file,
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it is treated as an error and causes a UEND.
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The macro CHS_IFERR is TRUE if the error code is a channel error or a fatal SCP error
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and FALSE if the error code is a chennel information code or 0.
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*/
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t_stat mtu_svc (UNIT *uptr)
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{
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uint32 cmd = uptr->UCMD;
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uint32 un = uptr - mt_unit;
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uint32 dva = mt_dib.dva | un;
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uint32 c;
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int32 t;
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t_mtrlnt tbc;
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t_stat r, st;
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if (cmd == MCM_INIT) { /* init state */
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if ((t = sim_activate_time (uptr + MT_REW)) != 0) { /* rewinding? */
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sim_activate (uptr, t); /* retry when done */
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return SCPE_OK;
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}
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st = chan_get_cmd (dva, &cmd); /* get command */
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if (CHS_IFERR (st)) /* channel error? */
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return mt_chan_err (dva, st);
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if ((cmd & 0x80) || /* invalid cmd? */
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(mt_op[cmd] == 0)) {
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uptr->UCMD = MCM_END; /* end state */
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sim_activate (uptr, chan_ctl_time); /* resched ctlr */
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return SCPE_OK;
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}
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else { /* valid cmd */
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if ((mt_op[cmd] & O_REV) && /* reverse op */
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(mt_unit[un].UST & MTDV_BOT)) { /* at load point? */
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chan_uen (dva); /* uend */
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return SCPE_OK;
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}
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uptr->UCMD = cmd; /* unit state */
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if (!(mt_op[cmd] & O_NMT)) /* motion? */
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uptr->UST = 0; /* clear status */
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}
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mt_blim = 0; /* no buffer yet */
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sim_activate (uptr, chan_ctl_time); /* continue thread */
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return SCPE_OK; /* done */
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}
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if (cmd == MCM_END) { /* end state */
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st = chan_end (dva); /* set channel end */
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if (CHS_IFERR (st)) /* channel error? */
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return mt_chan_err (dva, st);
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if (st == CHS_CCH) { /* command chain? */
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uptr->UCMD = MCM_INIT; /* restart thread */
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sim_activate (uptr, chan_ctl_time);
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}
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else uptr->UCMD = 0; /* ctlr idle */
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return SCPE_OK; /* done */
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}
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if ((mt_op[cmd] & O_ATT) && /* op req att and */
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((uptr->flags & UNIT_ATT) == 0)) { /* not attached? */
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sim_activate (uptr, mt_ctime); /* retry */
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return mt_stopioe? SCPE_UNATT: SCPE_OK;
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}
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if ((mt_op[cmd] & O_WRE) && /* write op and */
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sim_tape_wrp (uptr)) { /* write protected? */
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uptr->UST |= MTDV_WLE; /* set status */
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chan_uen (dva); /* uend */
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return SCPE_OK;
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}
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switch (cmd) { /* case on command */
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case MCM_SFWR: /* space forward */
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if ((r = sim_tape_sprecf (uptr, &tbc))) { /* spc rec fwd, err? */
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st = mt_map_err (uptr, r); /* map error */
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if (CHS_IFERR (st)) /* chan or SCP err? */
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return mt_chan_err (dva, st); /* uend and stop */
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}
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break;
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case MCM_SBKR: /* space reverse */
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if ((r = sim_tape_sprecr (uptr, &tbc))) { /* spc rec rev, err? */
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st = mt_map_err (uptr, r); /* map error */
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if (CHS_IFERR (st)) /* chan or SCP err? */
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return mt_chan_err (dva, st); /* uend and stop */
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}
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break;
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case MCM_SFWF: /* space fwd file */
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while ((r = sim_tape_sprecf (uptr, &tbc)) == MTSE_OK) ;
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if (r != MTSE_TMK) { /* no tmk? */
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st = mt_map_err (uptr, r); /* map error */
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if (CHS_IFERR (st)) /* chan or SCP err? */
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return mt_chan_err (dva, st); /* uend and stop */
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}
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uptr->UST |= MTDV_EOF; /* set eof */
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break;
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case MCM_SBKF: /* space rev file */
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while ((r = sim_tape_sprecr (uptr, &tbc)) == MTSE_OK) ;
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if (r != MTSE_TMK) { /* no tmk? */
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st = mt_map_err (uptr, r); /* map error */
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if (CHS_IFERR (st)) /* chan or SCP err? */
|
|
return mt_chan_err (dva, st); /* uend and stop */
|
|
}
|
|
uptr->UST |= MTDV_EOF; /* set eof */
|
|
break;
|
|
|
|
case MCM_WTM: /* write eof */
|
|
if ((r = sim_tape_wrtmk (uptr))) { /* write tmk, err? */
|
|
st = mt_map_err (uptr, r); /* map error */
|
|
if (CHS_IFERR (st)) /* chan or SCP err? */
|
|
return mt_chan_err (dva, st); /* uend and stop */
|
|
}
|
|
uptr->UST |= MTDV_EOF; /* set eof */
|
|
break;
|
|
|
|
case MCM_RWU: /* rewind unload */
|
|
sim_tape_detach (uptr); /* detach tape */
|
|
break;
|
|
|
|
case MCM_REW: /* rewind */
|
|
case MCM_RWI: /* rewind and int */
|
|
if ((r = sim_tape_rewind (uptr))) { /* rewind */
|
|
st = mt_map_err (uptr, r); /* map error */
|
|
if (CHS_IFERR (st)) /* chan or SCP err? */
|
|
return mt_chan_err (dva, st); /* uend and stop */
|
|
}
|
|
mt_unit[un + MT_REW].UCMD = uptr->UCMD; /* copy command */
|
|
sim_activate (uptr + MT_REW, mt_rwtime); /* sched compl */
|
|
break;
|
|
|
|
case MCM_READ: /* read */
|
|
if (mt_blim == 0) { /* first read? */
|
|
if ((r = sim_tape_rdrecf (uptr, mt_xb, &mt_blim, MT_MAXFR))) {
|
|
st = mt_map_err (uptr, r); /* map error */
|
|
if (CHS_IFERR (st)) /* chan or SCP err? */
|
|
return mt_chan_err (dva, st); /* uend and stop */
|
|
}
|
|
if (mt_blim == 0) /* no data? */
|
|
return mt_chan_err (dva, SCPE_IERR); /* should NOT happen */
|
|
mt_bptr = 0; /* init rec ptr */
|
|
}
|
|
c = mt_xb[mt_bptr++]; /* get char */
|
|
st = chan_WrMemB (dva, c); /* write to memory */
|
|
if (CHS_IFERR (st)) /* channel error? */
|
|
return mt_chan_err (dva, st);
|
|
if ((st != CHS_ZBC) && (mt_bptr != mt_blim)) { /* not done? */
|
|
sim_activate (uptr, mt_time); /* continue thread */
|
|
return SCPE_OK;
|
|
}
|
|
if (((st == CHS_ZBC) ^ (mt_bptr == mt_blim)) && /* length err? */
|
|
chan_set_chf (dva, CHF_LNTE)) /* uend taken? */
|
|
return SCPE_OK; /* finished */
|
|
break; /* normal end */
|
|
|
|
case MCM_RDBK: /* read reverse */
|
|
if (mt_blim == 0) { /* first read? */
|
|
if ((r = sim_tape_rdrecr (uptr, mt_xb, &mt_blim, MT_MAXFR))) {
|
|
st = mt_map_err (uptr, r); /* map error */
|
|
if (CHS_IFERR (st)) /* chan or SCP err? */
|
|
return mt_chan_err (dva, st); /* uend and stop */
|
|
}
|
|
if (mt_blim == 0) /* no data? */
|
|
return mt_chan_err (dva, SCPE_IERR); /* should NOT happen */
|
|
mt_bptr = mt_blim; /* init rec ptr */
|
|
}
|
|
c = mt_xb[--mt_bptr]; /* get char */
|
|
st = chan_WrMemBR (dva, c); /* write mem rev */
|
|
if (CHS_IFERR (st)) /* channel error? */
|
|
return mt_chan_err (dva, st);
|
|
if ((st != CHS_ZBC) && (mt_bptr != 0)) { /* not done? */
|
|
sim_activate (uptr, mt_time); /* continue thread */
|
|
return SCPE_OK;
|
|
}
|
|
if (((st == CHS_ZBC) ^ (mt_bptr == 0)) && /* length err? */
|
|
chan_set_chf (dva, CHF_LNTE)) /* uend taken? */
|
|
return SCPE_OK; /* finished */
|
|
break; /* normal end */
|
|
|
|
case MCM_WRITE: /* write */
|
|
st = chan_RdMemB (dva, &c); /* read char */
|
|
if (CHS_IFERR (st)) { /* channel error? */
|
|
mt_flush_buf (uptr); /* flush buffer */
|
|
return mt_chan_err (dva, st);
|
|
}
|
|
mt_xb[mt_blim++] = c; /* store in buffer */
|
|
if (st != CHS_ZBC) { /* end record? */
|
|
sim_activate (uptr, mt_time); /* continue thread */
|
|
return SCPE_OK;
|
|
}
|
|
if ((r = mt_flush_buf (uptr)) != 0) { /* flush buffer */
|
|
st = mt_map_err (uptr, r); /* map error */
|
|
if (CHS_IFERR (st)) /* chan or SCP err? */
|
|
return mt_chan_err (dva, st); /* uend and stop */
|
|
}
|
|
break;
|
|
}
|
|
|
|
uptr->UCMD = MCM_END; /* end state */
|
|
sim_activate (uptr, mt_ctime); /* sched ctlr */
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Rewind completion - set BOT, interrupt if desired */
|
|
|
|
t_stat mtr_svc (UNIT *uptr)
|
|
{
|
|
uint32 un = uptr - mt_unit - MT_REW;
|
|
|
|
mt_unit[un].UST |= MTDV_BOT; /* set BOT */
|
|
if (uptr->UCMD == MCM_RWI) /* int wanted? */
|
|
mt_set_rwi (un); /* interrupt */
|
|
return SCPE_OK;
|
|
}
|
|
|
|
t_stat mt_flush_buf (UNIT *uptr)
|
|
{
|
|
if (mt_blim == 0) /* any output? */
|
|
return SCPE_OK;
|
|
return sim_tape_wrrecf (uptr, mt_xb, mt_blim); /* write, err? */
|
|
}
|
|
|
|
/* Map tape error status - returns channel inactive, SCPE_OK, or SCP error */
|
|
|
|
t_stat mt_map_err (UNIT *uptr, t_stat st)
|
|
{
|
|
|
|
uint32 un = uptr - mt_unit;
|
|
uint32 dva = mt_dib.dva | un;
|
|
|
|
switch (st) {
|
|
|
|
case MTSE_FMT: /* illegal fmt */
|
|
case MTSE_UNATT: /* not attached */
|
|
case MTSE_WRP: /* write protect */
|
|
default: /* unknown error*/
|
|
chan_set_chf (dva, CHF_XMME); /* set err, fall through */
|
|
case MTSE_OK: /* no error */
|
|
return SCPE_IERR;
|
|
|
|
case MTSE_TMK: /* end of file */
|
|
case MTSE_EOM: /* end of medium */
|
|
uptr->UST |= MTDV_EOF; /* set eof flag */
|
|
return CHS_INACTV;
|
|
|
|
case MTSE_IOERR: /* IO error */
|
|
uptr->UST |= MTDV_DTE; /* set DTE flag */
|
|
chan_set_chf (dva, CHF_XMDE);
|
|
return SCPE_IOERR;
|
|
|
|
case MTSE_INVRL: /* invalid rec lnt */
|
|
uptr->UST |= MTDV_DTE; /* set DTE flag */
|
|
chan_set_chf (dva, CHF_XMDE);
|
|
return SCPE_MTRLNT;
|
|
|
|
case MTSE_RECE: /* record in error */
|
|
uptr->UST |= MTDV_DTE; /* set DTE flag */
|
|
return chan_set_chf (dva, CHF_XMDE); /* possible error */
|
|
|
|
case MTSE_BOT: /* reverse into BOT */
|
|
uptr->UST |= MTDV_BOT; /* set BOT */
|
|
return CHS_INACTV;
|
|
} /* end switch */
|
|
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* MT status routine */
|
|
|
|
uint32 mt_tio_status (uint32 un)
|
|
{
|
|
uint32 i, st;
|
|
UNIT *uptr = &mt_unit[un];
|
|
|
|
st = DVS_AUTO; /* flags */
|
|
if (sim_is_active (uptr) || /* unit busy */
|
|
sim_is_active (uptr + MT_REW)) /* or rewinding? */
|
|
st |= DVS_DBUSY;
|
|
else if ((uptr -> flags & UNIT_ATT) == 0) /* not att => offl */
|
|
st |= DVS_DOFFL;
|
|
for (i = 0; i < MT_NUMDR; i++) { /* loop thru units */
|
|
if (sim_is_active (&mt_unit[i])) { /* active? */
|
|
st |= (DVS_CBUSY | (CC2 << DVT_V_CC)); /* ctrl is busy */
|
|
}
|
|
}
|
|
return st;
|
|
}
|
|
|
|
uint32 mt_tdv_status (uint32 un)
|
|
{
|
|
uint32 st;
|
|
UNIT *uptr = &mt_unit[un];
|
|
|
|
if (uptr->flags & UNIT_ATT) { /* attached? */
|
|
st = uptr->UST; /* unit stat */
|
|
if (sim_tape_eot (uptr)) /* at EOT? */
|
|
st |= MTDV_EOT;
|
|
if (!sim_tape_wrp (uptr)) /* not wlock? */
|
|
st |= MTDV_WRE;
|
|
}
|
|
else st = (CC2 << DVT_V_CC);
|
|
if (sim_is_active (uptr + MT_REW)) /* unit rewinding? */
|
|
st |= (MTDV_REW | (CC2 << DVT_V_CC));
|
|
return st;
|
|
}
|
|
|
|
|
|
/* Channel error */
|
|
|
|
t_stat mt_chan_err (uint32 dva, uint32 st)
|
|
{
|
|
chan_uen (dva); /* uend */
|
|
if (st < CHS_ERR)
|
|
return st;
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Clear controller/device interrupt, return active unit */
|
|
|
|
int32 mt_clr_int (uint32 dva)
|
|
{
|
|
int32 iu;
|
|
|
|
if ((iu = chan_clr_chi (dva)) >= 0) { /* chan int? clear */
|
|
if (mt_rwi != 0) /* dev ints? */
|
|
chan_set_dvi (dva); /* set them */
|
|
return iu;
|
|
}
|
|
for (iu = 0; iu < MT_NUMDR; iu++) { /* rewind int? */
|
|
if (mt_rwi & (1u << iu)) {
|
|
mt_clr_rwi ((uint32) iu);
|
|
return (iu | MTAI_INT);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* Set rewind interrupt */
|
|
|
|
void mt_set_rwi (uint32 un)
|
|
{
|
|
mt_rwi |= (1u << un);
|
|
chan_set_dvi (mt_dib.dva); /* set INP */
|
|
return;
|
|
}
|
|
|
|
/* Clear rewind interrupt */
|
|
|
|
void mt_clr_rwi (uint32 un)
|
|
{
|
|
mt_rwi &= ~(1u << un); /* clear */
|
|
if (mt_rwi != 0) /* more? */
|
|
chan_set_dvi (mt_dib.dva);
|
|
else if (chan_chk_chi (mt_dib.dva) < 0) /* any int? */
|
|
chan_clr_chi (mt_dib.dva); /* clr INP */
|
|
return;
|
|
}
|
|
|
|
/* Reset routine */
|
|
|
|
t_stat mt_reset (DEVICE *dptr)
|
|
{
|
|
uint32 i;
|
|
|
|
for (i = 0; i < MT_NUMDR; i++) {
|
|
sim_cancel (&mt_unit[i]); /* stop unit */
|
|
sim_cancel (&mt_unit[i + MT_REW]); /* stop rewind */
|
|
if (mt_unit[i].flags & UNIT_ATT) /* attached? */
|
|
mt_unit[i].UST &= MTDV_BOT; /* clr sta exc BOT */
|
|
else mt_unit[i].UST = 0;
|
|
mt_unit[i].UCMD = 0;
|
|
}
|
|
mt_rwi = 0;
|
|
mt_bptr = 0;
|
|
mt_blim = 0;
|
|
chan_reset_dev (mt_dib.dva); /* clr int, active */
|
|
for (i = 0; i < MT_MAXFR; i++)
|
|
mt_xb[i] = 0;
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Attach routine */
|
|
|
|
t_stat mt_attach (UNIT *uptr, CONST char *cptr)
|
|
{
|
|
t_stat r;
|
|
|
|
r = sim_tape_attach (uptr, cptr);
|
|
if (r != SCPE_OK)
|
|
return r;
|
|
uptr->UST = MTDV_BOT;
|
|
return r;
|
|
}
|
|
|
|
/* Detach routine */
|
|
|
|
t_stat mt_detach (UNIT* uptr)
|
|
{
|
|
if (!(uptr->flags & UNIT_ATTABLE))
|
|
return SCPE_NOATT;
|
|
uptr->UST = 0;
|
|
sim_cancel (uptr + MT_REW);
|
|
return sim_tape_detach (uptr);
|
|
}
|