WARNING: V2.10 has reorganized and renamed some of the definition files for the PDP-10, PDP-11, and VAX. Be sure to delete all previous source files before you unpack the Zip archive, or unpack it into a new directory structure. WARNING: V2.10 has a new, more comprehensive save file format. Restoring save files from previous releases will cause 'invalid register' errors and loss of CPU option flags, device enable/ disable flags, unit online/offline flags, and unit writelock flags. WARNING: If you are using Visual Studio .NET through the IDE, be sure to turn off the /Wp64 flag in the project settings, or dozens of spurious errors will be generated. WARNING: Compiling Ethernet support under Windows requires extra steps; see the Ethernet readme file. Ethernet support is currently available only for Windows, Linux, NetBSD, and OpenBSD. 1. New Features 1.1 SCP and Libraries - The VT emulation package has been replaced by the capability to remote the console to a Telnet session. Telnet clients typically have more complete and robust VT100 emulation. - Simulated devices may now have statically allocated buffers, in addition to dynamically allocated buffers or disk-based data stores. - The DO command now takes substitutable arguments (max 9). In command files, %n represents substitutable argument n. - The initial command line is now interpreted as the command name and substitutable arguments for a DO command. This is backward compatible to prior versions. - The initial command line parses switches. -Q is interpreted as quiet mode; informational messages are suppressed. - The HELP command now takes an optional argument. HELP <cmd> types help on the specified command. - Hooks have been added for implementing GUI-based consoles, as well as simulator-specific command extensions. A few internal data structures and definitions have changed. - Two new routines (tmxr_open_master, tmxr_close_master) have been added to sim_tmxr.c. The calling sequence for sim_accept_conn has been changed in sim_sock.c. - The calling sequence for the VM boot routine has been modified to add an additional parameter. - SAVE now saves, and GET now restores, controller and unit flags. - Library sim_ether.c has been added for Ethernet support. 1.2 VAX - Non-volatile RAM (NVR) can behave either like a memory or like a disk-based peripheral. If unattached, it behaves like memory and is saved and restored by SAVE and RESTORE, respectively. If attached, its contents are loaded from disk by ATTACH and written back to disk at DETACH and EXIT. - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape) has been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from vax_stddev.c and now references a common implementation file, dec_pt.h. - Examine and deposit switches now work on all devices, not just the CPU. - Device address conflicts are not detected until simulation starts. 1.3 PDP-11 - SHOW <device> VECTOR displays the device's interrupt vector. Most devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk), RX211 (double density floppy), and KW11P programmable clock have been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from pdp11_stddev.c and now references a common implementation file, dec_pt.h. - Device bootstraps now use the actual CSR specified by the SET ADDRESS command, rather than just the default CSR. Note that PDP-11 operating systems may NOT support booting with non-standard addresses. - Specifying more than 256KB of memory, or changing the bus configuration, causes all peripherals that are not compatible with the current bus configuration to be disabled. - Device address conflicts are not detected until simulation starts. 1.4 PDP-10 - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The RX211 (double density floppy) has been added; it is off by default. - The paper tape now references a common implementation file, dec_pt.h. - Device address conflicts are not detected until simulation starts. 1.5 PDP-1 - DECtape (then known as MicroTape) support has been added. - The line printer and DECtape can be disabled and enabled. 1.6 PDP-8 - The RX28 (double density floppy) has been added as an option to the existing RX8E controller. - SHOW <device> DEVNO displays the device's device number. Most devices allow the device number to be changed with SET <device> DEVNO=nnn. - Device number conflicts are not detected until simulation starts. 1.7 IBM 1620 - The IBM 1620 simulator has been released. 1.8 AltairZ80 - A hard drive has been added for increased storage. - Several bugs have been fixed. 1.9 HP 2100 - The 12845A has been added and made the default line printer (LPT). The 12653A has been renamed LPS and is off by default. It also supports the diagnostic functions needed to run the DCPC and DMS diagnostics. - The 12557A/13210A disk defaults to the 13210A (7900/7901). - The 12559A magtape is off by default. - New CPU options (EAU/NOEAU) enable/disable the extended arithmetic instructions for the 2116. These instructions are standard on the 2100 and 21MX. - New CPU options (MPR/NOMPR) enable/disable memory protect for the 2100 and 21MX. - New CPU options (DMS/NODMS) enable/disable the dynamic mapping instructions for the 21MX. - The 12539 timebase generator autocalibrates. 1.10 Simulated Magtapes - Simulated magtapes recognize end of file and the marker 0xFFFFFFFF as end of medium. Only the TMSCP tape simulator can generate an end of medium marker. - The error handling in simulated magtapes was overhauled to be consistent through all simulators. 1.11 Simulated DECtapes - Added support for RT11 image file format (256 x 16b) to DECtapes. 2. Release Notes 2.1 Bugs Fixed - TS11/TSV05 was not simulating the XS0_MOT bit, causing failures under VMS. In addition, two of the CTL options were coded interchanged. - IBM 1401 tape was not setting a word mark under group mark for load mode reads. This caused the diagnostics to crash. - SCP bugs in ssh_break and set_logon were fixed (found by Dave Hittner). - Numerous bugs in the HP 2100 extended arithmetic, floating point, 21MX, DMS, and IOP instructions were fixed. Bugs were also fixed in the memory protect and DMS functions. The moving head disks (DP, DQ) were revised to simulate the hardware more accurately. Missing functions in DQ (address skip, read address) were added. 2.2 HP 2100 Debugging - The HP 2100 CPU nows runs all of the CPU diagnostics. - The peripherals run most of the peripheral diagnostics. There is still a problem in overlapped seek operation on the disks. See the file hp2100_diag.txt for details. 3. In Progress These simulators are not finished and are available in a separate Zip archive distribution. - Interdata 16b/32b: coded, partially tested. See the file id_diag.txt for details. - SDS 940: coded, partially tested.
463 lines
16 KiB
C
463 lines
16 KiB
C
/* i1620_dp.c: IBM 1311 disk simulator
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Copyright (c) 2002, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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dp 1311 disk pack
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The 1311 disk pack has 100 cylinders, 10 tracks/cylinder, 20 sectors/track.
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Each sector contains 105 characters of information:
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5c sector address
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100c sector data
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By default, a sector's address field will be '00000', which is interpreted
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to mean the implied sector number that would be in place if the disk pack
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had been formatted with sequential sector numbers.
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18-Oct-02 RMS Fixed bug in error testing (found by Hans Pufal)
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*/
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#include "i1620_defs.h"
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#define DP_NUMDR 4 /* #drives */
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#define UNIT_V_WAE (UNIT_V_UF + 0) /* write addr enab */
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#define UNIT_WAE (1 << UNIT_V_WAE)
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/* Disk format */
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#define DP_ADDR 5 /* address */
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#define DP_DATA 100 /* data */
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#define DP_NUMCH (DP_ADDR + DP_DATA)
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#define DP_NUMSC 20 /* #sectors */
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#define DP_NUMSF 10 /* #surfaces */
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#define DP_NUMCY 100 /* #cylinders */
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#define DP_TOTSC (DP_NUMCY * DP_NUMSF * DP_NUMSC)
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#define DP_SIZE (DP_TOTSC * DP_NUMCH)
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/* Disk control field */
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#define DCF_DRV 0 /* drive select */
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#define DCF_SEC 1 /* sector addr */
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#define DCF_SEC_LEN 5
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#define DCF_CNT (DCF_SEC + DCF_SEC_LEN) /* sector count */
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#define DCF_CNT_LEN 3
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#define DCF_ADR (DCF_CNT + DCF_CNT_LEN) /* buffer address */
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#define DCF_ADR_LEN 5
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#define DCF_LEN (DCF_ADR + DCF_ADR_LEN)
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/* Functions */
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#define FNC_SEEK 1 /* seek */
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#define FNC_SEC 0 /* sectors */
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#define FNC_WCH 1 /* write check */
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#define FNC_NRL 2 /* no rec lnt chk */
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#define FNC_TRK 4 /* tracks */
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#define FNC_WRI 8 /* write offset */
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#define CYL u3 /* current cylinder */
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extern uint8 M[MAXMEMSIZE]; /* memory */
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extern uint8 ind[NUM_IND];
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extern UNIT cpu_unit;
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int32 dp_stop = 1; /* disk err stop */
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t_addr dp_ba = 0; /* buffer addr */
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t_stat dp_reset (DEVICE *dptr);
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t_stat dp_rdadr (UNIT *uptr, int32 sec, int32 qnr, int32 qwc);
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t_stat dp_rdsec (UNIT *uptr, int32 sec, int32 qnr, int32 qwc);
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t_stat dp_wradr (UNIT *uptr, int32 sec, int32 qnr);
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t_stat dp_wrsec (UNIT *uptr, int32 sec, int32 qnr);
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int32 dp_fndsec (UNIT *uptr, int32 sec, t_bool rd);
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t_stat dp_nexsec (UNIT *uptr, int32 sec, int32 psec, t_bool rd);
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t_bool dp_zeroad (uint8 *ap);
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int32 dp_cvt_ad (uint8 *ap);
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int32 dp_trkop (int32 drv, int32 sec);
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int32 dp_cvt_bcd (uint32 ad, int32 len);
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void dp_fill (UNIT *uptr, uint32 da, int32 cnt);
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t_stat dp_tstgm (uint32 c, int32 qnr);
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/* DP data structures
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dp_dev DP device descriptor
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dp_unit DP unit list
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dp_reg DP register list
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dp_mod DP modifier list
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*/
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UNIT dp_unit[] = {
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{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ATTABLE +
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UNIT_BUFABLE + UNIT_MUSTBUF + UNIT_BCD, DP_SIZE) },
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{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ATTABLE +
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UNIT_BUFABLE + UNIT_MUSTBUF + UNIT_BCD, DP_SIZE) },
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{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ATTABLE +
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UNIT_BUFABLE + UNIT_MUSTBUF + UNIT_BCD, DP_SIZE) },
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{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ATTABLE +
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UNIT_BUFABLE + UNIT_MUSTBUF + UNIT_BCD, DP_SIZE) } };
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REG dp_reg[] = {
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{ FLDATA (ADCHK, ind[IN_DACH], 0) },
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{ FLDATA (WLRC, ind[IN_DWLR], 0) },
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{ FLDATA (CYLO, ind[IN_DCYO], 0) },
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{ FLDATA (ERR, ind[IN_DERR], 0) },
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{ FLDATA (DPSTOP, dp_stop, 0) },
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{ URDATA (CYL, dp_unit[0].CYL, 10, 8, 0,
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DP_NUMDR, PV_LEFT + REG_RO) },
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{ NULL } };
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MTAB dp_mod[] = {
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{ UNIT_WAE, 0, "write address disabled", "ADDROFF", NULL },
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{ UNIT_WAE, UNIT_WAE, "write address enabled", "ADDRON", NULL },
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{ 0 } };
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DEVICE dp_dev = {
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"DP", dp_unit, dp_reg, dp_mod,
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DP_NUMDR, 10, 21, 1, 16, 5,
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NULL, NULL, &dp_reset,
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NULL, NULL, NULL };
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/* Disk IO routine */
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t_stat dp (uint32 op, uint32 pa, uint32 f0, uint32 f1)
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{
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int32 drv, sa, sec, psec, cnt, qwc, qnr, t;
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UNIT *uptr;
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t_stat r;
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if (pa & 1) return STOP_INVDCF; /* dcf must be even */
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ind[IN_DACH] = ind[IN_DWLR] = 0; /* clr indicators */
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ind[IN_DERR] = ind[IN_DCYO] = 0;
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sa = ADDR_A (pa, DCF_SEC); /* ptr to sector */
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if (((dp_unit[0].flags & UNIT_DIS) == 0) && /* only drive 0? */
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(dp_unit[1].flags & UNIT_DIS) &&
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(dp_unit[2].flags & UNIT_DIS) &&
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(dp_unit[3].flags & UNIT_DIS)) drv = 0; /* ignore drv select */
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else drv = (((M[pa] & 1)? M[pa]: M[sa]) & 0xE) >> 1; /* drive # */
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if (drv >= DP_NUMDR) return STOP_INVDRV; /* invalid? */
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uptr = dp_dev.units + drv; /* get unit ptr */
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if ((uptr->flags & UNIT_ATT) == 0) { /* attached? */
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ind[IN_DERR] = 1; /* no, error */
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CRETIOE (dp_stop, SCPE_UNATT); }
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sec = dp_cvt_bcd (sa, DCF_SEC_LEN); /* cvt sector */
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if ((sec < 0) || (sec >= (DP_NUMDR * DP_TOTSC))) /* bad sector? */
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return STOP_INVDSC;
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if (op == OP_K) { /* seek? */
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if (f1 != FNC_SEEK) return STOP_INVFNC; /* really? */
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uptr->CYL = (sec / (DP_NUMSF * DP_NUMSC)) % /* set cyl # */
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DP_NUMCY;
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return SCPE_OK; } /* done! */
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cnt = dp_cvt_bcd (ADDR_A (pa, DCF_CNT), DCF_CNT_LEN); /* get count */
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t = dp_cvt_bcd (ADDR_A (pa, DCF_ADR), DCF_ADR_LEN); /* get address */
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if ((t < 0) || (t & 1)) return STOP_INVDBA; /* bad address? */
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dp_ba = t; /* save addr */
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if (f1 >= FNC_WRI) return STOP_INVFNC; /* invalid func? */
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if (op == OP_RN) qwc = f1 & FNC_WCH; /* read? set wch */
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else if (op == OP_WN) { /* write? */
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if (op & FNC_WCH) return STOP_INVFNC; /* cant check */
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f1 = f1 + FNC_WRI; } /* offset fnc */
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else return STOP_INVFNC; /* not R or W */
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qnr = f1 & FNC_NRL; /* no rec check? */
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switch (f1 & ~(FNC_WCH | FNC_NRL)) { /* case on function */
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case FNC_SEC: /* read sectors */
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if (cnt <= 0) return STOP_INVDCN; /* bad count? */
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psec = dp_fndsec (uptr, sec, TRUE); /* find sector */
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if (psec < 0) CRETIOE (dp_stop, STOP_DACERR); /* error? */
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do { /* loop on count */
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if (r = dp_rdsec (uptr, psec, qnr, qwc)) /* read sector */
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break;
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sec++; psec++; } /* next sector */
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while ((--cnt > 0) &&
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((r = dp_nexsec (uptr, sec, psec, TRUE)) == SCPE_OK));
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break; /* done, clean up */
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case FNC_TRK: /* read track */
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psec = dp_trkop (drv, sec); /* start of track */
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for (cnt = 0; cnt < DP_NUMSC; cnt++) { /* full track */
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if (r = dp_rdadr (uptr, psec, qnr, qwc)) /* read addr */
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break; /* error? */
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if (r = dp_rdsec (uptr, psec, qnr, qwc)) /* read data */
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break; /* error? */
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psec = dp_trkop (drv, sec) + ((psec + 1) % DP_NUMSC); }
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break; /* done, clean up */
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case FNC_SEC + FNC_WRI: /* write */
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if (cnt <= 0) return STOP_INVDCN; /* bad count? */
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psec = dp_fndsec (uptr, sec, FALSE); /* find sector */
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if (psec < 0) CRETIOE (dp_stop, STOP_DACERR); /* error? */
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do { /* loop on count */
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if (r = dp_tstgm (M[dp_ba], qnr)) break; /* start with gm? */
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if (r = dp_wrsec (uptr, psec, qnr)) break; /* write data */
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sec++; psec++; } /* next sector */
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while ((--cnt > 0) &&
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((r = dp_nexsec (uptr, sec, psec, FALSE)) == SCPE_OK));
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break; /* done, clean up */
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case FNC_TRK + FNC_WRI: /* write track */
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if ((uptr->flags & UNIT_WAE) == 0) /* enabled? */
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return STOP_WRADIS;
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psec = dp_trkop (drv, sec); /* start of track */
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for (cnt = 0; cnt < DP_NUMSC; cnt++) { /* full track */
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if (r = dp_tstgm (M[dp_ba], qnr)) break; /* start with gm? */
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if (r = dp_wradr (uptr, psec, qnr)) break; /* write addr */
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if (r = dp_wrsec (uptr, psec, qnr)) break; /* write data */
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psec = dp_trkop (drv, sec) + ((psec + 1) % DP_NUMSC); }
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break; /* done, clean up */
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default: /* unknown */
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return STOP_INVFNC; }
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if ((r == SCPE_OK) && !qnr) { /* eor check? */
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if ((M[dp_ba] & DIGIT) != GRP_MARK) { /* GM at end? */
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ind[IN_DWLR] = ind[IN_DERR] = 1; /* no, error */
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r = STOP_WRLERR; } }
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if ((r != SCPE_OK) && /* error? */
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(dp_stop || !ind[IN_DERR])) return r; /* iochk or stop? */
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return SCPE_OK; /* continue */
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}
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/* Read or compare address with memory */
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t_stat dp_rdadr (UNIT *uptr, int32 sec, int32 qnr, int32 qwc)
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{
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int32 i;
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uint8 ad;
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int32 da = (sec % DP_TOTSC) * DP_NUMCH; /* char number */
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uint8 *ap = ((uint8 *) uptr->filebuf) + da; /* buf ptr */
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t_bool zad = dp_zeroad (ap); /* zero address */
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static const int32 dec_tab[DP_ADDR] = /* powers of 10 */
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{ 10000, 1000, 100, 10, 1} ;
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for (i = 0; i < DP_ADDR; i++) { /* copy/check addr */
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if (zad) { /* addr zero? */
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ad = sec / dec_tab[i]; /* get addr digit */
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sec = sec % dec_tab[i]; } /* get remainder */
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else ad = *ap; /* addr digit */
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if (qwc) { /* write check? */
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if (dp_tstgm (M[dp_ba], qnr)) /* grp mrk in mem? */
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return STOP_WRLERR; /* yes, error */
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if (!zad && (M[dp_ba] != ad)) { /* digits equal? */
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ind[IN_DACH] = ind[IN_DERR] = 1; /* no, error */
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return STOP_DWCERR; } }
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else M[dp_ba] = ad & (FLAG | DIGIT); /* store digit */
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if (dp_tstgm (*ap, qnr)) return STOP_WRLERR; /* grp mrk on disk? */
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ap++; PP (dp_ba); } /* adv ptrs */
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return SCPE_OK;
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}
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/* Read or compare data with memory */
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t_stat dp_rdsec (UNIT *uptr, int32 sec, int32 qnr, int32 qwc)
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{
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int32 i;
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int32 da = (sec % DP_TOTSC) * DP_NUMCH; /* char number */
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uint8 *ap = ((uint8 *) uptr->filebuf) + da + DP_ADDR; /* buf ptr */
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for (i = 0; i < DP_DATA; i++) { /* copy data */
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if (qwc) { /* write check? */
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if (dp_tstgm (M[dp_ba], qnr)) /* grp mrk in mem? */
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return STOP_WRLERR; /* yes, error */
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if (M[dp_ba] != *ap) { /* dig+flags equal? */
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ind[IN_DACH] = ind[IN_DERR] = 1; /* no, error */
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return STOP_DWCERR; } }
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else M[dp_ba] = *ap & (FLAG | DIGIT); /* flag + digit */
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if (dp_tstgm (*ap, qnr)) return STOP_WRLERR; /* grp mrk on disk? */
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ap++; PP (dp_ba); } /* adv ptrs */
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return SCPE_OK;
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}
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/* Write address to disk */
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t_stat dp_wradr (UNIT *uptr, int32 sec, int32 qnr)
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{
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int32 i;
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uint32 da = (sec % DP_TOTSC) * DP_NUMCH; /* char number */
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uint8 *ap = ((uint8 *) uptr->filebuf) + da; /* buf ptr */
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for (i = 0; i < DP_ADDR; i++) { /* copy address */
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*ap = M[dp_ba] & (FLAG | DIGIT); /* flag + digit */
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if (da >= uptr->hwmark) uptr->hwmark = da + 1;
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if (dp_tstgm (*ap, qnr)) { /* grp mrk fm mem? */
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dp_fill (uptr, da + 1, DP_NUMCH - i - 1); /* fill addr+data */
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return STOP_WRLERR; } /* error */
|
||
da++; ap++; PP (dp_ba); /* adv ptrs */
|
||
}
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Write data to disk */
|
||
|
||
t_stat dp_wrsec (UNIT *uptr, int32 sec, int32 qnr)
|
||
{
|
||
int32 i;
|
||
uint32 da = ((sec % DP_TOTSC) * DP_NUMCH) + DP_ADDR; /* char number */
|
||
uint8 *ap = ((uint8 *) uptr->filebuf) + da; /* buf ptr */
|
||
|
||
for (i = 0; i < DP_DATA; i++) { /* copy data */
|
||
*ap = M[dp_ba] & (FLAG | DIGIT); /* get character */
|
||
if (da >= uptr->hwmark) uptr->hwmark = da + 1;
|
||
if (dp_tstgm (*ap, qnr)) { /* grp mrk fm mem? */
|
||
dp_fill (uptr, da + 1, DP_DATA - i - 1); /* fill data */
|
||
return STOP_WRLERR; } /* error */
|
||
da++; ap++; PP (dp_ba); /* adv ptrs */
|
||
}
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Find sector */
|
||
|
||
int32 dp_fndsec (UNIT *uptr, int32 sec, t_bool rd)
|
||
{
|
||
int32 ctrk = sec % (DP_NUMSF * DP_NUMSC); /* curr trk-sec */
|
||
int32 psec = ((uptr->CYL) * (DP_NUMSF * DP_NUMSC)) + ctrk;
|
||
int32 da = psec * DP_NUMCH; /* char number */
|
||
uint8 *ap = ((uint8 *) uptr->filebuf) + da; /* buf ptr */
|
||
int32 dskad, i;
|
||
|
||
if (dp_zeroad (ap)) return psec; /* addr zero? ok */
|
||
dskad = dp_cvt_ad (ap); /* cvt addr */
|
||
if (dskad == sec) { /* match? */
|
||
if (rd || ((*ap & FLAG) == 0)) return psec; /* read or !wprot? */
|
||
ind[IN_DACH] = ind[IN_DERR] = 1; /* no match */
|
||
return -1; }
|
||
psec = psec - (psec % DP_NUMSC); /* sector 0 */
|
||
for (i = 0; i < DP_NUMSC; i++, psec++) { /* check track */
|
||
da = psec * DP_NUMCH; /* char number */
|
||
ap = ((uint8 *) uptr->filebuf) + da; /* word pointer */
|
||
if (dp_zeroad (ap)) continue; /* no implicit match */
|
||
dskad = dp_cvt_ad (ap); /* cvt addr */
|
||
if (dskad == sec) { /* match? */
|
||
if (rd || ((*ap & FLAG) == 0)) return psec; /* read or !wprot? */
|
||
ind[IN_DACH] = ind[IN_DERR] = 1; /* no match */
|
||
return -1; } }
|
||
ind[IN_DACH] = ind[IN_DERR] = 1; /* no match */
|
||
return -1;
|
||
}
|
||
|
||
/* Find next sector - must be sequential, cannot cross cylinder boundary */
|
||
|
||
t_stat dp_nexsec (UNIT *uptr, int32 sec, int32 psec, t_bool rd)
|
||
{
|
||
int32 ctrk = psec % (DP_NUMSF * DP_NUMSC); /* curr trk-sec */
|
||
int32 da = psec * DP_NUMCH; /* word number */
|
||
uint8 *ap = ((uint8 *) uptr->filebuf) + da; /* buf ptr */
|
||
int32 dskad;
|
||
|
||
if (ctrk) { /* not trk zero? */
|
||
if (dp_zeroad (ap)) return SCPE_OK; /* addr zero? ok */
|
||
dskad = dp_cvt_ad (ap); /* cvt addr */
|
||
if ((dskad == sec) && /* match? */
|
||
(rd || ((*ap & FLAG) == 0))) return SCPE_OK; /* read or !wprot? */
|
||
ind[IN_DACH] = ind[IN_DERR] = 1; /* no, error */
|
||
return STOP_DACERR; }
|
||
ind[IN_DCYO] = ind[IN_DERR] = 1; /* cyl overflow */
|
||
return STOP_CYOERR;
|
||
}
|
||
|
||
/* Test for zero address */
|
||
|
||
t_bool dp_zeroad (uint8 *ap)
|
||
{
|
||
int32 i;
|
||
|
||
for (i = 0; i < DP_ADDR; i++, ap++) { /* loop thru addr */
|
||
if (*ap & DIGIT) return FALSE; } /* nonzero? lose */
|
||
return TRUE; /* all zeroes */
|
||
}
|
||
|
||
/* Test for group mark when enabled */
|
||
|
||
t_stat dp_tstgm (uint32 c, int32 qnr)
|
||
{
|
||
if (!qnr && ((c & DIGIT) == GRP_MARK)) { /* premature GM? */
|
||
ind[IN_DWLR] = ind[IN_DERR] = 1; /* error */
|
||
return STOP_WRLERR; }
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Convert disk address to binary - invalid char force bad address */
|
||
|
||
int32 dp_cvt_ad (uint8 *ap)
|
||
{
|
||
int32 i, r;
|
||
uint8 c;
|
||
|
||
for (i = r = 0; i < DP_ADDR; i++, ap++) { /* loop thru addr */
|
||
c = *ap & DIGIT; /* get digit */
|
||
if (BAD_DIGIT (c)) return -1; /* bad digit? */
|
||
r = (r * 10) + c; } /* bcd to binary */
|
||
return r;
|
||
}
|
||
|
||
/* Track operation setup */
|
||
|
||
int32 dp_trkop (int32 drv, int32 sec)
|
||
{
|
||
int32 ctrk = (sec / DP_NUMSC) % DP_NUMSF;
|
||
|
||
return ((drv * DP_TOTSC) + (dp_unit[drv].CYL * DP_NUMSF * DP_NUMSC) +
|
||
(ctrk * DP_NUMSC));
|
||
}
|
||
|
||
/* Convert DCF BCD field to binary */
|
||
|
||
int32 dp_cvt_bcd (uint32 ad, int32 len)
|
||
{
|
||
uint8 c;
|
||
int32 r;
|
||
|
||
for (r = 0; len > 0; len--) { /* loop thru char */
|
||
c = M[ad] & DIGIT; /* get digit */
|
||
if (BAD_DIGIT (c)) return -1; /* invalid? */
|
||
r = (r * 10) + c; /* cvt to bin */
|
||
PP (ad); } /* next digit */
|
||
return r;
|
||
}
|
||
|
||
/* Fill sector buffer with zero */
|
||
|
||
void dp_fill (UNIT *uptr, uint32 da, int32 cnt)
|
||
{
|
||
while (cnt-- > 0) { /* fill with zeroes*/
|
||
*(((uint8 *) uptr->filebuf) + da) = 0;
|
||
if (da >= uptr->hwmark) uptr->hwmark = da + 1;
|
||
da++; }
|
||
return;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat dp_reset (DEVICE *dptr)
|
||
{
|
||
int32 i;
|
||
|
||
for (i = 0; i < DP_NUMDR; i++) dp_unit[i].CYL = 0; /* reset cylinder */
|
||
ind[IN_DACH] = ind[IN_DWLR] = 0; /* clr indicators */
|
||
ind[IN_DERR] = ind[IN_DCYO] = 0;
|
||
return SCPE_OK;
|
||
}
|