WARNING: V2.10 has reorganized and renamed some of the definition files for the PDP-10, PDP-11, and VAX. Be sure to delete all previous source files before you unpack the Zip archive, or unpack it into a new directory structure. WARNING: V2.10 has a new, more comprehensive save file format. Restoring save files from previous releases will cause 'invalid register' errors and loss of CPU option flags, device enable/ disable flags, unit online/offline flags, and unit writelock flags. WARNING: If you are using Visual Studio .NET through the IDE, be sure to turn off the /Wp64 flag in the project settings, or dozens of spurious errors will be generated. WARNING: Compiling Ethernet support under Windows requires extra steps; see the Ethernet readme file. Ethernet support is currently available only for Windows, Linux, NetBSD, and OpenBSD. 1. New Features 1.1 SCP and Libraries - The VT emulation package has been replaced by the capability to remote the console to a Telnet session. Telnet clients typically have more complete and robust VT100 emulation. - Simulated devices may now have statically allocated buffers, in addition to dynamically allocated buffers or disk-based data stores. - The DO command now takes substitutable arguments (max 9). In command files, %n represents substitutable argument n. - The initial command line is now interpreted as the command name and substitutable arguments for a DO command. This is backward compatible to prior versions. - The initial command line parses switches. -Q is interpreted as quiet mode; informational messages are suppressed. - The HELP command now takes an optional argument. HELP <cmd> types help on the specified command. - Hooks have been added for implementing GUI-based consoles, as well as simulator-specific command extensions. A few internal data structures and definitions have changed. - Two new routines (tmxr_open_master, tmxr_close_master) have been added to sim_tmxr.c. The calling sequence for sim_accept_conn has been changed in sim_sock.c. - The calling sequence for the VM boot routine has been modified to add an additional parameter. - SAVE now saves, and GET now restores, controller and unit flags. - Library sim_ether.c has been added for Ethernet support. 1.2 VAX - Non-volatile RAM (NVR) can behave either like a memory or like a disk-based peripheral. If unattached, it behaves like memory and is saved and restored by SAVE and RESTORE, respectively. If attached, its contents are loaded from disk by ATTACH and written back to disk at DETACH and EXIT. - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape) has been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from vax_stddev.c and now references a common implementation file, dec_pt.h. - Examine and deposit switches now work on all devices, not just the CPU. - Device address conflicts are not detected until simulation starts. 1.3 PDP-11 - SHOW <device> VECTOR displays the device's interrupt vector. Most devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk), RX211 (double density floppy), and KW11P programmable clock have been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from pdp11_stddev.c and now references a common implementation file, dec_pt.h. - Device bootstraps now use the actual CSR specified by the SET ADDRESS command, rather than just the default CSR. Note that PDP-11 operating systems may NOT support booting with non-standard addresses. - Specifying more than 256KB of memory, or changing the bus configuration, causes all peripherals that are not compatible with the current bus configuration to be disabled. - Device address conflicts are not detected until simulation starts. 1.4 PDP-10 - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The RX211 (double density floppy) has been added; it is off by default. - The paper tape now references a common implementation file, dec_pt.h. - Device address conflicts are not detected until simulation starts. 1.5 PDP-1 - DECtape (then known as MicroTape) support has been added. - The line printer and DECtape can be disabled and enabled. 1.6 PDP-8 - The RX28 (double density floppy) has been added as an option to the existing RX8E controller. - SHOW <device> DEVNO displays the device's device number. Most devices allow the device number to be changed with SET <device> DEVNO=nnn. - Device number conflicts are not detected until simulation starts. 1.7 IBM 1620 - The IBM 1620 simulator has been released. 1.8 AltairZ80 - A hard drive has been added for increased storage. - Several bugs have been fixed. 1.9 HP 2100 - The 12845A has been added and made the default line printer (LPT). The 12653A has been renamed LPS and is off by default. It also supports the diagnostic functions needed to run the DCPC and DMS diagnostics. - The 12557A/13210A disk defaults to the 13210A (7900/7901). - The 12559A magtape is off by default. - New CPU options (EAU/NOEAU) enable/disable the extended arithmetic instructions for the 2116. These instructions are standard on the 2100 and 21MX. - New CPU options (MPR/NOMPR) enable/disable memory protect for the 2100 and 21MX. - New CPU options (DMS/NODMS) enable/disable the dynamic mapping instructions for the 21MX. - The 12539 timebase generator autocalibrates. 1.10 Simulated Magtapes - Simulated magtapes recognize end of file and the marker 0xFFFFFFFF as end of medium. Only the TMSCP tape simulator can generate an end of medium marker. - The error handling in simulated magtapes was overhauled to be consistent through all simulators. 1.11 Simulated DECtapes - Added support for RT11 image file format (256 x 16b) to DECtapes. 2. Release Notes 2.1 Bugs Fixed - TS11/TSV05 was not simulating the XS0_MOT bit, causing failures under VMS. In addition, two of the CTL options were coded interchanged. - IBM 1401 tape was not setting a word mark under group mark for load mode reads. This caused the diagnostics to crash. - SCP bugs in ssh_break and set_logon were fixed (found by Dave Hittner). - Numerous bugs in the HP 2100 extended arithmetic, floating point, 21MX, DMS, and IOP instructions were fixed. Bugs were also fixed in the memory protect and DMS functions. The moving head disks (DP, DQ) were revised to simulate the hardware more accurately. Missing functions in DQ (address skip, read address) were added. 2.2 HP 2100 Debugging - The HP 2100 CPU nows runs all of the CPU diagnostics. - The peripherals run most of the peripheral diagnostics. There is still a problem in overlapped seek operation on the disks. See the file hp2100_diag.txt for details. 3. In Progress These simulators are not finished and are available in a separate Zip archive distribution. - Interdata 16b/32b: coded, partially tested. See the file id_diag.txt for details. - SDS 940: coded, partially tested.
495 lines
13 KiB
C
495 lines
13 KiB
C
/* ibm1130_sys.c: IBM 1130 simulator interface
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Based on PDP-11 simulator written by Robert M Supnik
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Revision History
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0.26 2002Apr24 - Added !BREAK in card deck file to stop simulator
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0.25 2002Apr18 - Fixed some card reader problems. It starts the reader
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properly if you attach a deck while it's waiting to a read.
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0.24 2002Mar27 - Fixed BOSC bug; BOSC works in short instructions too
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0.23 2002Feb26 - Added @decklist feature for ATTACH CR.
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0.22 2002Feb26 - Replaced "strupr" with "upcase" for compatibility.
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0.21 2002Feb25 - Some compiler compatibiity changes, couple of compiler-detected
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bugs
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0.01 2001Jul31 - Derived from pdp11_sys.c, which carries this disclaimer:
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* (C) Copyright 2002, Brian Knittel.
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* You may freely use this program, but: it offered strictly on an AS-IS, AT YOUR OWN
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* RISK basis, there is no warranty of fitness for any purpose, and the rest of the
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* usual yada-yada. Please keep this notice and the copyright in any distributions
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* or modifications.
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*
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* This is not a supported product, but I welcome bug reports and fixes.
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* Mail to sim@ibm1130.org
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*/
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#include "ibm1130_defs.h"
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#include <ctype.h>
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#include <stdarg.h>
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extern DEVICE cpu_dev, console_dev, dsk_dev, cr_dev, cp_dev;
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extern DEVICE tti_dev, tto_dev, prt_dev, log_dev;
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extern DEVICE gdu_dev, console_dev;
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extern UNIT cpu_unit;
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extern REG cpu_reg[];
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extern int32 saved_PC;
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/* SCP data structures and interface routines
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sim_name simulator name string
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sim_PC pointer to saved PC register descriptor
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sim_emax number of words for examine
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sim_devices array of pointers to simulated devices
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sim_stop_messages array of pointers to stop messages
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sim_load binary loader
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*/
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char sim_name[] = "IBM 1130";
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char sim_version[] = "V0.30";
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REG *sim_PC = &cpu_reg[0];
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int32 sim_emax = 4;
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DEVICE *sim_devices[] = {
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&cpu_dev, /* the cpu */
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&dsk_dev, /* disk drive(s) */
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&cr_dev, /* card reader/punch */
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&cp_dev,
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&tti_dev, /* console keyboard, selectric printer */
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&tto_dev,
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&prt_dev, /* 1132 printer */
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&console_dev, /* console display (windows GUI) */
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&gdu_dev, /* 2250 display */
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NULL
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};
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const char *sim_stop_messages[] = {
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"Unknown error",
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"Wait",
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"Invalid command",
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"Simulator breakpoint",
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"Use of incomplete simulator function",
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"Power off",
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"!BREAK in card deck file",
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"Phase load break",
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"Program has run amok",
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"Run time limit exceeded"
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};
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/* Loader. IPL is normally performed by card reader (boot command). This function
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* loads hex data from a file for testing purposes. The format is:
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*
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* blank lines or lines starting with ; / or # are ignored as comments
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*
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* @XXXX set load addresss to hex value XXXX
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* XXXX store hex word value XXXX at current load address and increment address
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* ...
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* =XXXX set IAR to hex value XXXX
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* ZXXXX zero XXXX words and increment load address
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* SXXXX set console entry switches to XXXX. This lets a program specify the
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* default value for the toggle switches.
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*
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* Multiple @ and data sections may be entered. If more than one = or S value is specified
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* the last one wins.
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*
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* Note: the load address @XXXX and data values XXXX can be followed by the letter
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* R to indicate that the values are relocatable addresses. This is ignored in this loader,
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* but the asm1130 cross assembler may put them there.
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*/
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t_stat my_load (FILE *fileref, char *cptr, char *fnam)
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{
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char line[150], *c;
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int iaddr = -1, runaddr = -1, val, nwords;
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while (fgets(line, sizeof(line), fileref) != NULL) {
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for (c = line; *c && *c <= ' '; c++) // find first nonblank
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;
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if (*c == '\0' || *c == '#' || *c == '/' || *c == ';')
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continue; // empty line or comment
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if (*c == '@') { // set load address
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if (sscanf(c+1, "%x", &iaddr) != 1)
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return SCPE_FMT;
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}
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else if (*c == '=') {
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if (sscanf(c+1, "%x", &runaddr) != 1)
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return SCPE_FMT;
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}
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else if (*c == 's' || *c == 'S') {
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if (sscanf(c+1, "%x", &val) != 1)
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return SCPE_FMT;
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CES = val & 0xFFFF; // preload console entry switches
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}
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else if (*c == 'z' || *c == 'Z') {
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if (sscanf(c+1, "%x", &nwords) != 1)
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return SCPE_FMT;
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if (iaddr == -1)
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return SCPE_FMT;
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while (--nwords >= 0) {
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WriteW(iaddr, 0);
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iaddr++;
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}
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}
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else if (strchr("0123456789abcdefABCDEF", *c) != NULL) {
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if (sscanf(c, "%x", &val) != 1)
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return SCPE_FMT;
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if (iaddr == -1)
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return SCPE_FMT;
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WriteW(iaddr, val); // store data
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iaddr++;
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}
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else
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return SCPE_FMT; // unexpected data
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}
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if (runaddr != -1)
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IAR = runaddr;
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return SCPE_OK;
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}
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t_stat my_save (FILE *fileref, char *cptr, char *fnam)
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{
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int iaddr, nzeroes = 0, nwords = (int) (MEMSIZE/2), val;
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fprintf(fileref, "=%04x\r\n", IAR);
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fprintf(fileref, "@0000\r\n");
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for (iaddr = 0; iaddr < nwords; iaddr++) {
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val = ReadW(iaddr);
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if (val == 0) // queue up zeroes
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nzeroes++;
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else {
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if (nzeroes >= 4) { // spit out a Z directive
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fprintf(fileref, "Z%04x\r\n", nzeroes);
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nzeroes = 0;
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}
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else { // write queued zeroes literally
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while (nzeroes > 0) {
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fprintf(fileref, " 0000\r\n");
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nzeroes--;
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}
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}
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fprintf(fileref, " %04x\r\n", val);
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}
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}
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if (nzeroes >= 4) { // emit any queued zeroes
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fprintf(fileref, "Z%04x\r\n", nzeroes);
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nzeroes = 0;
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}
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else {
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while (nzeroes > 0) {
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fprintf(fileref, " 0000\r\n");
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nzeroes--;
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}
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}
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return SCPE_OK;
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}
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t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
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{
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if (flag)
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return my_save(fileref, cptr, fnam);
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else
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return my_load(fileref, cptr, fnam);
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}
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/* Specifier decode
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Inputs:
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*of = output stream
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addr = current PC
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spec = specifier
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nval = next word
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flag = TRUE if decoding for CPU
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iflag = TRUE if decoding integer instruction
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Outputs:
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count = -number of extra words retired
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*/
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/* Symbolic decode
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Inputs:
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*of = output stream
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addr = current PC
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*val = values to decode
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*uptr = pointer to unit
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sw = switches
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Outputs:
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return = if >= 0, error code
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if < 0, number of extra words retired
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*/
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static char *opcode[] = {
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"?00 ", "XIO ", "SLA ", "SRA ",
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"LDS ", "STS ", "WAIT", "?07 ",
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"BSI ", "BSC ", "?0A ", "?0B ",
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"LDX ", "STX ", "MDX ", "?0F ",
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"A ", "AD ", "S ", "SD ",
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"M ", "D ", "?16 ", "?17 ",
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"LD ", "LDD ", "STO ", "STD ",
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"AND ", "OR ", "EOR ", "?1F ",
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};
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static char relative[] = { // true if short mode displacements are IAR relative
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FALSE, TRUE, FALSE, FALSE,
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FALSE, TRUE, FALSE, FALSE,
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TRUE, FALSE, FALSE, FALSE,
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TRUE, TRUE, TRUE, FALSE,
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TRUE, TRUE, TRUE, TRUE,
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TRUE, TRUE, FALSE, FALSE,
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TRUE, TRUE, TRUE, TRUE,
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TRUE, TRUE, TRUE, FALSE
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};
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static char *lsopcode[] = {"SLA ", "SLCA ", "SLT ", "SLC "};
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static char *rsopcode[] = {"SRA ", "?188 ", "SRT ", "RTE "};
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static char tagc[] = " 123";
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static int ascii_to_ebcdic_table[128] =
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{
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0x00,0x01,0x02,0x03,0x37,0x2d,0x2e,0x2f, 0x16,0x05,0x25,0x0b,0x0c,0x0d,0x0e,0x0f,
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0x10,0x11,0x12,0x13,0x3c,0x3d,0x32,0x26, 0x18,0x19,0x3f,0x27,0x1c,0x1d,0x1e,0x1f,
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0x40,0x5a,0x7f,0x7b,0x5b,0x6c,0x50,0x7d, 0x4d,0x5d,0x5c,0x4e,0x6b,0x60,0x4b,0x61,
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0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7, 0xf8,0xf9,0x7a,0x5e,0x4c,0x7e,0x6e,0x6f,
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0x7c,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7, 0xc8,0xc9,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,
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0xd7,0xd8,0xd9,0xe2,0xe3,0xe4,0xe5,0xe6, 0xe7,0xe8,0xe9,0xba,0xe0,0xbb,0xb0,0x6d,
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0x79,0x81,0x82,0x83,0x84,0x85,0x86,0x87, 0x88,0x89,0x91,0x92,0x93,0x94,0x95,0x96,
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0x97,0x98,0x99,0xa2,0xa3,0xa4,0xa5,0xa6, 0xa7,0xa8,0xa9,0xc0,0x4f,0xd0,0xa1,0x07,
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};
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static int ebcdic_to_ascii (int ch)
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{
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int j;
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for (j = 32; j < 128; j++)
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if (ascii_to_ebcdic_table[j] == ch)
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return j;
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return '?';
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}
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t_stat fprint_sym (FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw)
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{
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int32 cflag, ch, OP, F, TAG, INDIR, DSPLC, IR, eaddr;
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char *mnem, tst[12];
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cflag = (uptr == NULL) || (uptr == &cpu_unit);
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// if (sw & SWMASK ('A')) { /* ASCII? not useful */
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// fprintf (of, (c1 < 040)? "<%03o>": "%c", c1);
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// return SCPE_OK;
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// }
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if (sw & SWMASK ('C')) /* character? not useful -- make it EBCDIC */
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sw |= SWMASK('E');
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if (sw & SWMASK ('E')) { /* EBCDIC! */
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ch = ebcdic_to_ascii((val[0] >> 8) & 0xFF); /* take high byte first */
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fprintf (of, (ch < ' ')? "<%03o>": "%c", ch);
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ch = ebcdic_to_ascii(val[0] & 0xFF);
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fprintf (of, (ch < ' ')? "<%03o>": "%c", ch);
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return SCPE_OK;
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}
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if (sw & SWMASK ('H')) { /* HOLLERITH! now THIS is useful! */
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ch = hollerith_to_ascii((int16) val[0]);
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fprintf (of, (ch < ' ')? "<%03o>": "%c", ch);
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return SCPE_OK;
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}
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if (! (sw & SWMASK ('M')))
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return SCPE_ARG;
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IR = val[0];
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OP = (IR >> 11) & 0x1F; /* opcode */
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F = IR & 0x0400; /* format bit: 1 = long instr */
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TAG = IR & 0x0300; /* tag bits: index reg select */
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if (TAG)
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TAG >>= 8;
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if (F) { /* long instruction, ASSUME it's valid (have to decrement IAR if not) */
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INDIR = IR & 0x0080; /* indirect bit */
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DSPLC = IR & 0x007F; /* displacement or modifier */
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if (DSPLC & 0x0040)
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DSPLC |= ~ 0x7F; /* sign extend */
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eaddr = val[1]; /* get reference address */
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}
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else { /* short instruction, use displacement */
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INDIR = 0; /* never indirect */
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DSPLC = IR & 0x00FF; /* get displacement */
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if (DSPLC & 0x0080)
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DSPLC |= ~ 0xFF;
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eaddr = DSPLC;
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if (relative[OP] && ! TAG)
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eaddr += addr+1; /* turn displacement into address */
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}
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mnem = opcode[OP]; /* get mnemonic */
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if (OP == 0x02) { /* left shifts are special */
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mnem = lsopcode[(DSPLC >> 6) & 0x0003];
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DSPLC &= 0x003F;
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eaddr = DSPLC;
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}
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else if (OP == 0x03) { /* right shifts too */
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mnem = rsopcode[(DSPLC >> 6) & 0x0003];
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DSPLC &= 0x003F;
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eaddr = DSPLC;
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}
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else if ((OP == 0x08 && F)|| OP == 0x09) { // BSI L and BSC any
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if (OP == 0x09 && (IR & 0x40))
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mnem = "BOSC";
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tst[0] = '\0';
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if (DSPLC & 0x20) strcat(tst, "Z");
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if (DSPLC & 0x10) strcat(tst, "-");
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if (DSPLC & 0x08) strcat(tst, "+");
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if (DSPLC & 0x04) strcat(tst, "E");
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if (DSPLC & 0x02) strcat(tst, "C");
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if (DSPLC & 0x01) strcat(tst, "O");
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if (F) {
|
||
fprintf(of, "%04x %s %c%c %s,%04x ", IR & 0xFFFF, mnem, F ? (INDIR ? 'I' : 'L') : ' ', tagc[TAG], tst, eaddr & 0xFFFF);
|
||
return -1;
|
||
}
|
||
fprintf(of, "%04x %s %c%c %s ", IR & 0xFFFF, mnem, F ? (INDIR ? 'I' : 'L') : ' ', tagc[TAG], tst);
|
||
return SCPE_OK;
|
||
}
|
||
else if (OP == 0x0e && TAG == 0) { // MDX with no tag => MDM or jump
|
||
if (F) {
|
||
fprintf(of, "%04x %s %c%c %04x,%x (%d) ", IR & 0xFFFF, "MDM ", (INDIR ? 'I' : 'L'), tagc[TAG], eaddr & 0xFFFF, DSPLC & 0xFFFF, DSPLC);
|
||
return -1;
|
||
}
|
||
mnem = "JMP ";
|
||
}
|
||
|
||
fprintf(of, "%04x %s %c%c %04x ", IR & 0xFFFF, mnem, F ? (INDIR ? 'I' : 'L') : ' ', tagc[TAG], eaddr & 0xFFFF);
|
||
return F ? -1 : SCPE_OK; /* inform how many words we read */
|
||
}
|
||
|
||
int32 get_reg (char *cptr, const char *strings[], char mchar)
|
||
{
|
||
return -1;
|
||
}
|
||
|
||
/* Number or memory address
|
||
|
||
Inputs:
|
||
*cptr = pointer to input string
|
||
*dptr = pointer to output displacement
|
||
*pflag = pointer to accumulating flags
|
||
Outputs:
|
||
cptr = pointer to next character in input string
|
||
NULL if parsing error
|
||
|
||
Flags: 0 (no result), A_NUM (number), A_REL (relative)
|
||
*/
|
||
|
||
char *get_addr (char *cptr, int32 *dptr, int32 *pflag)
|
||
{
|
||
return 0;
|
||
}
|
||
|
||
/* Specifier decode
|
||
|
||
Inputs:
|
||
*cptr = pointer to input string
|
||
addr = current PC
|
||
n1 = 0 if no extra word used
|
||
-1 if extra word used in prior decode
|
||
*sptr = pointer to output specifier
|
||
*dptr = pointer to output displacement
|
||
cflag = true if parsing for the CPU
|
||
iflag = true if integer specifier
|
||
Outputs:
|
||
status = = -1 extra word decoded
|
||
= 0 ok
|
||
= +1 error
|
||
*/
|
||
|
||
t_stat get_spec (char *cptr, t_addr addr, int32 n1, int32 *sptr, t_value *dptr,
|
||
int32 cflag, int32 iflag)
|
||
{
|
||
return -1;
|
||
}
|
||
|
||
/* Symbolic input
|
||
|
||
Inputs:
|
||
*cptr = pointer to input string
|
||
addr = current PC
|
||
*uptr = pointer to unit
|
||
*val = pointer to output values
|
||
sw = switches
|
||
Outputs:
|
||
status = > 0 error code
|
||
<= 0 -number of extra words
|
||
*/
|
||
|
||
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
|
||
{
|
||
return SCPE_ARG;
|
||
}
|
||
|
||
#ifndef WIN32
|
||
|
||
int strnicmp (char *a, char *b, int n)
|
||
{
|
||
int ca, cb;
|
||
|
||
for (;;) {
|
||
if (--n < 0) // still equal after n characters? quit now
|
||
return 0;
|
||
|
||
if ((ca = *a) == 0) // get character, stop on null terminator
|
||
return *b ? -1 : 0;
|
||
|
||
if (ca >= 'a' && ca <= 'z') // fold lowercase to uppercase
|
||
ca -= 32;
|
||
|
||
cb = *b;
|
||
if (cb >= 'a' && cb <= 'z')
|
||
cb -= 32;
|
||
|
||
if ((ca -= cb) != 0) // if different, return comparison
|
||
return ca;
|
||
|
||
a++, b++;
|
||
}
|
||
}
|
||
|
||
int strcmpi (char *a, char *b)
|
||
{
|
||
int ca, cb;
|
||
|
||
for (;;) {
|
||
if ((ca = *a) == 0) // get character, stop on null terminator
|
||
return *b ? -1 : 0;
|
||
|
||
if (ca >= 'a' && ca <= 'z') // fold lowercase to uppercase
|
||
ca -= 32;
|
||
|
||
cb = *b;
|
||
if (cb >= 'a' && cb <= 'z')
|
||
cb -= 32;
|
||
|
||
if ((ca -= cb) != 0) // if different, return comparison
|
||
return ca;
|
||
|
||
a++, b++;
|
||
}
|
||
}
|
||
|
||
#endif
|