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simh-testsetgenerator/Interdata/id32_sys.c
Bob Supnik 2bcd1e7c4c Notes For V2.10-2 
1. New Features in 2.10-2

The build procedures have changed.  There is only one UNIX makefile.
To compile without Ethernet support, simply type

	gmake {target|all}

To compile with Ethernet support, type

	gmake USE_NETWORK=1 {target|all}

The Mingw batch files require Mingw release 2 and invoke the Unix
makefile.  There are still separate batch files for compilation
with or without Ethernet support.

1.1 SCP and Libraries

- The EVAL command will evaluate a symbolic type-in and display
  it in numeric form.
- The ! command (with no arguments) will launch the host operating
  system command shell.  The ! command (with an argument) executes
  the argument as a host operating system command.  (Code from
  Mark Pizzolato)
- Telnet sessions now recognize BREAK.  How a BREAK is transmitted
  dependent on the particular Telnet client.  (Code from Mark
  Pizzolato)
- The sockets library includes code for active connections as
  well as listening connections.
- The RESTORE command will restore saved memory size, if the
  simulator supports dynamic memory resizing.

1.2 PDP-1

- The PDP-1 supports the Type 24 serial drum (based on recently
  discovered documents).

1.3 18b PDP's

- The PDP-4 supports the Type 24 serial drum (based on recently
  discovered documents).

1.4 PDP-11

- The PDP-11 implements a stub DEUNA/DELUA (XU).  The real XU
  module will be included in a later release.

1.5 PDP-10

- The PDP-10 implements a stub DEUNA/DELUA (XU).  The real XU
  module will be included in a later release.

1.6 HP 2100

- The IOP microinstruction set is supported for the 21MX as well
  as the 2100.
- The HP2100 supports the Access Interprocessor Link (IPL).

1.7 VAX

- If the VAX console is attached to a Telnet session, BREAK is
  interpreted as console halt.
- The SET/SHOW HISTORY commands enable and display a history of
  the most recently executed instructions.  (Code from Mark
  Pizzolato)

1.8 Terminals Multiplexors

- BREAK detection was added to the HP, DEC, and Interdata terminal
  multiplexors.

1.9 Interdata 16b and 32b

- First release.  UNIX is not yet working.

1.10 SDS 940

- First release.

2. Bugs Fixed in 2.10-2

- PDP-11 console must default to 7b for early UNIX compatibility.
- PDP-11/VAX TMSCP emulator was using the wrong packet length for
  read/write end packets.
- Telnet IAC+IAC processing was fixed, both for input and output
  (found by Mark Pizzolato).
- PDP-11/VAX Ethernet setting flag bits wrong for chained
  descriptors (found by Mark Pizzolato).

3. New Features in 2.10 vs prior releases

3.1 SCP and Libraries

- The VT emulation package has been replaced by the capability
  to remote the console to a Telnet session.  Telnet clients
  typically have more complete and robust VT100 emulation.
- Simulated devices may now have statically allocated buffers,
  in addition to dynamically allocated buffers or disk-based
  data stores.
- The DO command now takes substitutable arguments (max 9).
  In command files, %n represents substitutable argument n.
- The initial command line is now interpreted as the command
  name and substitutable arguments for a DO command.  This is
  backward compatible to prior versions.
- The initial command line parses switches.  -Q is interpreted
  as quiet mode; informational messages are suppressed.
- The HELP command now takes an optional argument.  HELP <cmd>
  types help on the specified command.
- Hooks have been added for implementing GUI-based consoles,
  as well as simulator-specific command extensions.  A few
  internal data structures and definitions have changed.
- Two new routines (tmxr_open_master, tmxr_close_master) have
  been added to sim_tmxr.c.  The calling sequence for
  sim_accept_conn has been changed in sim_sock.c.
- The calling sequence for the VM boot routine has been modified
  to add an additional parameter.
- SAVE now saves, and GET now restores, controller and unit flags.
- Library sim_ether.c has been added for Ethernet support.

3.2 VAX

- Non-volatile RAM (NVR) can behave either like a memory or like
  a disk-based peripheral.  If unattached, it behaves like memory
  and is saved and restored by SAVE and RESTORE, respectively.
  If attached, its contents are loaded from disk by ATTACH and
  written back to disk at DETACH and EXIT.
- SHOW <device> VECTOR displays the device's interrupt vector.
  A few devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The TK50 (TMSCP tape) has been added.
- The DEQNA/DELQA (Qbus Ethernet controllers) have been added.
- Autoconfiguration support has been added.
- The paper tape reader has been removed from vax_stddev.c and
  now references a common implementation file, dec_pt.h.
- Examine and deposit switches now work on all devices, not just
  the CPU.
- Device address conflicts are not detected until simulation starts.

3.3 PDP-11

- SHOW <device> VECTOR displays the device's interrupt vector.
  Most devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk),
  RX211 (double density floppy), and KW11P programmable clock
  have been added.
- The DEQNA/DELQA (Qbus Ethernet controllers) have been added.
- Autoconfiguration support has been added.
- The paper tape reader has been removed from pdp11_stddev.c and
  now references a common implementation file, dec_pt.h.
- Device bootstraps now use the actual CSR specified by the
  SET ADDRESS command, rather than just the default CSR.  Note
  that PDP-11 operating systems may NOT support booting with
  non-standard addresses.
- Specifying more than 256KB of memory, or changing the bus
  configuration, causes all peripherals that are not compatible
  with the current bus configuration to be disabled.
- Device address conflicts are not detected until simulation starts.

3.4 PDP-10

- SHOW <device> VECTOR displays the device's interrupt vector.
  A few devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The RX211 (double density floppy) has been added; it is off
  by default.
- The paper tape now references a common implementation file,
  dec_pt.h.
- Device address conflicts are not detected until simulation starts.

3.5 PDP-1

- DECtape (then known as MicroTape) support has been added.
- The line printer and DECtape can be disabled and enabled.

3.6 PDP-8

- The RX28 (double density floppy) has been added as an option to
  the existing RX8E controller.
- SHOW <device> DEVNO displays the device's device number.  Most
  devices allow the device number to be changed with SET <device>
  DEVNO=nnn.
- Device number conflicts are not detected until simulation starts.

3.7 IBM 1620

- The IBM 1620 simulator has been released.

3.8 AltairZ80

- A hard drive has been added for increased storage.
- Several bugs have been fixed.

3.9 HP 2100

- The 12845A has been added and made the default line printer (LPT).
  The 12653A has been renamed LPS and is off by default.  It also
  supports the diagnostic functions needed to run the DCPC and DMS
  diagnostics.
- The 12557A/13210A disk defaults to the 13210A (7900/7901).
- The 12559A magtape is off by default.
- New CPU options (EAU/NOEAU) enable/disable the extended arithmetic
  instructions for the 2116.  These instructions are standard on
  the 2100 and 21MX.
- New CPU options (MPR/NOMPR) enable/disable memory protect for the
  2100 and 21MX.
- New CPU options (DMS/NODMS) enable/disable the dynamic mapping
  instructions for the 21MX.
- The 12539 timebase generator autocalibrates.

3.10 Simulated Magtapes

- Simulated magtapes recognize end of file and the marker
  0xFFFFFFFF as end of medium.  Only the TMSCP tape simulator
  can generate an end of medium marker.
- The error handling in simulated magtapes was overhauled to be
  consistent through all simulators.

3.11 Simulated DECtapes

- Added support for RT11 image file format (256 x 16b) to DECtapes.

4. Bugs Fixed in 2.10 vs prior releases

- TS11/TSV05 was not simulating the XS0_MOT bit, causing failures
  under VMS.  In addition, two of the CTL options were coded
  interchanged.
- IBM 1401 tape was not setting a word mark under group mark for
  load mode reads.  This caused the diagnostics to crash.
- SCP bugs in ssh_break and set_logon were fixed (found by Dave
  Hittner).
- Numerous bugs in the HP 2100 extended arithmetic, floating point,
  21MX, DMS, and IOP instructions were fixed.  Bugs were also fixed
  in the memory protect and DMS functions.  The moving head disks
  (DP, DQ) were revised to simulate the hardware more accurately.
  Missing functions in DQ (address skip, read address) were added.
- PDP-10 tape wouldn't boot, and then wouldn't read (reported by
  Michael Thompson and Harris Newman, respectively)
- PDP-1 typewriter is half duplex, with only one shift state for
  both input and output (found by Derek Peschel)

5. General Notes

WARNING: V2.10 has reorganized and renamed some of the definition
files for the PDP-10, PDP-11, and VAX.  Be sure to delete all
previous source files before you unpack the Zip archive, or
unpack it into a new directory structure.

WARNING: V2.10 has a new, more comprehensive save file format.
Restoring save files from previous releases will cause 'invalid
register' errors and loss of CPU option flags, device enable/
disable flags, unit online/offline flags, and unit writelock
flags.

WARNING: If you are using Visual Studio .NET through the IDE,
be sure to turn off the /Wp64 flag in the project settings, or
dozens of spurious errors will be generated.

WARNING: Compiling Ethernet support under Windows requires
extra steps; see the Ethernet readme file.  Ethernet support is
currently available only for Windows, Linux, NetBSD, and OpenBSD.
2011-04-15 08:33:56 -07:00

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/* id32_sys.c: Interdata 32b simulator interface
Copyright (c) 2000-2003, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of Robert M Supnik shall not
be used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
23-Dec-01 RMS Cloned from ID4 sources
*/
#include "id_defs.h"
#include <ctype.h>
#define MSK_SBF 0x0100
#define SEXT15(x) (((x) & 0x4000)? ((x) | 0xFFFF8000): ((x) & 0x7FFF))
extern DEVICE cpu_dev;
extern DEVICE sch_dev;
extern DEVICE pt_dev;
extern DEVICE tt_dev, ttp_dev;
extern DEVICE pas_dev, pasl_dev;
extern DEVICE lpt_dev;
extern DEVICE pic_dev, lfc_dev;
extern DEVICE dp_dev, idc_dev;
extern DEVICE fd_dev, mt_dev;
extern UNIT cpu_unit;
extern REG cpu_reg[];
extern uint32 *M;
t_stat fprint_sym_m (FILE *of, t_addr addr, t_value *val);
t_stat parse_sym_m (char *cptr, t_addr addr, t_value *val);
extern t_stat lp_load (FILE *fileref, char *cptr, char *fnam);
extern pt_dump (FILE *of, char *cptr, char *fnam);
/* SCP data structures and interface routines
sim_name simulator name string
sim_PC pointer to saved PC register descriptor
sim_emax number of words for examine
sim_devices array of pointers to simulated devices
sim_stop_messages array of pointers to stop messages
sim_load binary loader
*/
char sim_name[] = "Interdata 32b";
REG *sim_PC = &cpu_reg[0];
int32 sim_emax = 6;
DEVICE *sim_devices[] = {
&cpu_dev,
&sch_dev,
&pt_dev,
&tt_dev,
&ttp_dev,
&pas_dev,
&pasl_dev,
&pic_dev,
&lfc_dev,
&lpt_dev,
&dp_dev,
&idc_dev,
&fd_dev,
&mt_dev,
NULL };
const char *sim_stop_messages[] = {
"Unknown error",
"Reserved instruction",
"HALT instruction",
"Breakpoint",
"Wait state",
"Runaway VFU" };
/* Binary loader -- load carriage control tape
Binary dump -- paper tape dump */
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
if (flag) return pt_dump (fileref, cptr, fnam);
return lp_load (fileref, cptr, fnam);
}
/* Symbol tables */
#define I_V_FL 16 /* class bits */
#define I_M_FL 0xF /* class mask */
#define I_V_MR 0x0 /* mask-register */
#define I_V_RR 0x1 /* register-register */
#define I_V_R 0x2 /* register */
#define I_V_MX 0x3 /* mask-memory */
#define I_V_RX 0x4 /* register-memory */
#define I_V_X 0x5 /* memory */
#define I_V_FF 0x6 /* float reg-reg */
#define I_V_FX 0x7 /* float reg-mem */
#define I_V_SI 0x8 /* short immed */
#define I_V_SB 0x9 /* short branch */
#define I_V_SX 0xA /* short ext branch */
#define I_V_RI 0xB /* halfword imm */
#define I_V_RF 0xC /* fullword imm */
#define I_MR (I_V_MR << I_V_FL)
#define I_RR (I_V_RR << I_V_FL)
#define I_R (I_V_R << I_V_FL)
#define I_MX (I_V_MX << I_V_FL)
#define I_RX (I_V_RX << I_V_FL)
#define I_X (I_V_X << I_V_FL)
#define I_FF (I_V_FF << I_V_FL)
#define I_FX (I_V_FX << I_V_FL)
#define I_SI (I_V_SI << I_V_FL)
#define I_SB (I_V_SB << I_V_FL)
#define I_SX (I_V_SX << I_V_FL)
#define I_RI (I_V_RI << I_V_FL)
#define I_RF (I_V_RF << I_V_FL)
#define R_X 0 /* no R1 */
#define R_M 1 /* R1 mask */
#define R_R 2 /* R1 int reg */
#define R_F 3 /* R1 flt reg */
static const int32 masks[] = {
0xFF00, 0xFF00, 0xFFF0, 0xFF00,
0xFF00, 0xFFF0, 0xFF00, 0xFF00,
0xFF00, 0xFE00, 0xFEF0, 0xFF00,
0xFF00 };
static const uint32 r1_type[] = {
R_M, R_R, R_X, R_M,
R_R, R_X, R_F, R_F,
R_R, R_M, R_X, R_R,
R_R };
static const uint32 r2_type[] = {
R_X, R_R, R_R, R_X,
R_X, R_X, R_F, R_X,
R_M, R_X, R_X, R_X,
R_X };
static const char *opcode[] = {
"BER", "BNER","BZR", "BNZR",
"BPR", "BNPR","BLR", "BNLR",
"BMR", "BNMR","BOR", "BNOR",
"BCR", "BNCR","BR",
"BES", "BNES","BZS", "BNZS",
"BPS", "BNPS","BLS", "BNLS",
"BMS", "BNMS","BOS", "BNOS",
"BCS", "BNCS","BS",
"BE", "BNE", "BZ", "BNZ",
"BP", "BNP", "BL", "BNL",
"BM", "BNM", "BO", "BNO",
"BC", "BNC", "B",
"BALR","BTCR","BFCR",
"NR", "CLR", "OR", "XR",
"LR", "CHR", "AR", "SR",
"MHR", "DHR",
"SRLS","SLLS","CHVR",
"LPSWR",
"MR", "DR",
"BTBS","BTFS","BFBS","BFFS",
"LIS", "LCS", "AIS", "SIS",
"LER", "CER", "AER", "SER",
"MER", "DER", "FXR", "FLR",
"MPBSR", "PBR",
"EXHR",
"LDR", "CDR", "ADR", "SDR",
"MDR", "DDR", "FXDR","FLDR",
"STH", "BAL", "BTC", "BFC",
"NH", "CLH", "OH", "XH",
"LH", "CH", "AH", "SH",
"MH", "DH",
"ST", "AM",
"N", "CL", "O", "X",
"L", "C", "A", "S",
"M", "D", "CRC12","CRC16",
"STE", "AHM", "PB", "LRA",
"ATL", "ABL", "RTL", "RBL",
"LE", "CE", "AE", "SE",
"ME", "DE",
"STD", "STME","LME", "LHL",
"TBT", "SBT", "RBT", "CBT",
"LD", "CD", "AD", "SD",
"MD", "DD", "STMD","LMD",
"SRHLS","SLHLS","STBR","LBR",
"EXBR","EPSR","WBR", "RBR",
"WHR", "RHR", "WDR", "RDR",
"SSR", "OCR",
"BXH", "BXLE","LPSW","THI",
"NHI", "CLHI","OHI", "XHI",
"LHI", "CHI", "AHI", "SHI",
"SRHL","SLHL","SRHA","SLHA",
"STM", "LM", "STB", "LB",
"CLB", "AL", "WB", "RB",
"WH", "RH", "WD", "RD",
"SS", "OC",
"TS", "SVC", "SINT","SCP",
"LA", "TLATE",
"RRL", "RLL",
"SRL", "SLL", "SRA", "SLA",
"TI",
"NI", "CLI", "OI", "XI",
"LI", "CI", "AI", "SI",
NULL };
static const uint32 opc_val[] = {
0x0330+I_R, 0x0230+I_R, 0x0330+I_R, 0x0230+I_R,
0x0220+I_R, 0x0320+I_R, 0x0280+I_R, 0x0380+I_R,
0x0210+I_R, 0x0310+I_R, 0x0240+I_R, 0x0340+I_R,
0x0280+I_R, 0x0380+I_R, 0x0300+I_R,
0x2230+I_SX, 0x2030+I_SX, 0x2230+I_SX, 0x2030+I_SX,
0x2020+I_SX, 0x2220+I_SX, 0x2080+I_SX, 0x2280+I_SX,
0x2010+I_SX, 0x2210+I_SX, 0x2040+I_SX, 0x2240+I_SX,
0x2080+I_SX, 0x2280+I_SX, 0x2200+I_SX,
0x4330+I_X, 0x4230+I_X, 0x4330+I_X, 0x4230+I_X,
0x4220+I_X, 0x4320+I_X, 0x4280+I_X, 0x4380+I_X,
0x4210+I_X, 0x4310+I_X, 0x4240+I_X, 0x4340+I_X,
0x4280+I_X, 0x4380+I_X, 0x4300+I_X,
0x0100+I_RR, 0x0200+I_MR, 0x0300+I_MR,
0x0400+I_RR, 0x0500+I_RR, 0x0600+I_RR, 0x0700+I_RR,
0x0800+I_RR, 0x0900+I_RR, 0x0A00+I_RR, 0x0B00+I_RR,
0x0C00+I_RR, 0x0D00+I_RR,
0x1000+I_SI, 0x1100+I_SI, 0x1200+I_RR,
0x1800+I_RR,
0x1C00+I_RR, 0x1D00+I_RR,
0x2000+I_SB, 0x2100+I_SB, 0x2200+I_SB, 0x2300+I_SB,
0x2400+I_SI, 0x2500+I_SI, 0x2600+I_SI, 0x2700+I_SI,
0x2800+I_FF, 0x2900+I_FF, 0x2A00+I_FF, 0x2B00+I_FF,
0x2C00+I_FF, 0x2D00+I_FF, 0x2E00+I_RR, 0x2F00+I_RR,
0x3000+I_RR, 0x3200+I_RR,
0x3400+I_RR,
0x3800+I_FF, 0x3900+I_FF, 0x3A00+I_FF, 0x3B00+I_FF,
0x3C00+I_FF, 0x3D00+I_FF, 0x3E00+I_RR, 0x3F00+I_RR,
0x4000+I_RX, 0x4100+I_RX, 0x4200+I_MX, 0x4300+I_MX,
0x4400+I_RX, 0x4500+I_RX, 0x4600+I_RX, 0x4700+I_RX,
0x4800+I_RX, 0x4900+I_RX, 0x4A00+I_RX, 0x4B00+I_RX,
0x4C00+I_RX, 0x4D00+I_RX,
0x5000+I_RX, 0x5100+I_RX,
0x5400+I_RX, 0x5500+I_RX, 0x5600+I_RX, 0x5700+I_RX,
0x5800+I_RX, 0x5900+I_RX, 0x5A00+I_RX, 0x5B00+I_RX,
0x5C00+I_RX, 0x5D00+I_RX, 0x5E00+I_RX, 0x5F00+I_RX,
0x6000+I_RX, 0x6100+I_RX, 0x6200+I_RX, 0x6300+I_RX,
0x6400+I_RX, 0x6500+I_RX, 0x6600+I_RX, 0x6700+I_RX,
0x6800+I_FX, 0x6900+I_FX, 0x6A00+I_FX, 0x6B00+I_FX,
0x6C00+I_FX, 0x6D00+I_FX,
0x7000+I_FX, 0x7100+I_FX, 0x7200+I_FX, 0x7300+I_RX,
0x7400+I_RX, 0x7500+I_RX, 0x7600+I_RX, 0x7700+I_RX,
0x7800+I_FX, 0x7900+I_FX, 0x7A00+I_FX, 0x7B00+I_FX,
0x7C00+I_FX, 0x7D00+I_FX, 0x7E00+I_FX, 0x7F00+I_FX,
0x9000+I_SI, 0x9100+I_SI, 0x9200+I_RR, 0x9300+I_RR,
0x9400+I_RR, 0x9500+I_RR, 0x9600+I_RR, 0x9700+I_RR,
0x9800+I_RR, 0x9900+I_RR, 0x9A00+I_RR, 0x9B00+I_RR,
0x9D00+I_RR, 0x9E00+I_RR,
0xC000+I_RX, 0xC100+I_RX, 0xC200+I_RX, 0xC300+I_RI,
0xC400+I_RI, 0xC500+I_RI, 0xC600+I_RI, 0xC700+I_RI,
0xC800+I_RI, 0xC900+I_RI, 0xCA00+I_RI, 0xCB00+I_RI,
0xCC00+I_RI, 0xCD00+I_RI, 0xCE00+I_RI, 0xCF00+I_RI,
0xD000+I_RX, 0xD100+I_RX, 0xD200+I_RX, 0xD300+I_RX,
0xD400+I_RX, 0xD500+I_X, 0xD600+I_RX, 0xD700+I_RX,
0xD800+I_RX, 0xD900+I_RX, 0xDA00+I_RX, 0xDB00+I_RX,
0xDD00+I_RX, 0xDE00+I_RX,
0xE000+I_RX, 0xE100+I_RX, 0xE200+I_RI, 0xE300+I_RX,
0xE600+I_RX, 0xE700+I_RX,
0xEA00+I_RI, 0xEB00+I_RI,
0xEC00+I_RI, 0xED00+I_RI, 0xEE00+I_RI, 0xEF00+I_RI,
0xF300+I_RF,
0xF400+I_RF, 0xF500+I_RF, 0xF600+I_RF, 0xF700+I_RF,
0xF800+I_RF, 0xF900+I_RF, 0xFA00+I_RF, 0xFB00+I_RF,
0xFFFF };
/* Print an RX specifier */
t_stat fprint_addr (FILE *of, t_addr addr, uint32 rx, uint32 ea1, uint32 ea2)
{
uint32 rx2;
if ((ea1 & 0xC000) == 0) { /* RX1 */
fprintf (of, "%-X", ea1);
if (rx) fprintf (of, "(R%d)", rx);
return -3; }
if (ea1 & 0x8000) { /* RX2 */
ea1 = addr + 4 + SEXT15 (ea1);
fprintf (of, "%-X", ea1 & VAMASK32);
if (rx) fprintf (of, "(R%d)", rx);
return -3; }
rx2 = (ea1 >> 8) & 0xF;
fprintf (of, "%-X", ((ea1 << 16) | ea2) & VAMASK32);
if (rx && !rx2) fprintf (of, "(R%d)", rx);
if (rx2) fprintf (of, "(R%d,R%d)", rx, rx2);
return -5;
}
#define GETNUM(d,n) for (k = d = 0; k < n; k++) \
d = (d << 8) | (((uint32) val[vp++]) & 0xFF)
/* Symbolic decode
Inputs:
*of = output stream
addr = current PC
*val = values to decode
*uptr = pointer to unit
sw = switches
Outputs:
return = if >= 0, error code
if < 0, number of extra bytes retired
*/
t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
UNIT *uptr, int32 sw)
{
int32 c, k, num, rdx, vp, lnt;
t_stat r;
DEVICE *dptr;
if (uptr == NULL) uptr = &cpu_unit; /* anon = CPU */
dptr = find_dev_from_unit (uptr); /* find dev */
if (dptr == NULL) return SCPE_IERR;
if (dptr->dwidth != 8) return SCPE_ARG; /* byte dev only */
if (sw & SWMASK ('B')) lnt = 1; /* get length */
else if (sw & SWMASK ('W')) lnt = 2;
else if (sw & SWMASK ('F')) lnt = 4;
else lnt = (uptr == &cpu_unit)? 4: 1;
if (sw & SWMASK ('D')) rdx = 10; /* get radix */
else if (sw & SWMASK ('O')) rdx = 8;
else if (sw & SWMASK ('H')) rdx = 16;
else rdx = dptr->dradix;
vp = 0; /* init ptr */
if ((sw & SWMASK ('A')) || (sw & SWMASK ('C'))) { /* char format? */
if (sw & SWMASK ('C')) lnt = sim_emax; /* -c -> string */
if ((val[0] & 0x7F) == 0) return SCPE_ARG;
while (vp < lnt) { /* print string */
if ((c = (uint32) val[vp++] & 0x7F) == 0) break;
fprintf (of, (c < 0x20)? "<%02X>": "%c", c); }
return -(vp - 1); } /* return # chars */
if (sw & SWMASK ('M')) { /* inst format? */
r = fprint_sym_m (of, addr, val); /* decode inst */
if (r <= 0) return r; /* success? */
lnt = 2; } /* no, skip 16b */
GETNUM (num, lnt); /* get number */
fprint_val (of, num, rdx, lnt * 8, PV_RZRO);
return -(vp - 1);
}
/* Symbolic decode for -m
Inputs:
of = output stream
addr = current PC
*val = values to decode
Outputs:
return = if >= 0, error code
if < 0, number of extra bytes retired
*/
t_stat fprint_sym_m (FILE *of, t_addr addr, t_value *val)
{
uint32 i, j, k, inst, r1, r2, ea1, ea2, tgt, vp;
vp = 0;
GETNUM (inst,2); /* high 16b */
GETNUM (ea1, 2); /* next 16b */
GETNUM (ea2, 2); /* next 16b */
for (i = 0; opc_val[i] != 0xFFFF; i++) { /* loop thru ops */
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
if ((opc_val[i] & 0xFFFF) == (inst & masks[j])) { /* match? */
r1 = (inst >> 4) & 0xF;
r2 = inst & 0xF;
switch (j) { /* case on class */
case I_V_MR: /* mask-register */
fprintf (of, "%s %-X,R%d", opcode[i], r1, r2);
return -1;
case I_V_RR: /* register-register */
case I_V_FF: /* floating-floating */
fprintf (of, "%s R%d,R%d", opcode[i], r1, r2);
return -1;
case I_V_SI: /* short immediate */
fprintf (of, "%s R%d,%-X", opcode[i], r1, r2);
return -1;
case I_V_SB: /* short branch */
if (inst & MSK_SBF) tgt = addr + r2 + r2;
else tgt = addr - r2 - r2;
fprintf (of, "%s %-X,%-X", opcode[i], r1, tgt);
return -1;
case I_V_SX: /* ext short branch */
if (inst & MSK_SBF) tgt = addr + r2 + r2;
else tgt = addr - r2 - r2;
fprintf (of, "%s %-X", opcode[i], tgt);
return -1;
case I_V_R: /* register */
fprintf (of, "%s R%d", opcode[i], r2);
return -1;
case I_V_RI: /* reg-immed */
fprintf (of, "%s R%d,%-X", opcode[i], r1, ea1);
if (r2) fprintf (of, "(R%d)", r2);
return -3;
case I_V_RF: /* reg-full imm */
fprintf (of, "%s R%d,%-X", opcode[i], r1,
(ea1 << 16) | ea2);
if (r2) fprintf (of, "(R%d)", r2);
return -5;
case I_V_MX: /* mask-memory */
fprintf (of, "%s %-X,", opcode[i], r1);
return fprint_addr (of, addr, r2, ea1, ea2);
case I_V_RX: /* register-memory */
case I_V_FX: /* floating-memory */
fprintf (of, "%s R%d,", opcode[i], r1);
return fprint_addr (of, addr, r2, ea1, ea2);
case I_V_X: /* memory */
fprintf (of, "%s ", opcode[i]);
return fprint_addr (of, addr, r2, ea1, ea2); }
return SCPE_IERR; } /* end if */
} /* end for */
return SCPE_ARG; /* no match */
}
/* Register number
Inputs:
*cptr = pointer to input string
**optr = pointer to pointer to next char
rtype = mask, integer, or float
Outputs:
rnum = output register number, -1 if error
*/
int32 get_reg (char *cptr, char **optr, int32 rtype)
{
int32 reg;
if ((*cptr == 'R') || (*cptr == 'r')) { /* R? */
cptr++; /* skip */
if (rtype == R_M) return -1; } /* cant be mask */
if ((*cptr >= '0') && (*cptr <= '9')) {
reg = *cptr++ - '0';
if ((*cptr >= '0') && (*cptr <= '9'))
reg = (reg * 10) + (*cptr - '0');
else --cptr;
if (reg > 0xF) return -1; }
else if ((*cptr >= 'a') && (*cptr <= 'f')) reg = (*cptr - 'a') + 10;
else if ((*cptr >= 'A') && (*cptr <= 'F')) reg = (*cptr - 'A') + 10;
else return -1;
if ((rtype == R_F) && (reg & 1)) return -1;
*optr = cptr + 1;
return reg;
}
/* Immediate
Inputs:
*cptr = pointer to input string
*imm = pointer to output value
*inst = pointer to instruction
max = max value
Outputs:
sta = status
*/
t_stat get_imm (char *cptr, uint32 *imm, uint32 *inst, uint32 max)
{
char *tptr;
uint32 idx;
errno = 0;
*imm = strtoul (cptr, &tptr, 16); /* get immed */
if (errno || (*imm > max) || (cptr == tptr)) return SCPE_ARG;
if (*tptr == '(') { /* index? */
if ((idx = get_reg (tptr + 1, &tptr, R_R)) < 0)
return SCPE_ARG;
if (*tptr++ != ')') return SCPE_ARG;
*inst = *inst | idx; }
if (*tptr != 0) return SCPE_ARG;
return SCPE_OK;
}
#define PUTNUM(d,n) for (k = n; k > 0; k--) \
val[vp++] = (d >> ((k - 1) * 8)) & 0xFF
/* Symbolic input */
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
{
int32 k, rdx, lnt, num, vp;
t_stat r;
DEVICE *dptr;
static const uint32 maxv[5] = { 0, 0xFF, 0xFFFF, 0, 0xFFFFFFFF };
if (uptr == NULL) uptr = &cpu_unit; /* anon = CPU */
dptr = find_dev_from_unit (uptr); /* find dev */
if (dptr == NULL) return SCPE_IERR;
if (dptr->dwidth != 8) return SCPE_ARG; /* byte dev only */
if (sw & SWMASK ('B')) lnt = 1; /* get length */
else if (sw & SWMASK ('W')) lnt = 2;
else if (sw & SWMASK ('F')) lnt = 4;
else lnt = (uptr == &cpu_unit)? 4: 1;
if (sw & SWMASK ('D')) rdx = 10; /* get radix */
else if (sw & SWMASK ('O')) rdx = 8;
else if (sw & SWMASK ('H')) rdx = 16;
else rdx = dptr->dradix;
vp = 0;
if ((sw & SWMASK ('A')) || (sw & SWMASK ('C'))) { /* char format? */
if (sw & SWMASK ('C')) lnt = sim_emax; /* -c -> string */
if (*cptr == 0) return SCPE_ARG;
while ((vp < lnt) && *cptr) { /* get chars */
val[vp++] = *cptr++; }
return -(vp - 1); } /* return # chars */
if (uptr == &cpu_unit) { /* cpu only */
r = parse_sym_m (cptr, addr, val); /* try to parse inst */
if (r <= 0) return r; }
num = (int32) get_uint (cptr, rdx, maxv[lnt], &r); /* get number */
if (r != SCPE_OK) return r;
PUTNUM (num, lnt); /* store */
return -(lnt - 1);
}
/* Symbolic input for -m
Inputs:
*cptr = pointer to input string
addr = current PC
*val = pointer to output values
Outputs:
status = > 0 error code
<= 0 -number of extra words
*/
t_stat parse_sym_m (char *cptr, t_addr addr, t_value *val)
{
uint32 i, j, k, t, df, db, inst, ea, vp;
int32 st, r1, r2, rx2;
t_stat r;
char *tptr, gbuf[CBUFSIZE];
vp = 0;
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL) return SCPE_ARG;
inst = opc_val[i] & 0xFFFF; /* get value */
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
if (r1_type[j]) { /* any R1 field? */
cptr = get_glyph (cptr, gbuf, ','); /* get R1 field */
if ((r1 = get_reg (gbuf, &tptr, r1_type[j])) < 0)
return SCPE_ARG;
if (*tptr != 0) return SCPE_ARG;
inst = inst | (r1 << 4); } /* or in R1 */
cptr = get_glyph (cptr, gbuf, 0); /* get operand */
if (*cptr) return SCPE_ARG; /* should be end */
switch (j) { /* case on class */
case I_V_FF: case I_V_SI: /* flt-flt, sh imm */
case I_V_MR: case I_V_RR: /* mask/reg-register */
case I_V_R: /* register */
if ((r2 = get_reg (gbuf, &tptr, r2_type[j])) < 0)
return SCPE_ARG;
if (*tptr != 0) return SCPE_ARG;
inst = inst | r2; /* or in R2 */
break;
case I_V_FX: /* float-memory */
case I_V_MX: case I_V_RX: /* mask/reg-memory */
case I_V_X: /* memory */
errno = 0;
ea = strtoul (gbuf, &tptr, 16); /* get address */
if (errno || (gbuf == tptr)) return SCPE_ARG; /* error? */
rx2 = 0; /* assume no 2nd */
if (*tptr == '(') { /* index? */
if ((r2 = get_reg (tptr + 1, &tptr, R_R)) < 0)
return SCPE_ARG;
inst = inst | r2; /* or in R2 */
if (*tptr == ',') { /* 2nd index? */
if ((rx2 = get_reg (tptr + 1, &tptr, R_R)) < 0)
return SCPE_ARG; }
if (*tptr++ != ')') return SCPE_ARG; } /* all done? */
if (*tptr != 0) return SCPE_ARG;
PUTNUM (inst, 2); /* store inst */
if (rx2 == 0) { /* no 2nd? */
if (ea < 0x4000) { /* RX1? */
PUTNUM (ea, 2); /* store ea */
return -3; }
st = (ea - (addr + 4)); /* displ */
if ((st <= 0x3FFF) && (st >= -0x4000)) { /* RX2? */
t = (st & 0x7FFF) | 0x8000;
PUTNUM (t, 2); /* store displ */
return -3; } }
ea = (ea & VAMASK32) | 0x40000000 | (rx2 << 24);
PUTNUM (ea, 4); /* RX3 */
return -5;
case I_V_RI: /* 16b immediate */
r = get_imm (gbuf, &ea, &inst, DMASK16); /* process imm */
if (r != SCPE_OK) return r;
PUTNUM (inst, 2); /* store inst */
PUTNUM (ea, 2); /* store 16b imm */
return -3;
case I_V_RF:
r = get_imm (gbuf, &ea, &inst, DMASK32); /* process imm */
if (r != SCPE_OK) return r;
PUTNUM (inst, 2); /* store inst */
PUTNUM (ea, 4); /* store 32b imm */
return -5;
case I_V_SB: case I_V_SX: /* short branches */
t = get_uint (gbuf, 16, DMASK16, &r); /* get addr */
if ((r != SCPE_OK) || (t & 1)) return r; /* error if odd */
db = (addr - t) & 0x1F; /* back displ */
df = (t - addr) & 0x1F; /* fwd displ */
if ((t == ((addr - db) & VAMASK16)) && /* back work and */
((j == I_V_SX) || !(inst & MSK_SBF))) { /* ext or back br? */
inst = inst | (db >> 1); /* or in back displ */
break; }
if ((t == ((addr + df) & VAMASK16)) && /* fwd work and */
((j == I_V_SX) || (inst & MSK_SBF))) { /* ext or fwd br? */
inst = inst | (df >> 1) | MSK_SBF; /* or in fwd displ */
break; }
return SCPE_ARG; } /* end case */
PUTNUM (inst, 2);
return -1;
}
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