5531ccb175
These changes facilitate more robust parameter type checking and helps to identify unexpected coding errors. Most simulators can now also be compiled with a C++ compiler without warnings. Additionally, these changes have also been configured to facilitate easier backporting of simulator and device simulation modules to run under the simh v3.9+ SCP framework.
296 lines
10 KiB
C
296 lines
10 KiB
C
/*
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* Dos/PC Emulator
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* Copyright (C) 1991 Jim Hudgens
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*
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*
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* The file is part of GDE.
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*
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* GDE is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 1, or (at your option)
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* any later version.
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*
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* GDE is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GDE; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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/* 8086 support structs and definitions */
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/* definition of the registers */
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/* general EAX,EBX,ECX, EDX type registers.
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Note that for portability, and speed, the issue of byte
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swapping is not addressed in the registers. All registers
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are stored in the default format available on the
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host machine. The only critical issue is that the
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registers should line up EXACTLY in the same manner as
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they do in the 386. That is:
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EAX & 0xff === AL
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EAX & 0xffff == AX
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etc. The result is that alot of the calculations can then be
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done using the native instruction set fully.
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*/
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/* Endian Logic
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Priority 1: If LOWFIRST is defined, use it. LOWFIRST must be 1 if the
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lower part of a 16 bit quantity comes first in memory, otherwise
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LOWFIRST must be 0
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Priority 2: If __BIG_ENDIAN__ is defined, use it to define LOWFIRST accordingly
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Priority 3: OS 9 on Macintosh needs LOWFIRST 0
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Priority 4: Use LOWFIRST 1 as default
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*/
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#ifndef LOWFIRST
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#ifdef __BIG_ENDIAN__
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#if __BIG_ENDIAN__
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#define LOWFIRST 0
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#else
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#define LOWFIRST 1
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#endif
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#elif defined (__MWERKS__) && defined (macintosh)
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#define LOWFIRST 0
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#else
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#define LOWFIRST 1
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#endif
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#endif
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#if LOWFIRST
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typedef struct { uint16 x_reg; } I16_reg_t;
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typedef struct { uint8 l_reg, h_reg; } I8_reg_t;
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#else
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typedef struct { uint16 x_reg; } I16_reg_t;
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typedef struct { uint8 h_reg, l_reg; } I8_reg_t;
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#endif
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typedef union
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{
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I16_reg_t I16_reg;
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I8_reg_t I8_reg;
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} i386_general_register;
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struct i386_general_regs
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{
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i386_general_register A, B, C, D;
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};
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typedef struct i386_general_regs Gen_reg_t;
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struct i386_special_regs
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{
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i386_general_register SP, BP, SI, DI, IP;
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uint32 FLAGS;
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};
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/*
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* segment registers here represent the 16 bit quantities
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* CS, DS, ES, SS
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*
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* segment pointers --- used to speed up the expressions:
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* q = m->R_CSP + m->R_IP;
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* fetched = *q;
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* m->R_IP += 1;
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* compared to:
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* fetched = GetBYTEExtended(((uint32)m->R_CS << 4) + (m->R_IP++));
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* Save at least one shift, more if doing two byte moves.
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*/
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struct i386_segment_regs
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{
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uint16 CS, DS, SS, ES, FS, GS;
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};
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/* 8 bit registers */
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#define R_AH Gn_regs.A.I8_reg.h_reg
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#define R_AL Gn_regs.A.I8_reg.l_reg
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#define R_BH Gn_regs.B.I8_reg.h_reg
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#define R_BL Gn_regs.B.I8_reg.l_reg
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#define R_CH Gn_regs.C.I8_reg.h_reg
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#define R_CL Gn_regs.C.I8_reg.l_reg
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#define R_DH Gn_regs.D.I8_reg.h_reg
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#define R_DL Gn_regs.D.I8_reg.l_reg
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/* 16 bit registers */
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#define R_AX Gn_regs.A.I16_reg.x_reg
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#define R_BX Gn_regs.B.I16_reg.x_reg
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#define R_CX Gn_regs.C.I16_reg.x_reg
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#define R_DX Gn_regs.D.I16_reg.x_reg
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/* special registers */
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#define R_SP Sp_regs.SP.I16_reg.x_reg
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#define R_BP Sp_regs.BP.I16_reg.x_reg
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#define R_SI Sp_regs.SI.I16_reg.x_reg
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#define R_DI Sp_regs.DI.I16_reg.x_reg
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#define R_IP Sp_regs.IP.I16_reg.x_reg
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#define R_FLG Sp_regs.FLAGS
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/* segment registers */
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#define R_CS Sg_regs.CS
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#define R_DS Sg_regs.DS
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#define R_SS Sg_regs.SS
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#define R_ES Sg_regs.ES
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/* 8088 has top 4 bits of the flags set to 1 */
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/* Also, bit#1 is set. This is (not well) documented behavior. */
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/* see note in userman.tex about the subtleties of dealing with */
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/* code which attempts to detect the host processor. */
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/* This is def'd as F_ALWAYS_ON */
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#define F_ALWAYS_ON (0xf002) /* flag bits always on */
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/* following bits masked in to a 16bit quantity */
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#define F_CF 0x1 /* CARRY flag */
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#define F_PF 0x4 /* PARITY flag */
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#define F_AF 0x10 /* AUX flag */
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#define F_ZF 0x40 /* ZERO flag */
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#define F_SF 0x80 /* SIGN flag */
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#define F_TF 0x100 /* TRAP flag */
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#define F_IF 0x200 /* INTERRUPT ENABLE flag */
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#define F_DF 0x400 /* DIR flag */
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#define F_OF 0x800 /* OVERFLOW flag */
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/*
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* DEFINE A MASK FOR ONLY THOSE FLAG BITS WE WILL EVER PASS BACK
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* (via PUSHF)
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*/
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#define F_MSK (F_CF|F_PF|F_AF|F_ZF|F_SF|F_TF|F_IF|F_DF|F_OF)
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#define TOGGLE_FLAG(M,FLAG) (M)->R_FLG ^= FLAG
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#define SET_FLAG(M,FLAG) (M)->R_FLG |= FLAG
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#define CLEAR_FLAG(M, FLAG) (M)->R_FLG &= ~FLAG
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#define ACCESS_FLAG(M,FLAG) ((M)->R_FLG & (FLAG))
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#define CONDITIONAL_SET_FLAG(COND,M,FLAG) \
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if (COND) SET_FLAG(M,FLAG); else CLEAR_FLAG(M,FLAG)
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/* emulator machine state. */
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/* segment usage control */
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#define SYSMODE_SEG_DS_SS 0x01
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#define SYSMODE_SEGOVR_CS 0x02
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#define SYSMODE_SEGOVR_DS 0x04
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#define SYSMODE_SEGOVR_ES 0x08
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#define SYSMODE_SEGOVR_SS 0x10
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#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | SYSMODE_SEGOVR_CS | \
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SYSMODE_SEGOVR_DS | SYSMODE_SEGOVR_ES | SYSMODE_SEGOVR_SS)
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#define SYSMODE_PREFIX_REPE 0x20
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#define SYSMODE_PREFIX_REPNE 0x40
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#define INTR_SYNCH 0x1
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#define INTR_HALTED 0x4
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#define INTR_ILLEGAL_OPCODE 0x8
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/* INSTRUCTION DECODING STUFF */
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#define FETCH_DECODE_MODRM(m,mod,rh,rl) fetch_decode_modrm(m,&mod,&rh,&rl)
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#define DECODE_RM_BYTE_REGISTER(m,r) decode_rm_byte_register(m,r)
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#define DECODE_RM_WORD_REGISTER(m,r) decode_rm_word_register(m,r)
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#define DECODE_CLEAR_SEGOVR(m) m->sysmode &= ~(SYSMODE_SEGMASK)
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typedef struct pc_env PC_ENV;
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struct pc_env
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{
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/* The registers!! */
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struct i386_general_regs Gn_regs;
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struct i386_special_regs Sp_regs;
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struct i386_segment_regs Sg_regs;
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/* our flags structrure. This contains information on
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REPE prefix 2 bits repe,repne
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SEGMENT overrides 5 bits normal,DS,SS,CS,ES
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Delayed flag set 3 bits (zero, signed, parity)
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reserved 6 bits
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interrupt # 8 bits instruction raised interrupt
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BIOS video segregs 4 bits
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Interrupt Pending 1 bits
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Extern interrupt 1 bits
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Halted 1 bits
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*/
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long sysmode;
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uint8 intno;
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};
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/* GLOBAL */
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extern volatile int intr;
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void halt_sys (PC_ENV *sys);
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void fetch_decode_modrm (PC_ENV *m, uint16 *mod, uint16 *regh, uint16 *regl);
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uint8 *decode_rm_byte_register (PC_ENV *m, int reg);
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uint16 *decode_rm_word_register (PC_ENV *m, int reg);
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uint16 *decode_rm_seg_register (PC_ENV *m, int reg);
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uint8 fetch_byte_imm (PC_ENV *m);
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uint16 fetch_word_imm (PC_ENV *m);
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uint16 decode_rm00_address (PC_ENV *m, int rm);
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uint16 decode_rm01_address (PC_ENV *m, int rm);
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uint16 decode_rm10_address (PC_ENV *m, int rm);
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uint8 fetch_data_byte (PC_ENV *m, uint16 offset);
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uint8 fetch_data_byte_abs (PC_ENV *m, uint16 segment, uint16 offset);
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uint16 fetch_data_word (PC_ENV *m, uint16 offset);
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uint16 fetch_data_word_abs (PC_ENV *m, uint16 segment, uint16 offset);
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void store_data_byte (PC_ENV *m, uint16 offset, uint8 val);
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void store_data_byte_abs (PC_ENV *m, uint16 segment, uint16 offset, uint8 val);
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void store_data_word (PC_ENV *m, uint16 offset, uint16 val);
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void store_data_word_abs (PC_ENV *m, uint16 segment, uint16 offset, uint16 val);
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typedef void (*OP)(PC_ENV *m);
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extern OP i86_optab[256];
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/* PRIMITIVE OPERATIONS */
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uint8 aad_word (PC_ENV *m, uint16 d);
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uint16 aam_word (PC_ENV *m, uint8 d);
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uint8 adc_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 adc_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 add_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 add_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 and_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 and_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 cmp_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 cmp_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 dec_byte (PC_ENV *m, uint8 d);
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uint16 dec_word (PC_ENV *m, uint16 d);
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uint8 inc_byte (PC_ENV *m, uint8 d);
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uint16 inc_word (PC_ENV *m, uint16 d);
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uint8 or_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 or_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 neg_byte (PC_ENV *m, uint8 s);
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uint16 neg_word (PC_ENV *m, uint16 s);
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uint8 not_byte (PC_ENV *m, uint8 s);
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uint16 not_word (PC_ENV *m, uint16 s);
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uint16 mem_access_word (PC_ENV *m, int addr);
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void push_word (PC_ENV *m, uint16 w);
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uint16 pop_word (PC_ENV *m);
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uint8 rcl_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 rcl_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 rcr_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 rcr_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 rol_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 rol_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 ror_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 ror_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 shl_byte (PC_ENV *m, uint8 d, uint8 s) ;
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uint16 shl_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 shr_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 shr_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 sar_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 sar_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 sbb_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 sbb_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 sub_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 sub_word (PC_ENV *m, uint16 d, uint16 s);
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void test_byte (PC_ENV *m, uint8 d, uint8 s);
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void test_word (PC_ENV *m, uint16 d, uint16 s);
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uint8 xor_byte (PC_ENV *m, uint8 d, uint8 s);
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uint16 xor_word (PC_ENV *m, uint16 d, uint16 s);
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void imul_byte (PC_ENV *m, uint8 s);
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void imul_word (PC_ENV *m, uint16 s);
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void mul_byte (PC_ENV *m, uint8 s);
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void mul_word (PC_ENV *m, uint16 s);
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void idiv_byte (PC_ENV *m, uint8 s);
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void idiv_word (PC_ENV *m, uint16 s);
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void div_byte (PC_ENV *m, uint8 s);
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void div_word (PC_ENV *m, uint16 s);
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