CLR/CLRB fix (2)
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b035260e07
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3ede69e864
2 changed files with 3 additions and 10 deletions
5
bus.cpp
5
bus.cpp
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@ -273,11 +273,6 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
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DOLOG(debug, true, "bus::readWord: odd address UNHANDLED %o", a);
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DOLOG(debug, true, "bus::readWord: odd address UNHANDLED %o", a);
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DOLOG(debug, true, "UNHANDLED read %o(%c)", a, word_mode ? 'B' : ' ');
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DOLOG(debug, true, "UNHANDLED read %o(%c)", a, word_mode ? 'B' : ' ');
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// DEBUG CODE TODO
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extern FILE *lfh;
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fflush(lfh);
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assert(false);
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}
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}
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return -1;
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return -1;
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8
cpu.cpp
8
cpu.cpp
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@ -776,12 +776,10 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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// CLRB only clears the least significant byte
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// CLRB only clears the least significant byte
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if (word_mode) {
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if (word_mode) {
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if (dst_mode)
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if (dst_mode == 0)
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r = b->read(g_dst.addr.value(), false, false) & 0xff00;
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else
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r = getRegister(dst_reg, false, false) & 0xff00;
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r = getRegister(dst_reg, false, false) & 0xff00;
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// both in byte and word mode the full register must be updated
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// both in byte and word mode the full word must be updated
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g_dst.word_mode = false;
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g_dst.word_mode = false;
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}
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}
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@ -1498,7 +1496,7 @@ bool cpu::misc_operations(const uint16_t instr)
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return true;
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return true;
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case 0b0000000000000100: // IOT
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case 0b0000000000000100: // IOT
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trap(020);
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//trap(020); disabled for debugging
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return true;
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return true;
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case 0b0000000000000110: // RTT
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case 0b0000000000000110: // RTT
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