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Revert "RTI/RTT shall not change the PSW in user/supervisor mode"

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This reverts commit 31edf022cc.

Seems to break at least XXDP EKBAD0.BIC
This commit is contained in:
folkert van heusden 2023-03-13 10:10:13 +01:00
parent 08d8c75d58
commit 4618c86ffa
2 changed files with 12 additions and 20 deletions
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30
cpu.cpp
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@ -247,15 +247,17 @@ int cpu::getPSW_spl() const
return (psw >> 5) & 7;
}
void cpu::setPSW(uint16_t v, const bool limited)
void cpu::setPSW(const uint16_t v, const bool limited)
{
if (limited) {
v &= 0174037;
psw |= v & 0174000; // current & previous mode can only be increased, 11 can only be set
v |= psw & 0174340;
psw &= 0174000; // retain upper 5 bit
psw |= v & ~0174000;
}
else {
psw = v;
}
psw = v;
}
bool cpu::check_queued_interrupts()
@ -1628,15 +1630,10 @@ bool cpu::misc_operations(const uint16_t instr)
case 0b0000000000000001: // WAIT
return true;
case 0b0000000000000010: { // RTI
case 0b0000000000000010: // RTI
setPC(popStack());
uint16_t replacement_psw = popStack();
setPSW(replacement_psw, true);
setPSW(popStack(), !!((getPSW() >> 12) & 3));
return true;
}
case 0b0000000000000011: // BPT
trap(014);
@ -1646,15 +1643,10 @@ bool cpu::misc_operations(const uint16_t instr)
trap(020);
return true;
case 0b0000000000000110: { // RTT
case 0b0000000000000110: // RTT
setPC(popStack());
uint16_t replacement_psw = popStack();
setPSW(replacement_psw, true);
setPSW(popStack(), !!((getPSW() >> 12) & 3));
return true;
}
case 0b0000000000000111: // MFPT
if (emulateMFPT)

2
cpu.h
View file

@ -117,7 +117,7 @@ public:
void setBitPSW(const int bit, const bool v);
uint16_t getPSW() const { return psw; }
void setPSW(uint16_t v, const bool limited);
void setPSW(const uint16_t v, const bool limited);
uint16_t getStackLimitRegister() { return stackLimitRegister; }
void setStackLimitRegister(const uint16_t v) { stackLimitRegister = v; }