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Merge branch 'master' into DC11

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This commit is contained in:
folkert van heusden 2024-05-03 20:46:19 +02:00
commit f540458918
Signed by untrusted user who does not match committer: folkert
GPG key ID: 6B6455EDFEED3BD1
13 changed files with 443 additions and 362 deletions
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9
BIC/README.md Normal file
View file

@ -0,0 +1,9 @@
BKTCB0.BIC 11/40 memory management MTPI/MFPI instruction test
EKBAD0.BIC 11/70 cpu basic instructions
EKBBF0.BIC 11/70 cpu advanced instructions
EKBEE1.BIC 11/70 memory management
EKBFD1.BIC 11/70 unibus map
EMKAB0.BIC 11/70 main memory test
EQKCE1.BIC 11/70 instruction exerciser
ZRKJE0.BIC RK05 basic logic test #1
ZRKKF2.BIC RK05 basic logic test #2

2
LICENSE
View file

@ -1,6 +1,6 @@
MIT License
Copyright (c) 2023 Folkert van Heusden
Copyright (c) 2018-2024 Folkert van Heusden
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal

286
bus.cpp
View file

@ -25,7 +25,6 @@
bus::bus()
{
mmu_ = new mmu();
mmu_->begin();
kw11_l_ = new kw11_l(this);
@ -82,9 +81,10 @@ bus *bus::deserialize(const json_t *const j, console *const cnsl, std::atomic_ui
json_t *temp = nullptr;
memory *m = nullptr;
temp = json_object_get(j, "memory");
if (temp) {
memory *m = memory::deserialize(temp);
m = memory::deserialize(temp);
b->add_ram(m);
}
@ -102,7 +102,7 @@ bus *bus::deserialize(const json_t *const j, console *const cnsl, std::atomic_ui
temp = json_object_get(j, "mmu");
if (temp) {
mmu *mmu_ = mmu::deserialize(temp);
mmu *mmu_ = mmu::deserialize(temp, m);
b->add_mmu(mmu_);
}
@ -137,6 +137,8 @@ void bus::set_memory_size(const int n_pages)
delete m;
m = new memory(n_bytes);
mmu_->begin(m);
DOLOG(info, false, "Memory is now %u kB in size", n_bytes / 1024);
}
@ -172,6 +174,8 @@ void bus::add_ram(memory *const m)
{
delete this->m;
this->m = m;
mmu_->begin(m);
}
void bus::add_mmu(mmu *const mmu_)
@ -222,25 +226,13 @@ void bus::init()
mmu_->setMMR3(0);
}
void bus::trap_odd(const uint16_t a)
{
uint16_t temp = mmu_->getMMR0();
temp &= ~(7 << 1);
temp |= (a >> 13) << 1;
mmu_->setMMR0(temp);
c->trap(004); // invalid access
}
uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only, const d_i_space_t space)
{
int run_mode = mode_selection == rm_cur ? c->getPSW_runmode() : c->getPSW_prev_runmode();
uint32_t m_offset = calculate_physical_address(run_mode, addr_in, !peek_only, false, peek_only, space);
uint32_t m_offset = mmu_->calculate_physical_address(c, run_mode, addr_in, !peek_only, false, peek_only, space);
uint32_t io_base = get_io_base();
uint32_t io_base = mmu_->get_io_base();
bool is_io = m_offset >= io_base;
if (is_io) {
@ -280,9 +272,9 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
///^ registers ^///
if (!peek_only) {
if ((a & 1) && word_mode == wm_word) {
if ((a & 1) && word_mode == wm_word) [[unlikely]] {
DOLOG(debug, false, "READ-I/O odd address %06o UNHANDLED", a);
trap_odd(a);
mmu_->trap_if_odd(addr_in, run_mode, space, false);
throw 0;
return 0;
}
@ -498,7 +490,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
}
if (!peek_only) {
DOLOG(debug, false, "READ-I/O UNHANDLED read %08o (%c), (base: %o)", m_offset, word_mode == wm_byte ? 'B' : ' ', get_io_base());
DOLOG(debug, false, "READ-I/O UNHANDLED read %08o (%c), (base: %o)", m_offset, word_mode == wm_byte ? 'B' : ' ', mmu_->get_io_base());
c->trap(004); // no such i/o
throw 1;
@ -508,8 +500,8 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
}
if (peek_only == false && word_mode == wm_word && (addr_in & 1)) {
if (!peek_only) DOLOG(debug, false, "READ from %06o - odd address!", addr_in);
trap_odd(addr_in);
DOLOG(debug, false, "READ from %06o - odd address!", addr_in);
mmu_->trap_if_odd(addr_in, run_mode, space, false);
throw 2;
return 0;
}
@ -535,53 +527,9 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
return temp;
}
void bus::check_odd_addressing(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write)
{
if (a & 1) {
if (is_write)
mmu_->set_page_trapped(run_mode, space == d_space, a >> 13);
trap_odd(a);
throw 4;
}
}
memory_addresses_t bus::calculate_physical_address(const int run_mode, const uint16_t a) const
{
const uint8_t apf = a >> 13; // active page field
if (mmu_->is_enabled() == false) {
bool is_psw = a == ADDR_PSW;
return { a, apf, a, is_psw, a, is_psw };
}
uint32_t physical_instruction = mmu_->get_physical_memory_offset(run_mode, 0, apf);
uint32_t physical_data = mmu_->get_physical_memory_offset(run_mode, 1, apf);
uint16_t p_offset = a & 8191; // page offset
physical_instruction += p_offset;
physical_data += p_offset;
if ((mmu_->getMMR3() & 16) == 0) { // offset is 18bit
physical_instruction &= 0x3ffff;
physical_data &= 0x3ffff;
}
if (mmu_->get_use_data_space(run_mode) == false)
physical_data = physical_instruction;
uint32_t io_base = get_io_base();
bool physical_instruction_is_psw = (physical_instruction - io_base + 0160000) == ADDR_PSW;
bool physical_data_is_psw = (physical_data - io_base + 0160000) == ADDR_PSW;
return { a, apf, physical_instruction, physical_instruction_is_psw, physical_data, physical_data_is_psw };
}
bool bus::is_psw(const uint16_t addr, const int run_mode, const d_i_space_t space) const
{
auto meta = calculate_physical_address(run_mode, addr);
auto meta = mmu_->calculate_physical_address(run_mode, addr);
if (space == d_space && meta.physical_data_is_psw)
return true;
@ -592,194 +540,6 @@ bool bus::is_psw(const uint16_t addr, const int run_mode, const d_i_space_t spac
return false;
}
void bus::mmudebug(const uint16_t a)
{
for(int rm=0; rm<4; rm++) {
auto ma = calculate_physical_address(rm, a);
DOLOG(debug, false, "RM %d, a: %06o, apf: %d, PI: %08o (PSW: %d), PD: %08o (PSW: %d)", rm, ma.virtual_address, ma.apf, ma.physical_instruction, ma.physical_instruction_is_psw, ma.physical_data, ma.physical_data_is_psw);
}
}
std::pair<trap_action_t, int> bus::get_trap_action(const int run_mode, const bool d, const int apf, const bool is_write)
{
const int access_control = mmu_->get_access_control(run_mode, d, apf);
trap_action_t trap_action = T_PROCEED;
if (access_control == 0)
trap_action = T_ABORT_4;
else if (access_control == 1)
trap_action = is_write ? T_ABORT_4 : T_TRAP_250;
else if (access_control == 2) {
if (is_write)
trap_action = T_ABORT_4;
}
else if (access_control == 3)
trap_action = T_ABORT_4;
else if (access_control == 4)
trap_action = T_TRAP_250;
else if (access_control == 5) {
if (is_write)
trap_action = T_TRAP_250;
}
else if (access_control == 6) {
// proceed
}
else if (access_control == 7) {
trap_action = T_ABORT_4;
}
return { trap_action, access_control };
}
uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, const bool trap_on_failure, const bool is_write, const bool peek_only, const d_i_space_t space)
{
uint32_t m_offset = a;
if (mmu_->is_enabled() || (is_write && (mmu_->getMMR0() & (1 << 8 /* maintenance check */)))) {
uint8_t apf = a >> 13; // active page field
bool d = space == d_space && mmu_->get_use_data_space(run_mode);
uint16_t p_offset = a & 8191; // page offset
m_offset = mmu_->get_physical_memory_offset(run_mode, d, apf);
m_offset += p_offset;
if ((mmu_->getMMR3() & 16) == 0) // off is 18bit
m_offset &= 0x3ffff;
uint32_t io_base = get_io_base();
bool is_io = m_offset >= io_base;
if (trap_on_failure) [[unlikely]] {
{
auto rc = get_trap_action(run_mode, d, apf, is_write);
auto trap_action = rc.first;
int access_control = rc.second;
if (trap_action != T_PROCEED) {
if (is_write)
mmu_->set_page_trapped(run_mode, d, apf);
if (mmu_->is_locked() == false) {
uint16_t temp = mmu_->getMMR0();
temp &= ~((1l << 15) | (1 << 14) | (1 << 13) | (1 << 12) | (3 << 5) | (7 << 1) | (1 << 4));
if (is_write && access_control != 6)
temp |= 1 << 13; // read-only
//
if (access_control == 0 || access_control == 4)
temp |= 1l << 15; // not resident
else
temp |= 1 << 13; // read-only
temp |= run_mode << 5; // TODO: kernel-mode or user-mode when a trap occurs in user-mode?
temp |= apf << 1; // add current page
temp |= d << 4;
mmu_->setMMR0(temp);
DOLOG(debug, false, "MMR0: %06o", temp);
}
if (trap_action == T_TRAP_250) {
DOLOG(debug, false, "Page access %d (for virtual address %06o): trap 0250", access_control, a);
c->trap(0250); // trap
throw 5;
}
else { // T_ABORT_4
DOLOG(debug, false, "Page access %d (for virtual address %06o): trap 004", access_control, a);
c->trap(004); // abort
throw 5;
}
}
}
if (m_offset >= m->get_memory_size() && !is_io) [[unlikely]] {
DOLOG(debug, !peek_only, "bus::calculate_physical_address %o >= %o", m_offset, m->get_memory_size());
DOLOG(debug, false, "TRAP(04) (throw 6) on address %06o", a);
if (mmu_->is_locked() == false) {
uint16_t temp = mmu_->getMMR0();
temp &= 017777;
temp |= 1l << 15; // non-resident
temp &= ~14; // add current page
temp |= apf << 1;
temp &= ~(3 << 5);
temp |= run_mode << 5;
mmu_->setMMR0(temp);
}
if (is_write)
mmu_->set_page_trapped(run_mode, d, apf);
c->trap(04);
throw 6;
}
uint16_t pdr_len = mmu_->get_pdr_len(run_mode, d, apf);
uint16_t pdr_cmp = (a >> 6) & 127;
bool direction = mmu_->get_pdr_direction(run_mode, d, apf);
// DOLOG(debug, false, "p_offset %06o pdr_len %06o direction %d, run_mode %d, apf %d, pdr: %06o", p_offset, pdr_len, direction, run_mode, apf, pages[run_mode][d][apf].pdr);
if ((pdr_cmp > pdr_len && direction == false) || (pdr_cmp < pdr_len && direction == true)) {
DOLOG(debug, false, "bus::calculate_physical_address::p_offset %o versus %o direction %d", pdr_cmp, pdr_len, direction);
DOLOG(debug, false, "TRAP(0250) (throw 7) on address %06o", a);
c->trap(0250); // invalid access
if (mmu_->is_locked() == false) {
uint16_t temp = mmu_->getMMR0();
temp &= 017777;
temp |= 1 << 14; // length
temp &= ~14; // add current page
temp |= apf << 1;
temp &= ~(3 << 5);
temp |= run_mode << 5;
temp &= ~(1 << 4);
temp |= d << 4;
mmu_->setMMR0(temp);
}
if (is_write)
mmu_->set_page_trapped(run_mode, d, apf);
throw 7;
}
}
DOLOG(debug, false, "virtual address %06o maps to physical address %08o (run_mode: %d, apf: %d, par: %08o, poff: %o, AC: %d, %s)", a, m_offset, run_mode, apf,
mmu_->get_physical_memory_offset(run_mode, d, apf),
p_offset, mmu_->get_access_control(run_mode, d, apf), d ? "D" : "I");
}
else {
// DOLOG(debug, false, "no MMU (read physical address %08o)", m_offset);
}
return m_offset;
}
write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t space)
{
int run_mode = mode_selection == rm_cur ? c->getPSW_runmode() : c->getPSW_prev_runmode();
@ -792,9 +552,9 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
if (mmu_->is_enabled() && (addr_in & 1) == 0 /* TODO remove this? */ && addr_in != ADDR_MMR0)
mmu_->set_page_written_to(run_mode, d, apf);
uint32_t m_offset = calculate_physical_address(run_mode, addr_in, true, true, false, space);
uint32_t m_offset = mmu_->calculate_physical_address(c, run_mode, addr_in, true, true, false, space);
uint32_t io_base = get_io_base();
uint32_t io_base = mmu_->get_io_base();
bool is_io = m_offset >= io_base;
if (is_io) {
@ -1015,12 +775,13 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
///////////
DOLOG(debug, false, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode == wm_byte ? 'B' : 'W', value, get_io_base());
DOLOG(debug, false, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode == wm_byte ? 'B' : 'W', value, mmu_->get_io_base());
if (word_mode == wm_word && (a & 1)) {
if (word_mode == wm_word && (a & 1)) [[unlikely]] {
DOLOG(debug, false, "WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value);
trap_odd(a);
mmu_->trap_if_odd(a, run_mode, space, true);
throw 8;
}
@ -1029,10 +790,11 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
throw 9;
}
if (word_mode == wm_word && (addr_in & 1)) {
if (word_mode == wm_word && (addr_in & 1)) [[unlikely]] {
DOLOG(debug, false, "WRITE to %06o (value: %06o) - odd address!", addr_in, value);
trap_odd(addr_in);
mmu_->trap_if_odd(addr_in, run_mode, space, true);
throw 10;
}

35
bus.h
View file

@ -50,19 +50,9 @@ class console;
class cpu;
class kw11_l;
class memory;
class tm_11;
class tty;
typedef enum { T_PROCEED, T_ABORT_4, T_TRAP_250 } trap_action_t;
typedef struct {
uint16_t virtual_address;
uint8_t apf; // active page field
uint32_t physical_instruction;
bool physical_instruction_is_psw;
uint32_t physical_data;
bool physical_data_is_psw;
} memory_addresses_t;
typedef struct {
bool is_psw;
} write_rc_t;
@ -105,8 +95,6 @@ public:
void set_memory_size(const int n_pages);
void mmudebug(const uint16_t a);
void add_ram (memory *const m );
void add_cpu (cpu *const c );
void add_mmu (mmu *const mmu_ );
@ -125,31 +113,20 @@ public:
rk05 *getRK05() { return rk05_; }
rl02 *getRL02() { return rl02_; }
dc11 *getDC11() { return dc11_; }
tm_11 *getTM11() { return tm11; }
uint16_t read (const uint16_t a, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only=false, const d_i_space_t s = i_space);
uint16_t read(const uint16_t a, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only=false, const d_i_space_t s = i_space);
uint16_t read_byte(const uint16_t a) { return read(a, wm_byte, rm_cur); }
uint16_t read_word(const uint16_t a, const d_i_space_t s = i_space);
uint16_t peekWord(const uint16_t a);
uint8_t readUnibusByte(const uint32_t a);
void writeUnibusByte(const uint32_t a, const uint8_t value);
uint16_t readPhysical(const uint32_t a);
write_rc_t write (const uint16_t a, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t s = i_space);
write_rc_t write(const uint16_t a, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t s = i_space);
void writeUnibusByte(const uint32_t a, const uint8_t value);
void write_byte(const uint16_t a, const uint8_t value) { write(a, wm_byte, value, rm_cur); }
void write_word(const uint16_t a, const uint16_t value, const d_i_space_t s = i_space);
uint16_t readPhysical(const uint32_t a);
void writePhysical(const uint32_t a, const uint16_t value);
void check_odd_addressing(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write);
void trap_odd(const uint16_t a);
uint32_t get_io_base() const { return mmu_->getMMR0() & 1 ? (mmu_->getMMR3() & 16 ? 017760000 : 0760000) : 0160000; }
bool is_psw(const uint16_t addr, const int run_mode, const d_i_space_t space) const;
std::pair<trap_action_t, int> get_trap_action(const int run_mode, const bool d, const int apf, const bool is_write);
uint32_t calculate_physical_address(const int run_mode, const uint16_t a, const bool trap_on_failure, const bool is_write, const bool peek_only, const d_i_space_t space);
memory_addresses_t calculate_physical_address(const int run_mode, const uint16_t a) const;
void check_address(const bool trap_on_failure, const bool is_write, const memory_addresses_t & addr, const word_mode_t word_mode, const bool is_data, const int run_mode);
};

2
console_ncurses.cpp
View file

@ -145,7 +145,7 @@ void console_ncurses::panel_update_thread()
int run_mode = current_PSW >> 14;
uint16_t current_PC = c->getPC();
uint32_t full_addr = b->calculate_physical_address(run_mode, current_PC, false, false, true, i_space);
uint32_t full_addr = b->getMMU()->calculate_physical_address(c, run_mode, current_PC, false, false, true, i_space);
uint16_t current_instr = b->read_word(current_PC);

9
cpu.cpp
View file

@ -6,11 +6,14 @@
#include <stdlib.h>
#include <string.h>
#include "breakpoint.h"
#include "bus.h"
#include "cpu.h"
#include "gen.h"
#include "log.h"
#include "utils.h"
#define SIGN(x, wm) ((wm) == wm_byte ? (x) & 0x80 : (x) & 0x8000)
#define IS_0(x, wm) ((wm) == wm_byte ? ((x) & 0xff) == 0 : (x) == 0)
@ -539,11 +542,15 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
break;
}
assert(g.value < 256 || word_mode == wm_word);
return g;
}
bool cpu::putGAM(const gam_rc_t & g, const uint16_t value)
{
assert(value < 256 || g.word_mode == wm_word);
if (g.addr.has_value()) {
auto rc = b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space);
@ -1437,7 +1444,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
auto a = getGAMAddress(dst_mode, dst_reg, wm_word);
addToMMR1(a);
b->mmudebug(a.addr.value());
b->getMMU()->mmudebug(a.addr.value());
a.mode_selection = rm_prev;
a.space = word_mode == wm_byte ? d_space : i_space;

8
cpu.h
View file

@ -3,7 +3,8 @@
#pragma once
#include <assert.h>
#include <atomic>
#include <cassert>
#include <condition_variable>
#include <map>
#include <mutex>
@ -12,11 +13,12 @@
#include <stdint.h>
#include <vector>
#include "breakpoint.h"
#include "bus.h"
#include "gen.h"
class breakpoint;
class bus;
constexpr const int initial_trap_delay = 8;
constexpr const int max_stacktrace_depth = 16;

120
debugger.cpp
View file

@ -76,35 +76,8 @@ std::optional<disk_backend *> select_nbd_server(console *const cnsl)
}
#endif
// disk image files
std::optional<disk_backend *> select_disk_file(console *const c)
std::optional<std::string> select_host_file(console *const c)
{
#if IS_POSIX
c->put_string_lf("Files in current directory: ");
#else
c->put_string_lf(format("MISO: %d", int(MISO)));
c->put_string_lf(format("MOSI: %d", int(MOSI)));
c->put_string_lf(format("SCK : %d", int(SCK )));
c->put_string_lf(format("SS : %d", int(SS )));
c->put_string_lf("Files on SD-card:");
#if defined(SHA2017)
if (!SD.begin(21, SD_SCK_MHZ(10)))
SD.initErrorHalt();
#elif !defined(BUILD_FOR_RP2040)
if (!SD.begin(SS, SD_SCK_MHZ(15))) {
auto err = SD.sdErrorCode();
if (err)
c->put_string_lf(format("SDerror: 0x%x, data: 0x%x", err, SD.sdErrorData()));
else
c->put_string_lf("Failed to initialize SD card");
return { };
}
#endif
#endif
for(;;) {
#if defined(linux)
DIR *dir = opendir(".");
@ -164,16 +137,57 @@ std::optional<disk_backend *> select_disk_file(console *const c)
fh.close();
#endif
if (can_open_file) {
if (can_open_file)
return selected_file;
c->put_string_lf("open failed");
}
}
// disk image files
std::optional<disk_backend *> select_disk_file(console *const c)
{
#if IS_POSIX
disk_backend *temp = new disk_backend_file(selected_file);
c->put_string_lf("Files in current directory: ");
#else
disk_backend *temp = new disk_backend_esp32(selected_file);
c->put_string_lf(format("MISO: %d", int(MISO)));
c->put_string_lf(format("MOSI: %d", int(MOSI)));
c->put_string_lf(format("SCK : %d", int(SCK )));
c->put_string_lf(format("SS : %d", int(SS )));
c->put_string_lf("Files on SD-card:");
#if defined(SHA2017)
if (!SD.begin(21, SD_SCK_MHZ(10)))
SD.initErrorHalt();
#elif !defined(BUILD_FOR_RP2040)
if (!SD.begin(SS, SD_SCK_MHZ(15))) {
auto err = SD.sdErrorCode();
if (err)
c->put_string_lf(format("SDerror: 0x%x, data: 0x%x", err, SD.sdErrorData()));
else
c->put_string_lf("Failed to initialize SD card");
return { };
}
#endif
#endif
for(;;) {
auto selected_file = select_host_file(c);
if (selected_file.has_value() == false)
break;
#if IS_POSIX
disk_backend *temp = new disk_backend_file(selected_file.value());
#else
disk_backend *temp = new disk_backend_esp32(selected_file.value());
#endif
if (!temp->begin(false)) {
c->put_string("Cannot use: ");
c->put_string_lf(selected_file.c_str());
c->put_string_lf(selected_file.value().c_str());
delete temp;
@ -183,9 +197,6 @@ std::optional<disk_backend *> select_disk_file(console *const c)
return { temp };
}
c->put_string_lf("open failed");
}
return { };
}
@ -235,7 +246,6 @@ std::optional<disk_backend *> select_disk_backend(console *const cnsl)
void configure_disk(bus *const b, console *const cnsl)
{
// TODO tape
int type_ch = wait_for_key("1. RK05, 2. RL02, 9. abort", cnsl, { '1', '2', '3', '9' });
bootloader_t bl = BL_NONE;
@ -488,7 +498,7 @@ void mmu_resolve(console *const cnsl, bus *const b, const uint16_t va)
int run_mode = b->getCpu()->getPSW_runmode();
cnsl->put_string_lf(format("Run mode: %d, use data space: %d", run_mode, b->getMMU()->get_use_data_space(run_mode)));
auto data = b->calculate_physical_address(run_mode, va);
auto data = b->getMMU()->calculate_physical_address(run_mode, va);
uint16_t page_offset = va & 8191;
cnsl->put_string_lf(format("Active page field: %d, page offset: %o (%d)", data.apf, page_offset, page_offset));
@ -511,8 +521,8 @@ void mmu_resolve(console *const cnsl, bus *const b, const uint16_t va)
}
for(int i=0; i<2; i++) {
auto ta_i = b->get_trap_action(run_mode, false, data.apf, i);
auto ta_d = b->get_trap_action(run_mode, true, data.apf, i);
auto ta_i = b->getMMU()->get_trap_action(run_mode, false, data.apf, i);
auto ta_d = b->getMMU()->get_trap_action(run_mode, true, data.apf, i);
cnsl->put_string_lf(format("Instruction action: %s (%s)", trap_action_to_str(ta_i.first), i ? "write" : "read"));
cnsl->put_string_lf(format("Data action : %s (%s)", trap_action_to_str(ta_d.first), i ? "write" : "read"));
@ -590,6 +600,23 @@ void serialize_state(console *const cnsl, const bus *const b, const std::string
}
#endif
void tm11_load_tape(console *const cnsl, bus *const b, const std::optional<std::string> & file)
{
if (file.has_value())
b->getTM11()->load(file.value());
else {
auto sel_file = select_host_file(cnsl);
if (sel_file.has_value())
b->getTM11()->load(sel_file.value());
}
}
void tm11_unload_tape(bus *const b)
{
b->getTM11()->unload();
}
void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const bool tracing_in)
{
int32_t trace_start_addr = -1;
@ -959,6 +986,19 @@ void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const sto
continue;
}
else if (parts[0] == "lt") {
if (parts.size() == 2)
tm11_load_tape(cnsl, b, parts[1]);
else
tm11_load_tape(cnsl, b, { });
continue;
}
else if (cmd == "ult") {
tm11_unload_tape(b);
continue;
}
else if (cmd == "dp") {
cnsl->stop_panel_thread();
@ -1012,6 +1052,8 @@ void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const sto
"setmem - set memory (a=) to value (v=), both in octal, one byte",
"toggle - set switch (s=, 0...15 (decimal)) of the front panel to state (t=, 0 or 1)",
"cls - clear screen",
"lt - load tape (parameter is filename)",
"ult - unload tape",
"stats - show run statistics",
"ramsize - set ram size (page count (8 kB))",
"bl - set bootload (rl02 or rk05)",

4
main.cpp
View file

@ -70,6 +70,7 @@ int run_cpu_validation(const std::string & filename)
// create environment
event = 0;
bus *b = new bus();
b->set_memory_size(DEFAULT_N_PAGES * 8192l);
cpu *c = new cpu(b, &event);
b->add_cpu(c);
@ -585,6 +586,9 @@ int main(int argc, char *argv[])
dc11 *dc11_ = new dc11(1100, b);
b->add_DC11(dc11_);
tm_11 *tm_11_ = new tm_11(b);
b->add_tm11(tm_11_);
running = cnsl->get_running_flag();
std::atomic_bool interrupt_emulation { false };

240
mmu.cpp
View file

@ -1,6 +1,7 @@
#include <cassert>
#include <cstring>
#include "bus.h" // for (at least) ADDR_PSW
#include "gen.h"
#include "log.h"
#include "mmu.h"
@ -15,8 +16,10 @@ mmu::~mmu()
{
}
void mmu::begin()
void mmu::begin(memory *const m)
{
this->m = m;
reset();
}
@ -213,6 +216,237 @@ void mmu::write_byte(const uint16_t a, const uint8_t value)
write_par(a, 3, value, wm_byte);
}
void mmu::trap_if_odd(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write)
{
int page = a >> 13;
if (is_write)
set_page_trapped(run_mode, space == d_space, page);
MMR0 &= ~(7 << 1);
MMR0 |= page << 1;
}
memory_addresses_t mmu::calculate_physical_address(const int run_mode, const uint16_t a) const
{
const uint8_t apf = a >> 13; // active page field
if (is_enabled() == false) {
bool is_psw = a == ADDR_PSW;
return { a, apf, a, is_psw, a, is_psw };
}
uint32_t physical_instruction = get_physical_memory_offset(run_mode, 0, apf);
uint32_t physical_data = get_physical_memory_offset(run_mode, 1, apf);
uint16_t p_offset = a & 8191; // page offset
physical_instruction += p_offset;
physical_data += p_offset;
if ((getMMR3() & 16) == 0) { // offset is 18bit
physical_instruction &= 0x3ffff;
physical_data &= 0x3ffff;
}
if (get_use_data_space(run_mode) == false)
physical_data = physical_instruction;
uint32_t io_base = get_io_base();
bool physical_instruction_is_psw = (physical_instruction - io_base + 0160000) == ADDR_PSW;
bool physical_data_is_psw = (physical_data - io_base + 0160000) == ADDR_PSW;
return { a, apf, physical_instruction, physical_instruction_is_psw, physical_data, physical_data_is_psw };
}
std::pair<trap_action_t, int> mmu::get_trap_action(const int run_mode, const bool d, const int apf, const bool is_write)
{
const int access_control = get_access_control(run_mode, d, apf);
trap_action_t trap_action = T_PROCEED;
if (access_control == 0)
trap_action = T_ABORT_4;
else if (access_control == 1)
trap_action = is_write ? T_ABORT_4 : T_TRAP_250;
else if (access_control == 2) {
if (is_write)
trap_action = T_ABORT_4;
}
else if (access_control == 3)
trap_action = T_ABORT_4;
else if (access_control == 4)
trap_action = T_TRAP_250;
else if (access_control == 5) {
if (is_write)
trap_action = T_TRAP_250;
}
else if (access_control == 6) {
// proceed
}
else if (access_control == 7) {
trap_action = T_ABORT_4;
}
return { trap_action, access_control };
}
void mmu::mmudebug(const uint16_t a)
{
for(int rm=0; rm<4; rm++) {
auto ma = calculate_physical_address(rm, a);
DOLOG(debug, false, "RM %d, a: %06o, apf: %d, PI: %08o (PSW: %d), PD: %08o (PSW: %d)", rm, ma.virtual_address, ma.apf, ma.physical_instruction, ma.physical_instruction_is_psw, ma.physical_data, ma.physical_data_is_psw);
}
}
uint32_t mmu::calculate_physical_address(cpu *const c, const int run_mode, const uint16_t a, const bool trap_on_failure, const bool is_write, const bool peek_only, const d_i_space_t space)
{
uint32_t m_offset = a;
if (is_enabled() || (is_write && (getMMR0() & (1 << 8 /* maintenance check */)))) {
uint8_t apf = a >> 13; // active page field
bool d = space == d_space && get_use_data_space(run_mode);
uint16_t p_offset = a & 8191; // page offset
m_offset = get_physical_memory_offset(run_mode, d, apf);
m_offset += p_offset;
if ((getMMR3() & 16) == 0) // off is 18bit
m_offset &= 0x3ffff;
uint32_t io_base = get_io_base();
bool is_io = m_offset >= io_base;
if (trap_on_failure) [[unlikely]] {
{
auto rc = get_trap_action(run_mode, d, apf, is_write);
auto trap_action = rc.first;
int access_control = rc.second;
if (trap_action != T_PROCEED) {
if (is_write)
set_page_trapped(run_mode, d, apf);
if (is_locked() == false) {
uint16_t temp = getMMR0();
temp &= ~((1l << 15) | (1 << 14) | (1 << 13) | (1 << 12) | (3 << 5) | (7 << 1) | (1 << 4));
if (is_write && access_control != 6)
temp |= 1 << 13; // read-only
//
if (access_control == 0 || access_control == 4)
temp |= 1l << 15; // not resident
else
temp |= 1 << 13; // read-only
temp |= run_mode << 5; // TODO: kernel-mode or user-mode when a trap occurs in user-mode?
temp |= apf << 1; // add current page
temp |= d << 4;
setMMR0(temp);
DOLOG(debug, false, "MMR0: %06o", temp);
}
if (trap_action == T_TRAP_250) {
DOLOG(debug, false, "Page access %d (for virtual address %06o): trap 0250", access_control, a);
c->trap(0250); // trap
throw 5;
}
else { // T_ABORT_4
DOLOG(debug, false, "Page access %d (for virtual address %06o): trap 004", access_control, a);
c->trap(004); // abort
throw 5;
}
}
}
if (m_offset >= m->get_memory_size() && !is_io) [[unlikely]] {
DOLOG(debug, !peek_only, "mmu::calculate_physical_address %o >= %o", m_offset, m->get_memory_size());
DOLOG(debug, false, "TRAP(04) (throw 6) on address %06o", a);
if (is_locked() == false) {
uint16_t temp = getMMR0();
temp &= 017777;
temp |= 1l << 15; // non-resident
temp &= ~14; // add current page
temp |= apf << 1;
temp &= ~(3 << 5);
temp |= run_mode << 5;
setMMR0(temp);
}
if (is_write)
set_page_trapped(run_mode, d, apf);
c->trap(04);
throw 6;
}
uint16_t pdr_len = get_pdr_len(run_mode, d, apf);
uint16_t pdr_cmp = (a >> 6) & 127;
bool direction = get_pdr_direction(run_mode, d, apf);
// DOLOG(debug, false, "p_offset %06o pdr_len %06o direction %d, run_mode %d, apf %d, pdr: %06o", p_offset, pdr_len, direction, run_mode, apf, pages[run_mode][d][apf].pdr);
if ((pdr_cmp > pdr_len && direction == false) || (pdr_cmp < pdr_len && direction == true)) {
DOLOG(debug, false, "mmu::calculate_physical_address::p_offset %o versus %o direction %d", pdr_cmp, pdr_len, direction);
DOLOG(debug, false, "TRAP(0250) (throw 7) on address %06o", a);
c->trap(0250); // invalid access
if (is_locked() == false) {
uint16_t temp = getMMR0();
temp &= 017777;
temp |= 1 << 14; // length
temp &= ~14; // add current page
temp |= apf << 1;
temp &= ~(3 << 5);
temp |= run_mode << 5;
temp &= ~(1 << 4);
temp |= d << 4;
setMMR0(temp);
}
if (is_write)
set_page_trapped(run_mode, d, apf);
throw 7;
}
}
DOLOG(debug, false, "virtual address %06o maps to physical address %08o (run_mode: %d, apf: %d, par: %08o, poff: %o, AC: %d, %s)", a, m_offset, run_mode, apf,
get_physical_memory_offset(run_mode, d, apf),
p_offset, get_access_control(run_mode, d, apf), d ? "D" : "I");
}
else {
// DOLOG(debug, false, "no MMU (read physical address %08o)", m_offset);
}
return m_offset;
}
#if IS_POSIX
void mmu::add_par_pdr(json_t *const target, const int run_mode, const bool is_d, const std::string & name) const
{
@ -266,10 +500,10 @@ void mmu::set_par_pdr(const json_t *const j_in, const int run_mode, const bool i
pages[run_mode][is_d][i].pdr = json_integer_value(json_array_get(j_pdr, i));
}
mmu *mmu::deserialize(const json_t *const j)
mmu *mmu::deserialize(const json_t *const j, memory *const mem)
{
mmu *m = new mmu();
m->begin();
m->begin(mem);
for(int run_mode=0; run_mode<4; run_mode++) {
if (run_mode == 2)

31
mmu.h
View file

@ -3,8 +3,11 @@
#include <cstdint>
#include <string>
#include "device.h"
#include "gen.h"
#include "cpu.h"
#include "device.h"
#include "memory.h"
#define ADDR_PDR_SV_START 0172200
#define ADDR_PDR_SV_END 0172240
@ -22,6 +25,17 @@
#define ADDR_PAR_U_END 0177700
typedef enum { T_PROCEED, T_ABORT_4, T_TRAP_250 } trap_action_t;
typedef struct {
uint16_t virtual_address;
uint8_t apf; // active page field
uint32_t physical_instruction;
bool physical_instruction_is_psw;
uint32_t physical_data;
bool physical_data_is_psw;
} memory_addresses_t;
typedef struct {
uint16_t par;
uint16_t pdr;
@ -41,6 +55,8 @@ private:
uint16_t PIR { 0 };
uint16_t CSR { 0 };
memory *m { nullptr };
#if IS_POSIX
void add_par_pdr(json_t *const target, const int run_mode, const bool is_d, const std::string & name) const;
void set_par_pdr(const json_t *const j_in, const int run_mode, const bool is_d, const std::string & name);
@ -50,13 +66,15 @@ public:
mmu();
virtual ~mmu();
void begin();
void begin(memory *const m);
#if IS_POSIX
json_t *serialize() const;
static mmu *deserialize(const json_t *const j);
static mmu *deserialize(const json_t *const j, memory *const m);
#endif
void mmudebug(const uint16_t a);
void reset() override;
bool is_enabled() const { return MMR0 & 1; }
@ -69,6 +87,11 @@ public:
int get_pdr_direction (const int run_mode, const bool d, const int apf) { return pages[run_mode][d][apf].pdr & 8; }
uint32_t get_physical_memory_offset(const int run_mode, const bool d, const int apf) const { return pages[run_mode][d][apf].par * 64; }
bool get_use_data_space(const int run_mode) const;
uint32_t get_io_base() const { return getMMR0() & 1 ? (getMMR3() & 16 ? 017760000 : 0760000) : 0160000; }
memory_addresses_t calculate_physical_address(const int run_mode, const uint16_t a) const;
std::pair<trap_action_t, int> get_trap_action(const int run_mode, const bool d, const int apf, const bool is_write);
uint32_t calculate_physical_address(cpu *const c, const int run_mode, const uint16_t a, const bool trap_on_failure, const bool is_write, const bool peek_only, const d_i_space_t space);
uint16_t getMMR0() const { return MMR0; }
uint16_t getMMR1() const { return MMR1; }
@ -88,6 +111,8 @@ public:
void setMMR0Bit(const int bit);
void clearMMR0Bit(const int bit);
void trap_if_odd(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write);
uint16_t getCPUERR() const { return CPUERR; }
void setCPUERR(const uint16_t v) { CPUERR = v; }

21
tm-11.cpp
View file

@ -10,18 +10,35 @@
#include "memory.h"
#include "utils.h"
tm_11::tm_11(const std::string & file, memory *const m): file(file), m(m)
tm_11::tm_11(bus *const b): m(b->getRAM())
{
}
tm_11::~tm_11()
{
if (fh)
fclose(fh);
}
void tm_11::begin()
void tm_11::unload()
{
if (fh) {
fclose(fh);
fh = nullptr;
}
tape_file.clear();
reset();
}
void tm_11::load(const std::string & file)
{
if (fh)
fclose(fh);
fh = fopen(file.c_str(), "rb");
tape_file = file;
reset();
}

8
tm-11.h
View file

@ -7,6 +7,7 @@
#include <stdio.h>
#include <string>
#include "bus.h"
#include "device.h"
#define TM_11_MTS 0172520 // status register
@ -24,18 +25,19 @@ class memory;
class tm_11 : public device
{
private:
std::string file;
memory *const m { nullptr };
uint16_t registers[6] { 0 };
uint8_t xfer_buffer[65536];
int offset { 0 };
FILE *fh { nullptr };
std::string tape_file;
public:
tm_11(const std::string & file, memory *const m);
tm_11(bus *const b);
virtual ~tm_11();
void begin();
void load(const std::string & file);
void unload();
void reset() override;