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263 commits

Author SHA1 Message Date
folkert van heusden
2f69f287ef
bus::calculate_physical_address did not handle non-mmu case 2023-03-24 09:12:37 +01:00
folkert van heusden
0fd4a70600
for some reason unixv5 wants to write a word to the system id i/o address 2023-03-23 22:09:19 +01:00
folkert van heusden
c096114c6b
EKBEE expects 18 bit address space with no RAM behind the last 8/16(?)kB 2023-03-23 20:18:36 +01:00
folkert van heusden
82da553c94
EKBE complains when unibus mapping-bit is masked off 2023-03-23 20:11:55 +01:00
folkert van heusden
9fc748e7e5
layout 2023-03-23 19:34:57 +01:00
folkert van heusden
283fc29c81
system size registers should not trap and also be r/o 2023-03-23 19:28:14 +01:00
folkert van heusden
4e6dff4ad9
SYSTEM_11_44 define in bus.h to aid KKTA/KKTB testing 2023-03-23 16:53:39 +01:00
folkert van heusden
921610643c
stack is in d-space 2023-03-23 16:12:17 +01:00
folkert van heusden
5a7c85b34b
log address-space (d/i) 2023-03-23 14:39:06 +01:00
folkert van heusden
f9eb348572
odd trap handling method 2023-03-23 14:19:35 +01:00
folkert van heusden
9ce5cb0bf6
lock bits / get instruction can trap 2023-03-23 12:44:06 +01:00
folkert van heusden
b184068789
always process ACF? not only when mmu enabled?! experiment! 2023-03-23 11:47:40 +01:00
folkert van heusden
45890daf75
MMR0 in byte mode 2023-03-23 09:14:50 +01:00
folkert van heusden
77997c3a63
gave each throw its own unique identifier 2023-03-22 13:51:13 +01:00
folkert van heusden
8a47015a93
replaced schedule_trap by trap() + throw 2023-03-22 13:48:55 +01:00
folkert van heusden
a820edea23
prevent memory leaks when re-adding devices 2023-03-22 13:44:27 +01:00
folkert van heusden
a672841865
clean-up 2023-03-21 21:16:41 +01:00
folkert van heusden
5bad90a820
lock MMR2 when upper 3 bits of MMR0 are set (any of them) 2023-03-21 19:40:32 +01:00
folkert van heusden
253d8437eb
throw exception when scheduling trap 004 for non existing pages 2023-03-21 19:34:58 +01:00
folkert van heusden
7ea2fa0033
only execute trap when MRR0_bit_9 AND MMR0_&_0xf000 == 0 2023-03-21 18:09:36 +01:00
folkert van heusden
06b5c027d3
do not run trap when 4 upper bits of MMR0 are set (any of them), also set bit 12 when there is a case for traping 2023-03-21 15:07:51 +01:00
folkert van heusden
69118435c4
A/W flags of PDR are reset when PAR is written to 2023-03-21 14:02:51 +01:00
folkert van heusden
406c2a5a09
i/o logging: handle peek_only-flag correct 2023-03-21 13:45:17 +01:00
folkert van heusden
470919e85d
If bit 9 of MMR0 is not set, abort an instruction but do not trap 2023-03-21 11:04:04 +01:00
folkert van heusden
49d16a72e6
ACF logic clean-up 2023-03-21 10:59:53 +01:00
folkert van heusden
ff40cdc82c
11/34 mode removed 2023-03-21 10:32:46 +01:00
folkert van heusden
fa9f57caa0
Bit 8 of MMR0 enables relocation only for 'destination'. Implemented by 
checking for bit 8 when doing a write.

https://retrocomputing.stackexchange.com/questions/24664/pdp-11-34-bit-8-in-mmr0-maintenance-mode-what-does-it-do
 2023-03-21 09:00:40 +01:00
folkert van heusden
6ac4a9ecb6
odd address check in i/o when in !word_mode 2023-03-21 08:49:49 +01:00
folkert van heusden
c77ae1d617
bus: trap(4) when reading from/writing to i/o or ram that does not exists/is not mapped 2023-03-20 22:27:04 +01:00
folkert van heusden
d8912d66f4
always clear MMR3 bit 5 as unibus mapping is not implemented yet 2023-03-20 21:10:16 +01:00
folkert van heusden
6cbb5c3faa
11/70 has only 8 bits for "microprogram break register"? 2023-03-20 19:39:31 +01:00
folkert van heusden
3df5d20152
ADDR_MICROPROG_BREAK_REG read access 2023-03-20 18:16:29 +01:00
folkert van heusden
84fd36f771
odd addressing trap in i/o space 2023-03-20 18:01:50 +01:00
folkert van heusden
831a01a5b1
fix for CLR & odd addressing-trap 2023-03-20 16:02:27 +01:00
folkert van heusden
ce730c6ea1
microprogram break register 2023-03-20 14:23:32 +01:00
folkert van heusden
2bf8b92217
0177764: system id 2023-03-20 09:58:56 +01:00
folkert van heusden
35eed8e117
MTP./MFP. trap on odd addressing 2023-03-19 20:57:07 +01:00
folkert van heusden
b7512ae3cd
show console LEDs 2023-03-19 15:05:00 +01:00
folkert van heusden
28750c56d8
also log i/o r/w 2023-03-19 14:43:06 +01:00
folkert van heusden
ac14e7be71
logging 2023-03-19 09:04:48 +01:00
folkert van heusden
3ede69e864
CLR/CLRB fix (2) 2023-03-18 23:34:41 +01:00
folkert van heusden
b035260e07
CLR/CLRB fix 2023-03-18 22:56:08 +01:00
folkert van heusden
488bb55cec
fixes for problems found by EQKCE1 2023-03-18 21:53:37 +01:00
folkert van heusden
eff5a799e5
unfixed the broken fix from 076575c405 2023-03-18 20:11:47 +01:00
folkert van heusden
0203371f44
typo 2023-03-18 19:21:54 +01:00
folkert van heusden
076575c405
corrected(?) SYSSIZE registers 2023-03-18 19:12:42 +01:00
folkert van heusden
a935fe44d7
use d-space where required 2023-03-18 14:45:44 +01:00
folkert van heusden
d7ca617155 assert 2023-03-13 12:25:24 +01:00
folkert van heusden
08d8c75d58 - readPhysical 
- initialize psw to 0 to match pypdp (for diff)
- SUB instruction V-flag may have been incorrect
- MFPI/MTPI flags
- MFPI readPhysical
- bootloader from pypdp (for diff)
 2023-03-12 22:32:53 +01:00
folkert van heusden
d68a5af55e writePhysical 2023-03-11 21:54:18 +01:00