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simple register optimization in clr

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This commit is contained in:
Neil Webber 2023-09-29 21:36:28 -05:00
parent 80290556b9
commit 75f25eccb0
1 changed files with 6 additions and 1 deletions
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7
op00.py
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@ -65,7 +65,12 @@ def op00_50_clr(cpu, inst, opsize=2):
cpu.psw_n = cpu.psw_v = cpu.psw_c = 0
cpu.psw_z = 1
cpu.operandx(inst & 0o77, 0, opsize=opsize)
dstb6 = (inst & 0o77)
# optimize the common register case
if opsize == 2 and dstb6 < 8:
cpu.r[dstb6] = 0
else:
cpu.operandx(dstb6, 0, opsize=opsize)
def op00_51_com(cpu, inst, opsize=2):