This commit is contained in:
Neil Webber 2024-05-03 07:48:18 -05:00
parent 87dff94cd3
commit c4f9423a4c

View file

@ -139,7 +139,7 @@ class UNIBUS:
# ignore them). Devices can, of course, just raise the traps themselves.
def illegal_cycle(self, addr, /, *, cycle=BusCycle.WRITE16, msg=None):
if msg is None:
msg =f"Illegal cycle ({cycle}) at {oct(addr)}"
msg = f"Illegal cycle ({cycle}) at {oct(addr)}"
self.cpu.logger.info(msg)
raise PDPTraps.AddressError(cpuerr=self.cpu.CPUERR_BITS.UNIBUS_TIMEOUT)