Commit graph

227 commits

Author SHA1 Message Date
outofmbufs
5df044e44c Really fix #23, this time without making Unix crash 2025-04-08 22:35:02 -05:00
outofmbufs
fe7243e460 Command line option to invoke LONG tests, such as the exhaustive ash tests 2025-04-08 22:20:09 -05:00
outofmbufs
ddd5c4bda5 more tests including rtt 2025-04-08 22:19:48 -05:00
outofmbufs
bbaf5e8bc6 Fixes #23 RTT/RTI too trusting 2025-04-08 22:16:48 -05:00
outofmbufs
b7da554118 Fixes Issue #22: ash, ashc handle psw_v wrong #22 2025-04-07 15:32:11 -05:00
outofmbufs
a91e781725 more ash tests 2025-04-07 15:25:04 -05:00
Neil Webber
2e6359f384 BSD boot sequences expects csr in R1 2025-04-06 08:13:39 -05:00
Neil Webber
9b0c1b906f clock tests and adc 2024-10-24 23:45:11 -05:00
Neil Webber
29af35d50d Add timestamp log for analysis 2024-10-24 23:44:12 -05:00
Neil Webber
33b46680ce adc 2024-10-24 10:48:00 -05:00
Neil Webber
58a45b0813 cleanups 2024-10-24 08:17:06 -05:00
Neil Webber
b4ac71c3b9 In one of those "how did this ever work?" situations... correct the
mapping of the I/O page in u64mapped_pdp()

The reason it ever 'worked' is that no test that used u64mapped_pdp made
use of anything in the I/O page...
2024-10-23 11:43:59 -05:00
Neil Webber
d9b436dad6 Make the unittests work again 2024-10-23 11:43:39 -05:00
Neil Webber
4f06554597 Run all the unit tests 2024-10-23 11:43:13 -05:00
Neil Webber
7031d8b6cd dup pending interrupts do not need to notify_all 2024-05-29 19:11:02 -05:00
Neil Webber
86175eae07 fix check16 message 2024-05-24 07:39:21 -05:00
Neil Webber
ff2d6b6de4 Clean up RED/YELLOW logging 2024-05-24 07:38:43 -05:00
Neil Webber
62150f45de squeeze a few nsec out of MOV 2024-05-23 18:14:23 -05:00
Neil Webber
dbe374b4bf clarify (and improve) how WAIT works 2024-05-23 18:13:38 -05:00
Neil Webber
6182fafe06 a few missing check16 calls 2024-05-21 06:32:09 -05:00
Neil Webber
8ab16ad442 initial gitignore 2024-05-20 08:10:54 -05:00
Neil Webber
8ca1a55668 clarify timing methodology 2024-05-18 18:23:36 -05:00
Neil Webber
b237f9b100 Lots about perf testing 2024-05-18 17:36:43 -05:00
Neil Webber
d4b8e8d896 enhancements for performance tests 2024-05-18 17:25:52 -05:00
Neil Webber
ddd800afb6 slight perf optimization 2024-05-18 17:23:14 -05:00
Neil Webber
96ae70668e uppersize and systemID 2024-05-18 13:38:49 -05:00
Neil Webber
5a95c06401 test_byteops 2024-05-18 09:08:43 -05:00
Neil Webber
4e92326323 optimize register-direct paths for ADD and CMP, more could be done. Signif speedups for the optimized cases 2024-05-17 12:04:05 -05:00
Neil Webber
715ff48d22 optimize TST on register direct 2024-05-17 12:03:09 -05:00
Neil Webber
6da0df526d tstb decb 2024-05-17 12:02:43 -05:00
Neil Webber
156972e88f Squeeze another 1% out of reg-reg mov 2024-05-17 11:26:12 -05:00
Neil Webber
0a5b2b8a69 some optimizations for >5% increaase in register ops 2024-05-16 15:55:05 -05:00
Neil Webber
379aeca487 add test for (user mode) PC wrap-around 2024-05-16 15:41:28 -05:00
Neil Webber
4651d137f7 HALT in user mode is ReservedInst, not AddressError 2024-05-16 15:39:44 -05:00
Neil Webber
d0de30614f minor editorial fixes 2024-05-15 22:17:22 -05:00
Neil Webber
02f55397f8 minor perf improvement for byte writes in operandx (validated with timeit) 2024-05-14 09:04:38 -05:00
Neil Webber
837c691fdc added MUL test 2024-05-13 12:40:38 -05:00
Neil Webber
6b3b41a0c8 Make sure HALT_SEQUENCE works even if only one byte 2024-05-12 04:17:25 -05:00
Neil Webber
5a1558c3d7 Updates for stdin mode 2024-05-11 17:06:11 -05:00
Neil Webber
3d8ec4a4bf cleanup 2024-05-11 16:18:28 -05:00
Neil Webber
9171cd5df1 Implement stdin mode (vs socket) and halt toggle capability (stdin only) 2024-05-11 16:18:17 -05:00
Neil Webber
d33ea43bd7 implement halt toggle 2024-05-11 16:17:44 -05:00
Neil Webber
8b55fe047d This entire module probably needs refactoring, it's getting a bit messy especially regarding messages. That said .. implement ability to select use_stdin for console emulation 2024-05-11 16:16:57 -05:00
Neil Webber
aeefc45355 Provide option to send telnet initialization sequences to console 2024-05-09 10:26:26 -05:00
Neil Webber
f278e18b89 SIMH allows -(PC) addressing mode, therefore, so do we 2024-05-08 20:37:57 -05:00
Neil Webber
d1e040dce8 test_trapconditions to verify various illegal sequences generate correct trap vectors (MORE TESTS NEEDED HERE) 2024-05-08 20:17:19 -05:00
Neil Webber
932fbd9ae2 Add tests for LDA with/without checksum on END block 2024-05-08 18:00:27 -05:00
Neil Webber
9428e4744a Verifying with some test code, SIMH generates ReservedInstruction for things like JMP R0 ... and now this code does the same (was AddressError) 2024-05-08 17:59:35 -05:00
Neil Webber
625c5ce1cc Allow for no checksum in END block of an LDA file 2024-05-08 17:58:38 -05:00
Neil Webber
53d7c5d7ab Fix for typeerror #21 -- though this also points out re-reading what MMR2 points to (for logging) might be a bad idea 2024-05-08 08:40:13 -05:00