outofmbufs
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5df044e44c
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Really fix #23, this time without making Unix crash
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2025-04-08 22:35:02 -05:00 |
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outofmbufs
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fe7243e460
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Command line option to invoke LONG tests, such as the exhaustive ash tests
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2025-04-08 22:20:09 -05:00 |
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outofmbufs
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ddd5c4bda5
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more tests including rtt
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2025-04-08 22:19:48 -05:00 |
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outofmbufs
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bbaf5e8bc6
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Fixes #23 RTT/RTI too trusting
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2025-04-08 22:16:48 -05:00 |
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outofmbufs
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b7da554118
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Fixes Issue #22: ash, ashc handle psw_v wrong #22
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2025-04-07 15:32:11 -05:00 |
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outofmbufs
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a91e781725
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more ash tests
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2025-04-07 15:25:04 -05:00 |
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Neil Webber
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2e6359f384
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BSD boot sequences expects csr in R1
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2025-04-06 08:13:39 -05:00 |
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Neil Webber
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9b0c1b906f
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clock tests and adc
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2024-10-24 23:45:11 -05:00 |
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Neil Webber
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29af35d50d
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Add timestamp log for analysis
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2024-10-24 23:44:12 -05:00 |
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Neil Webber
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33b46680ce
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adc
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2024-10-24 10:48:00 -05:00 |
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Neil Webber
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58a45b0813
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cleanups
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2024-10-24 08:17:06 -05:00 |
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Neil Webber
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b4ac71c3b9
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In one of those "how did this ever work?" situations... correct the
mapping of the I/O page in u64mapped_pdp()
The reason it ever 'worked' is that no test that used u64mapped_pdp made
use of anything in the I/O page...
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2024-10-23 11:43:59 -05:00 |
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Neil Webber
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d9b436dad6
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Make the unittests work again
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2024-10-23 11:43:39 -05:00 |
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Neil Webber
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4f06554597
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Run all the unit tests
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2024-10-23 11:43:13 -05:00 |
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Neil Webber
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7031d8b6cd
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dup pending interrupts do not need to notify_all
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2024-05-29 19:11:02 -05:00 |
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Neil Webber
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86175eae07
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fix check16 message
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2024-05-24 07:39:21 -05:00 |
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Neil Webber
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ff2d6b6de4
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Clean up RED/YELLOW logging
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2024-05-24 07:38:43 -05:00 |
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Neil Webber
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62150f45de
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squeeze a few nsec out of MOV
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2024-05-23 18:14:23 -05:00 |
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Neil Webber
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dbe374b4bf
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clarify (and improve) how WAIT works
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2024-05-23 18:13:38 -05:00 |
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Neil Webber
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6182fafe06
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a few missing check16 calls
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2024-05-21 06:32:09 -05:00 |
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Neil Webber
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8ab16ad442
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initial gitignore
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2024-05-20 08:10:54 -05:00 |
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Neil Webber
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8ca1a55668
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clarify timing methodology
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2024-05-18 18:23:36 -05:00 |
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Neil Webber
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b237f9b100
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Lots about perf testing
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2024-05-18 17:36:43 -05:00 |
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Neil Webber
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d4b8e8d896
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enhancements for performance tests
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2024-05-18 17:25:52 -05:00 |
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Neil Webber
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ddd800afb6
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slight perf optimization
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2024-05-18 17:23:14 -05:00 |
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Neil Webber
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96ae70668e
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uppersize and systemID
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2024-05-18 13:38:49 -05:00 |
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Neil Webber
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5a95c06401
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test_byteops
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2024-05-18 09:08:43 -05:00 |
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Neil Webber
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4e92326323
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optimize register-direct paths for ADD and CMP, more could be done. Signif speedups for the optimized cases
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2024-05-17 12:04:05 -05:00 |
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Neil Webber
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715ff48d22
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optimize TST on register direct
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2024-05-17 12:03:09 -05:00 |
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Neil Webber
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6da0df526d
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tstb decb
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2024-05-17 12:02:43 -05:00 |
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Neil Webber
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156972e88f
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Squeeze another 1% out of reg-reg mov
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2024-05-17 11:26:12 -05:00 |
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Neil Webber
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0a5b2b8a69
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some optimizations for >5% increaase in register ops
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2024-05-16 15:55:05 -05:00 |
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Neil Webber
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379aeca487
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add test for (user mode) PC wrap-around
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2024-05-16 15:41:28 -05:00 |
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Neil Webber
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4651d137f7
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HALT in user mode is ReservedInst, not AddressError
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2024-05-16 15:39:44 -05:00 |
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Neil Webber
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d0de30614f
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minor editorial fixes
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2024-05-15 22:17:22 -05:00 |
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Neil Webber
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02f55397f8
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minor perf improvement for byte writes in operandx (validated with timeit)
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2024-05-14 09:04:38 -05:00 |
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Neil Webber
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837c691fdc
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added MUL test
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2024-05-13 12:40:38 -05:00 |
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Neil Webber
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6b3b41a0c8
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Make sure HALT_SEQUENCE works even if only one byte
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2024-05-12 04:17:25 -05:00 |
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Neil Webber
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5a1558c3d7
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Updates for stdin mode
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2024-05-11 17:06:11 -05:00 |
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Neil Webber
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3d8ec4a4bf
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cleanup
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2024-05-11 16:18:28 -05:00 |
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Neil Webber
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9171cd5df1
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Implement stdin mode (vs socket) and halt toggle capability (stdin only)
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2024-05-11 16:18:17 -05:00 |
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Neil Webber
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d33ea43bd7
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implement halt toggle
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2024-05-11 16:17:44 -05:00 |
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Neil Webber
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8b55fe047d
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This entire module probably needs refactoring, it's getting a bit messy especially regarding messages. That said .. implement ability to select use_stdin for console emulation
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2024-05-11 16:16:57 -05:00 |
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Neil Webber
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aeefc45355
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Provide option to send telnet initialization sequences to console
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2024-05-09 10:26:26 -05:00 |
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Neil Webber
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f278e18b89
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SIMH allows -(PC) addressing mode, therefore, so do we
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2024-05-08 20:37:57 -05:00 |
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Neil Webber
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d1e040dce8
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test_trapconditions to verify various illegal sequences generate correct trap vectors (MORE TESTS NEEDED HERE)
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2024-05-08 20:17:19 -05:00 |
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Neil Webber
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932fbd9ae2
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Add tests for LDA with/without checksum on END block
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2024-05-08 18:00:27 -05:00 |
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Neil Webber
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9428e4744a
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Verifying with some test code, SIMH generates ReservedInstruction for things like JMP R0 ... and now this code does the same (was AddressError)
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2024-05-08 17:59:35 -05:00 |
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Neil Webber
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625c5ce1cc
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Allow for no checksum in END block of an LDA file
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2024-05-08 17:58:38 -05:00 |
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Neil Webber
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53d7c5d7ab
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Fix for typeerror #21 -- though this also points out re-reading what MMR2 points to (for logging) might be a bad idea
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2024-05-08 08:40:13 -05:00 |
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