TIMER: Fix missing catchup ticks for VAX simulators when idling
- MicroVAX I, II and 3900 don't have a DONE bit in the clock status register, so sim_rtcn_tick_ack() wasn't being called to acknowledge clock ticks. - Timer catchup tick criteria didn't work unless the host had a slow clock tick. As discussed in #705
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4 changed files with 8 additions and 6 deletions
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@ -248,7 +248,7 @@ void iccs_wr (int32 data)
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{
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{
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if ((data & CSR_IE) == 0)
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if ((data & CSR_IE) == 0)
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CLR_INT (CLK);
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CLR_INT (CLK);
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if ((clk_csr & CSR_DONE) && (data & CSR_DONE)) /* Interrupt Acked? */
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if (data & CSR_DONE) /* Interrupt Acked? */
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sim_rtcn_tick_ack (20, TMR_CLK); /* Let timers know */
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sim_rtcn_tick_ack (20, TMR_CLK); /* Let timers know */
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clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
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clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
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return;
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return;
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@ -226,7 +226,7 @@ void iccs_wr (int32 data)
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{
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{
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if ((data & CSR_IE) == 0)
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if ((data & CSR_IE) == 0)
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CLR_INT (CLK);
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CLR_INT (CLK);
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if ((clk_csr & CSR_DONE) && (data & CSR_DONE)) /* Interrupt Acked? */
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if (data & CSR_DONE) /* Interrupt Acked? */
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sim_rtcn_tick_ack (20, TMR_CLK); /* Let timers know */
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sim_rtcn_tick_ack (20, TMR_CLK); /* Let timers know */
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clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
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clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
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return;
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return;
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@ -300,7 +300,7 @@ void iccs_wr (int32 data)
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{
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{
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if ((data & CSR_IE) == 0)
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if ((data & CSR_IE) == 0)
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CLR_INT (CLK);
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CLR_INT (CLK);
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if ((clk_csr & CSR_DONE) && (data & CSR_DONE)) /* Interrupt Acked? */
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if (data & CSR_DONE) /* Interrupt Acked? */
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sim_rtcn_tick_ack (20, TMR_CLK); /* Let timers know */
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sim_rtcn_tick_ack (20, TMR_CLK); /* Let timers know */
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clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
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clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
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return;
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return;
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@ -1548,7 +1548,7 @@ if ((!sim_idle_enab) || /* idling disabled */
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sim_interval -= sin_cyc;
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sim_interval -= sin_cyc;
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return FALSE;
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return FALSE;
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}
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}
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if (_rtcn_tick_catchup_check(tmr, 0)) {
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if (_rtcn_tick_catchup_check (tmr, -1)) {
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sim_debug (DBG_CAL, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d) - rescheduling catchup tick for %s\n", tmr, sin_cyc, sim_uname (sim_clock_unit[tmr]));
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sim_debug (DBG_CAL, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d) - rescheduling catchup tick for %s\n", tmr, sin_cyc, sim_uname (sim_clock_unit[tmr]));
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sim_interval -= sin_cyc;
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sim_interval -= sin_cyc;
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return FALSE;
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return FALSE;
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@ -2104,6 +2104,9 @@ clock_gettime (CLOCK_REALTIME, now);
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*
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*
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* catchup ticks are only scheduled (eligible to happen) under these
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* catchup ticks are only scheduled (eligible to happen) under these
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* conditions after at least one tick has been acknowledged.
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* conditions after at least one tick has been acknowledged.
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*
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* The clock tick UNIT that will be scheduled to run for catchup ticks
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* must be specified with sim_rtcn_init_unit().
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*/
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*/
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/* _rtcn_tick_catchup_check - idle simulator until next event or for specified interval
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/* _rtcn_tick_catchup_check - idle simulator until next event or for specified interval
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@ -2120,8 +2123,7 @@ static t_bool _rtcn_tick_catchup_check (int32 tmr, int32 time)
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if ((!sim_catchup_ticks) ||
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if ((!sim_catchup_ticks) ||
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((tmr < 0) || (tmr >= SIM_NTIMERS)))
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((tmr < 0) || (tmr >= SIM_NTIMERS)))
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return FALSE;
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return FALSE;
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if ((rtc_hz[tmr] > sim_os_tick_hz) && /* faster than host tick */
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if ((!rtc_clock_catchup_eligible[tmr]) && /* not eligible yet? */
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(!rtc_clock_catchup_eligible[tmr]) && /* not eligible yet? */
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(time != -1)) { /* called from ack? */
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(time != -1)) { /* called from ack? */
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rtc_clock_catchup_base_time[tmr] = sim_timenow_double();
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rtc_clock_catchup_base_time[tmr] = sim_timenow_double();
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rtc_clock_ticks_tot[tmr] += rtc_clock_ticks[tmr];
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rtc_clock_ticks_tot[tmr] += rtc_clock_ticks[tmr];
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