VAX, PDP11, PDP10: Added a explanation of the capabilities and limitations of the NEXT command which is output the first time a NEXT command is entered.

Also added CHMK, CHME, CHMS and CHMU to the set of instructions which are considered subroutine call initiators in the VAX simulator.
This commit is contained in:
Mark Pizzolato 2014-04-19 05:45:29 -07:00
parent e8114cf088
commit 3946eb710e
3 changed files with 66 additions and 8 deletions

View file

@ -2359,17 +2359,35 @@ sim_brk_types = sim_brk_dflt = SWMASK ('E');
return SCPE_OK;
}
static const char *cpu_next_caveats =
"The NEXT command in the PDP10 simulator currently will enable stepping\n"
"across subroutine calls which are initiated by the PUSHJ, JSP, JSA and\n"
"JRA instructions. This stepping works by dynamically establishing\n"
"breakpoints at the 10 memory addresses immediately following the\n"
"instruction which initiated the subroutine call. These dynamic\n"
"breakpoints are automatically removed once the simulator returns to the\n"
"sim> prompt for any reason. If the called routine returns somewhere\n"
"other than one of these locations due to a trap, stack unwind or any\n"
"other reason, instruction execution will continue until some other\n"
"reason causes execution to stop.\n";
t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs)
{
#define MAX_SUB_RETURN_SKIP 10
static t_addr returns[MAX_SUB_RETURN_SKIP+1] = {0};
static t_bool caveats_displayed = FALSE;
a10 ea;
d10 inst, indrct;
int32 i, pflgs = 0;
t_addr adn, max_returns = MAX_SUB_RETURN_SKIP;
int32 xr, ac;
if (!caveats_displayed) {
caveats_displayed = TRUE;
printf ("%s", cpu_next_caveats);
if (sim_log)
fprintf (sim_log, "%s", cpu_next_caveats);
}
if (SCPE_OK != get_aval ((saved_PC & AMASK), &cpu_dev, &cpu_unit)) /* get data */
return FALSE;
inst = sim_eval[0];
@ -2396,7 +2414,7 @@ switch (GET_OP(inst))
max_returns = (t_addr)(ea - returns[0]);
for (adn=1; adn<max_returns; adn++)
returns[adn] = returns[adn-1] + 1; /* Possible skip return */
returns[i] = 0; /* Make sure the address list ends with a zero */
returns[adn] = 0; /* Make sure the address list ends with a zero */
*ret_addrs = returns;
return TRUE;
default:

View file

@ -3025,11 +3025,29 @@ set_r_display (0, MD_KER);
return SCPE_OK;
}
static const char *cpu_next_caveats =
"The NEXT command in the PDP11 simulator currently will enable stepping\n"
"across subroutine calls which are initiated by the JSR instruction.\n"
"This stepping works by dynamically establishing breakpoints at the\n"
"10 memory addresses immediately following the instruction which initiated\n"
"the subroutine call. These dynamic breakpoints are automatically\n"
"removed once the simulator returns to the sim> prompt for any reason.\n"
"If the called routine returns somewhere other than one of these\n"
"locations due to a trap, stack unwind or any other reason, instruction\n"
"execution will continue until some other reason causes execution to stop.\n";
t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs)
{
#define MAX_SUB_RETURN_SKIP 10
static t_addr returns[MAX_SUB_RETURN_SKIP + 1] = {0};
static t_bool caveats_displayed = FALSE;
if (!caveats_displayed) {
caveats_displayed = TRUE;
printf ("%s", cpu_next_caveats);
if (sim_log)
fprintf (sim_log, "%s", cpu_next_caveats);
}
if (SCPE_OK != get_aval (PC, &cpu_dev, &cpu_unit)) /* get data */
return FALSE;
if ((sim_eval[0] & 0177000) == 0004000) { /* JSR */

View file

@ -3207,20 +3207,42 @@ if (M == NULL) { /* first time init? */
return build_dib_tab ();
}
static const char *cpu_next_caveats =
"The NEXT command in this VAX architecture simulator currently will\n"
"enable stepping across subroutine calls which are initiated by the\n"
"BSBB, BSBW, JSB, CALLG, CALLS, CHMK, CHME, CHMS, and CHMU instructions.\n"
"This stepping works by dynamically establishing breakpoints at the\n"
"memory address immediately following the instruction which initiated\n"
"the subroutine call. These dynamic breakpoints are automatically\n"
"removed once the simulator returns to the sim> prompt for any reason.\n"
"If the called routine returns somewhere other than one of these\n"
"locations due to a trap, stack unwind or any other reason, instruction\n"
"execution will continue until some other reason causes execution to stop.\n";
t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs)
{
static t_addr returns[2] = {0, 0};
#define MAX_SUB_RETURN_SKIP 9
static t_addr returns[MAX_SUB_RETURN_SKIP+1] = {0};
static t_bool caveats_displayed = FALSE;
int i;
if (!caveats_displayed) {
caveats_displayed = TRUE;
printf ("%s", cpu_next_caveats);
if (sim_log)
fprintf (sim_log, "%s", cpu_next_caveats);
}
if (SCPE_OK != get_aval (PC, &cpu_dev, &cpu_unit)) /* get data */
return FALSE;
switch (sim_eval[0])
{
case BSBB:
case BSBW:
case JSB:
case CALLG:
case CALLS:
case BSBB: case BSBW: case JSB:
case CALLG: case CALLS:
case CHMK: case CHME: case CHMS: case CHMU:
returns[0] = PC + (1 - fprint_sym (stdnul, PC, sim_eval, &cpu_unit, SWMASK ('M')));
for (i=1; i<MAX_SUB_RETURN_SKIP; i++)
returns[i] = returns[i-1] + 1; /* Possible skip return */
returns[i] = 0; /* Make sure the address list ends with a zero */
*ret_addrs = returns;
return TRUE;
default: