folkert/simh-testsetgenerator
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

alpha: Fixed reversed definitions in opcode 12 (shifts)

Browse source 
It turns out that the two reversed opcodes Maurice identified were not the
only problems in opcode 12 (shifts). All of the INS/EXT pairs at function
codes .57 and above were reversed. In addition, the mnemonics in the
opcode table in alpha_sys.c are wrong as well as reversed.
This commit is contained in:
Bob Supnik 2017-05-27 14:30:05 -07:00 • committed by Mark Pizzolato
parent 86b8a7d5c1
commit 4053a6f481
2 changed files with 29 additions and 23 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

42
alpha/alpha_cpu.c
View file

@ -1,6 +1,6 @@
/* alpha_cpu.c: Alpha CPU simulator /* alpha_cpu.c: Alpha CPU simulator
Copyright (c) 2003-2006, Robert M Supnik Copyright (c) 2003-2017, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,10 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
27-May-2017 RMS Fixed MIN/MAXx4 iteration counts (Mark Pizzolato)
26-May-2017 RMS Fixed other reversed definitions in opcode 12
28-Apr-2017 RMS Fixed reversed definitions of INSQH, EXTQH (Maurice Marks)
Alpha architecturally-defined CPU state: Alpha architecturally-defined CPU state:
PC<63:0> program counter PC<63:0> program counter
@ -1069,46 +1073,46 @@ while (reason == 0) {
res = byte_zap (R[ra], 0x3 >> sc); res = byte_zap (R[ra], 0x3 >> sc);
break; break;
case 0x57: /* EXTWH */ case 0x57: /* INSWH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = (R[ra] << sc) & M16;
break;
case 0x5A: /* INSWH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F; sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = (R[ra] & M16) >> sc; res = (R[ra] & M16) >> sc;
break; break;
case 0x5A: /* EXTWH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = (R[ra] << sc) & M16;
break;
case 0x62: /* MSKLH */ case 0x62: /* MSKLH */
sc = 8 - (((uint32) rbv) & 7); sc = 8 - (((uint32) rbv) & 7);
res = byte_zap (R[ra], 0xF >> sc); res = byte_zap (R[ra], 0xF >> sc);
break; break;
case 0x67: /* EXTLH */ case 0x67: /* INSLH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = (R[ra] << sc) & M32;
break;
case 0x6A: /* INSLH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F; sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = (R[ra] & M32) >> sc; res = (R[ra] & M32) >> sc;
break; break;
case 0x6A: /* EXTLH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = (R[ra] << sc) & M32;
break;
case 0x72: /* MSKQH */ case 0x72: /* MSKQH */
sc = 8 - (((uint32) rbv) & 7); sc = 8 - (((uint32) rbv) & 7);
res = byte_zap (R[ra], 0xFF >> sc); res = byte_zap (R[ra], 0xFF >> sc);
break; break;
case 0x77: /* EXTQH */ case 0x77: /* INSQH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = R[ra] << sc;
break;
case 0x7A: /* INSQH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F; sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = R[ra] >> sc; res = R[ra] >> sc;
break; break;
case 0x7A: /* EXTQH */
sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
res = R[ra] << sc;
break;
default: default:
res = R[rc]; res = R[rc];
break; break;

10
alpha/alpha_sys.c
View file

@ -1,6 +1,6 @@
/* alpha_sys.c: Alpha simulator interface /* alpha_sys.c: Alpha simulator interface
Copyright (c) 2003-2006, Robert M Supnik Copyright (c) 2003-20017, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -22,6 +22,8 @@
Except as contained in this notice, the name of Robert M Supnik shall not be Except as contained in this notice, the name of Robert M Supnik shall not be
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
26-May-17 RMS Fixed bad mnemonics and reversed definitions in opcode 12
*/ */
#include "alpha_defs.h" #include "alpha_defs.h"
@ -198,9 +200,9 @@ const char *opcode[] = {
"MSKLL", "EXTLL", "INSLL", "MSKLL", "EXTLL", "INSLL",
"ZAP", "ZAPNOT", "MSKQL", "SRL", "ZAP", "ZAPNOT", "MSKQL", "SRL",
"EXTQL", "SLL", "INSQL", "SRA", "EXTQL", "SLL", "INSQL", "SRA",
"MSKWQ", "EXTWQ", "INSWQ", "MSKWH", "INSWH", "EXTWH",
"MSKLQ", "EXTLQ", "INSLQ", "MSKLH", "INSLH", "EXTLH",
"MSKQH", "EXTQH", "INSQH", "MSKQH", "INSQH", "EXTQH",
"MULL", "MULQ", "UMULH", "MULL", "MULQ", "UMULH",
"MULL/V", "MULLQ/V", "MULL/V", "MULLQ/V",
"ITOFS", "ITOFF", "ITOFT", "ITOFS", "ITOFF", "ITOFT",