parent
95c24b4f81
commit
4aa4f639e6
2 changed files with 7 additions and 5 deletions
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@ -349,13 +349,11 @@ int32 pcsr_rd (int32 pa)
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int32 data;
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int32 data;
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int32 ip_int = (ipir >> cur_cpu) & 0x1;
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int32 ip_int = (ipir >> cur_cpu) & 0x1;
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data = ka_pcsr[cur_cpu] | (rxcd_int << PCSR_V_CONINT) | (ip_int << PCSR_V_IPINT);
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data = ka_pcsr[cur_cpu] | (rxcd_int << PCSR_V_CONINT) | (ip_int << PCSR_V_IPINT);
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printf ("pcsr_rd: %08X\n", data);
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return data;
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return data;
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}
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}
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void pcsr_wr (int32 pa, int32 val, int32 lnt)
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void pcsr_wr (int32 pa, int32 val, int32 lnt)
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{
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{
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printf ("pcsr_wr: %08X\n", val);
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ka_pcsr[cur_cpu] &= ~(val & PCSR_W1C);
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ka_pcsr[cur_cpu] &= ~(val & PCSR_W1C);
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ka_pcsr[cur_cpu] &= ~(PCSR_WR) | (val & PCSR_WR);
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ka_pcsr[cur_cpu] &= ~(PCSR_WR) | (val & PCSR_WR);
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if (val & PCSR_CONCLR)
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if (val & PCSR_CONCLR)
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@ -50,12 +50,14 @@
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#define UBACSR_BDP 0x01000000 /* bad buffered datapath */
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#define UBACSR_BDP 0x01000000 /* bad buffered datapath */
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#define UBACSR_EIE 0x00100000 /* error interrupt en */
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#define UBACSR_EIE 0x00100000 /* error interrupt en */
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#define UBACSR_UPI 0x00020000 /* unibus power init */
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#define UBACSR_UPI 0x00020000 /* unibus power init */
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#define UBACSR_RD 0x00010000 /* register dump */
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#define UBACSR_DMP 0x00010000 /* register dump */
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#define UBACSR_ONE 0x00008000 /* must be one */
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#define UBACSR_MBO 0x00008000 /* must be one */
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#define UBACSR_IEN 0x000000FF /* internal error - NI */
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#define UBACSR_IEN 0x000000FF /* internal error - NI */
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#define UBACSR_WR (UBACSR_EIE)
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#define UBACSR_WR (UBACSR_EIE)
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#define UBACSR_W1C (UBACSR_BIF | UBACSR_TO | UBACSR_UIE | \
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#define UBACSR_W1C (UBACSR_BIF | UBACSR_TO | UBACSR_UIE | \
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UBACSR_IMR | UBACSR_BDP)
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UBACSR_IMR | UBACSR_BDP)
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#define UBACSR_ERRS (UBACSR_BIF | UBACSR_TO | UBACSR_UIE | \
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UBACSR_IMR | UBACSR_BDP)
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/* Vector offset register */
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/* Vector offset register */
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@ -318,7 +320,9 @@ switch (ofs) { /* case on offset */
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break;
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break;
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case UBACSR_OF: /* CSR */
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case UBACSR_OF: /* CSR */
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*val = uba_csr | UBACSR_ONE;
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*val = uba_csr | UBACSR_MBO;
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if (uba_csr & UBACSR_ERRS) /* any errors? */
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*val |= UBACSR_ERR; /* yes, set logical OR bit */
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break;
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break;
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case UBAVO_OF: /* VO */
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case UBAVO_OF: /* VO */
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