VAX750: Added VAX. 11.750 Boot ROM booting options

VAX 11/.750 Boot ROM code makes non-longword memory references to MassBus and Unibus register space.  Minor changes were necessary to allow this behavior which was architecturally undefined behavior, but had real code which depended on it.

Added a BOOTDEV option to the CPU to reflect the 4 position boot device selection switch on real VAX 11/750 hardware.

The UBA750 initial state started with the UBA map registers validly mapping the first 256KB of RAM to Unibus space.

Added simulated PCS/WCS memory which boot code on some operating systems (Ultrix and other BSD derived systems) automatically loaded on the VAX 11/750.  PCS/WCS was also automatically loaded by the newer versions of the BOOT ROMs.
This commit is contained in:
Mark Pizzolato 2015-09-10 21:42:16 -07:00
parent 176540f639
commit 4baecec0b1
18 changed files with 454 additions and 103 deletions

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@ -116,9 +116,9 @@ A remote console session will close when an EOF character is entered (i.e. ^D or
imbedded files are used if the normal boot file isn't found when the imbedded files are used if the normal boot file isn't found when the
simulator boots. Specific examples are: VAX (MicroVAX 3900 - ka655x.bin), simulator boots. Specific examples are: VAX (MicroVAX 3900 - ka655x.bin),
VAX8600 (VAX 8600 - vmb.exe), VAX780 (VAX 11/780 - vmb.exe), VAX8600 (VAX 8600 - vmb.exe), VAX780 (VAX 11/780 - vmb.exe),
VAX750 (VAX 11/750 - vmb.exe), VAX730 (VAX 11/730 - vmb.exe), VAX750 (VAX 11/750 - vmb.exe, ka750_old.bin, ka750_new.bin),
VAX610 (MicroVAX I - ka610.bin), VAX620 (rtVAX 1000 - ka620.bin), VAX730 (VAX 11/730 - vmb.exe), VAX610 (MicroVAX I - ka610.bin),
VAX630 (MicroVAX II - ka630.bin) VAX620 (rtVAX 1000 - ka620.bin), VAX630 (MicroVAX II - ka630.bin)
#### Control Flow #### Control Flow

BIN
VAX/ka750_new.bin Normal file

Binary file not shown.

BIN
VAX/ka750_old.bin Normal file

Binary file not shown.

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@ -164,6 +164,7 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define REG_M_OFS 0x7FF #define REG_M_OFS 0x7FF
#define REGSIZE (1u << REGAWIDTH) /* REG length */ #define REGSIZE (1u << REGAWIDTH) /* REG length */
#define REGBASE 0xF00000 /* REG addr base */ #define REGBASE 0xF00000 /* REG addr base */
#define NEXUSBASE REGBASE /* NEXUS addr base */
#define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \ #define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \
(((uint32) (x)) < (REGBASE + REGSIZE))) (((uint32) (x)) < (REGBASE + REGSIZE)))
#define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS) #define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS)

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@ -590,7 +590,7 @@ return "system bus controller";
t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc) t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc)
{ {
fprintf (st, "nexus=%d", val); fprintf (st, "nexus=%d, address=%X", val, NEXUSBASE + ((1 << REG_V_NEXUS) * val));
return SCPE_OK; return SCPE_OK;
} }

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@ -57,39 +57,35 @@
#define CMIERR_RM 0x00080000 #define CMIERR_RM 0x00080000
#define CMIERR_EN 0x00100000 #define CMIERR_EN 0x00100000
/* PCS Patch Address */
#define PCS_BITCNT 0x2000 /* Number of patchbits */
#define PCS_MICRONUM 0x400 /* Number of Microcode locations */
#define PCS_PATCHADDR 0xf00000 /* Beginning addr of patchbits */
#define PCS_PCSADDR 0x8000 /* offset to pcs */
#define PCS_PATCHENBIT 0xF0C000 /* Patch Enable register */
#define PCS_ENABLE 0xfff00000 /* enable pcs */
/* System registers */ /* System registers */
/* VAX-11/750 boot device definitions */
struct boot_dev {
char *name;
int32 code;
int32 let;
};
uint32 nexus_req[NEXUS_HLVL]; /* nexus int req */ uint32 nexus_req[NEXUS_HLVL]; /* nexus int req */
uint32 cmi_err = 0; uint32 cmi_err = 0;
uint32 cmi_cadr = 0; uint32 cmi_cadr = 0;
char cpu_boot_cmd[CBUFSIZE] = { 0 }; /* boot command */ char cpu_boot_cmd[CBUFSIZE] = { 0 }; /* boot command */
int32 sys_model = 0; int32 sys_model = 0;
int32 vax750_bootdev = 0; /* 0-A, 1-B, 2-C, 3-D */
uint32 pcspatchbit = 0;
uint32 vax750_wcsmem[16384];
static t_stat (*nexusR[NEXUS_NUM])(int32 *dat, int32 ad, int32 md); static t_stat (*nexusR[NEXUS_NUM])(int32 *dat, int32 ad, int32 md);
static t_stat (*nexusW[NEXUS_NUM])(int32 dat, int32 ad, int32 md); static t_stat (*nexusW[NEXUS_NUM])(int32 dat, int32 ad, int32 md);
static struct boot_dev boot_tab[] = {
{ "RP", BOOT_MB, 0 },
{ "HK", BOOT_HK, 0 },
{ "RL", BOOT_RL, 0 },
{ "RQ", BOOT_UDA, 1 << 24 },
{ "RQB", BOOT_UDA, 1 << 24 },
{ "RQC", BOOT_UDA, 1 << 24 },
{ "RQD", BOOT_UDA, 1 << 24 },
{ "TD", BOOT_TD, 0 },
{ NULL }
};
extern int32 R[16]; extern int32 R[16];
extern int32 PSL; extern int32 PSL;
extern uint32 rom[ROMSIZE/sizeof(uint32)]; /* boot ROM */
extern int32 ASTLVL, SISR; extern int32 ASTLVL, SISR;
extern int32 mapen, pme, trpirq; extern int32 mapen, pme, trpirq;
extern int32 in_ie; extern int32 in_ie;
@ -105,6 +101,8 @@ void cmi_set_tmo (void);
t_stat vax750_boot (int32 flag, char *ptr); t_stat vax750_boot (int32 flag, char *ptr);
t_stat vax750_boot_parse (int32 flag, char *ptr); t_stat vax750_boot_parse (int32 flag, char *ptr);
t_stat cpu_boot (int32 unitno, DEVICE *dptr); t_stat cpu_boot (int32 unitno, DEVICE *dptr);
t_stat vax750_set_bootdev (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat vax750_show_bootdev (FILE *st, UNIT *uptr, int32 val, void *desc);
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei); extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
extern int32 iccs_rd (void); extern int32 iccs_rd (void);
@ -133,6 +131,7 @@ extern t_stat build_ubus_tab (DEVICE *dptr, DIB *dibp);
extern void uba_eval_int (void); extern void uba_eval_int (void);
extern int32 uba_get_ubvector (int32 lvl); extern int32 uba_get_ubvector (int32 lvl);
extern void uba_ioreset (void); extern void uba_ioreset (void);
extern t_stat mctl_populate_rom (const char *rom_filename);
/* CMI data structures /* CMI data structures
@ -450,12 +449,19 @@ int32 ReadReg (uint32 pa, int32 lnt)
int32 nexus, val; int32 nexus, val;
if (ADDR_IS_REG (pa)) { /* reg space? */ if (ADDR_IS_REG (pa)) { /* reg space? */
nexus = NEXUS_GETNEX (pa); /* get nexus */ if (pa < NEXUSBASE) {
if (nexusR[nexus] && /* valid? */ val = (int32)vax750_wcsmem[((pa-REGBASE)>>2)];
(nexusR[nexus] (&val, pa, lnt) == SCPE_OK)) {
SET_IRQL; SET_IRQL;
return val; return val;
} }
else { /* Nexus register reference */
nexus = NEXUS_GETNEX (pa); /* get nexus */
if (nexusR[nexus] && /* valid? */
(nexusR[nexus] (&val, pa, lnt) == SCPE_OK)) {
SET_IRQL;
return val;
}
}
} }
cmi_set_tmo (); /* timeout */ cmi_set_tmo (); /* timeout */
MACH_CHECK (MCHK_BPE); /* machine check */ MACH_CHECK (MCHK_BPE); /* machine check */
@ -477,11 +483,25 @@ void WriteReg (uint32 pa, int32 val, int32 lnt)
int32 nexus; int32 nexus;
if (ADDR_IS_REG (pa)) { /* reg space? */ if (ADDR_IS_REG (pa)) { /* reg space? */
nexus = NEXUS_GETNEX (pa); /* get nexus */ if (pa < NEXUSBASE) {
if (nexusW[nexus] && /* valid? */ if (pa == PCS_PATCHENBIT) {
(nexusW[nexus] (val, pa, lnt) == SCPE_OK)) { pcspatchbit = val;
SET_IRQL; SET_IRQL;
return; return;
}
else {
vax750_wcsmem[((pa-REGBASE)>>2)] = val;
SET_IRQL;
return;
}
}
else { /* Nexus register reference */
nexus = NEXUS_GETNEX (pa); /* get nexus */
if (nexusW[nexus] && /* valid? */
(nexusW[nexus] (val, pa, lnt) == SCPE_OK)) {
SET_IRQL;
return;
}
} }
} }
cmi_set_tmo (); /* timeout */ cmi_set_tmo (); /* timeout */
@ -554,6 +574,41 @@ sim_printf ("Rebooting...\n");
return cc; return cc;
} }
#define BOOT_A 0
#define BOOT_B 1
#define BOOT_C 2
#define BOOT_D 3
/* VAX-11/750 boot device definitions */
struct boot_dev {
char *devname;
char *romdevalias;
char *bootcodefile;
int32 bootdev;
int32 code;
int32 let;
};
static struct boot_dev boot_tab[] = {
{ "RQB", "DUB", NULL, 0, BOOT_UDA, 1 << 24 }, /* DUBn */
{ "RQC", "DUC", NULL, 0, BOOT_UDA, 1 << 24 }, /* DUCn */
{ "RQD", "DUD", NULL, 0, BOOT_UDA, 1 << 24 }, /* DUDn */
{ "RQ", "DUA", "ka750_new.bin", BOOT_C, BOOT_UDA, 1 << 24 }, /* DUAn */
{ "RQ", "DU", "ka750_new.bin", BOOT_C, 0, 0 }, /* DUAn */
{ "RP", "DBA", "ka750_new.bin", BOOT_B, BOOT_MB, 0 }, /* DBAn */
{ "RP", "DB", "ka750_new.bin", BOOT_B, 0, 0 }, /* DBAn */
{ "RP", "DRA", "ka750_new.bin", BOOT_B, BOOT_MB, 0 }, /* DRAn */
{ "RP", "DR", "ka750_new.bin", BOOT_B, 0, 0 }, /* DRAn */
{ "HK", "DMA", "ka750_old.bin", BOOT_B, BOOT_HK, 0 }, /* DMAn */
{ "HK", "DM", "ka750_old.bin", BOOT_B, 0, 0 }, /* DMAn */
{ "RL", "DLA", "ka750_old.bin", BOOT_C, BOOT_RL, 0 }, /* DLAn */
{ "RL", "DL", "ka750_old.bin", BOOT_C, 0, 0 }, /* DLAn */
{ "TD", "DDA", "ka750_new.bin", BOOT_A, BOOT_TD, 0 }, /* DDAn */
{ "TD", "DD", "ka750_new.bin", BOOT_A, 0, 0 }, /* DDAn */
{ NULL }
};
/* Special boot command - linked into SCP by initial reset /* Special boot command - linked into SCP by initial reset
Syntax: BOOT <device>{/R5:val} Syntax: BOOT <device>{/R5:val}
@ -581,31 +636,26 @@ return run_cmd (flag, "CPU");
t_stat vax750_boot_parse (int32 flag, char *ptr) t_stat vax750_boot_parse (int32 flag, char *ptr)
{ {
char gbuf[CBUFSIZE]; char gbuf[CBUFSIZE], dbuf[CBUFSIZE], rbuf[CBUFSIZE];
char *slptr, *regptr; char *slptr, *regptr;
int32 i, r5v, unitno; int32 i, r5v, unitno;
DEVICE *dptr; DEVICE *dptr;
UNIT *uptr; UNIT *uptr;
DIB *dibp;
uint32 ba;
t_stat r; t_stat r;
if (!ptr || !*ptr) if (ptr && (*ptr == '/')) { /* handle "BOOT /R5:n DEV" format */
return SCPE_2FARG; ptr = get_glyph (ptr, rbuf, 0); /* get glyph */
regptr = get_glyph (ptr, gbuf, 0); /* get glyph */ regptr = rbuf;
if ((slptr = strchr (gbuf, '/'))) { /* found slash? */ ptr = get_glyph (ptr, gbuf, 0); /* get glyph */
regptr = strchr (ptr, '/'); /* locate orig */
*slptr = 0; /* zero in string */
} }
dptr = find_unit (gbuf, &uptr); /* find device */ else { /* handle "BOOT DEV /R5:n" format */
if ((dptr == NULL) || (uptr == NULL)) regptr = get_glyph (ptr, gbuf, 0); /* get glyph */
return SCPE_ARG; if ((slptr = strchr (gbuf, '/'))) { /* found slash? */
dibp = (DIB *) dptr->ctxt; /* get DIB */ regptr = strchr (ptr, '/'); /* locate orig */
if (dibp == NULL) *slptr = 0; /* zero in string */
ba = 0; }
else }
ba = dibp->ba; /* parse R5 parameter value */
unitno = (int32) (uptr - dptr->units);
r5v = 0; r5v = 0;
if ((strncmp (regptr, "/R5:", 4) == 0) || if ((strncmp (regptr, "/R5:", 4) == 0) ||
(strncmp (regptr, "/R5=", 4) == 0) || (strncmp (regptr, "/R5=", 4) == 0) ||
@ -615,33 +665,84 @@ if ((strncmp (regptr, "/R5:", 4) == 0) ||
if (r != SCPE_OK) if (r != SCPE_OK)
return r; return r;
} }
else else if (*regptr == '/') {
if (*regptr == '/') { r5v = (int32) get_uint (regptr + 1, 16, LMASK, &r);
r5v = (int32) get_uint (regptr + 1, 16, LMASK, &r); if (r != SCPE_OK)
if (r != SCPE_OK) return r;
return r; }
} else if (*regptr != 0)
else { return SCPE_ARG;
if (*regptr != 0) if (gbuf[0]) {
return SCPE_ARG; unitno = -1;
} for (i = 0; boot_tab[i].devname != NULL; i++) {
for (i = 0; boot_tab[i].name != NULL; i++) { /* ROM device name specified use ROM to boot */
if (strcmp (dptr->name, boot_tab[i].name) == 0) { if (memcmp (gbuf, boot_tab[i].romdevalias, strlen(boot_tab[i].romdevalias)) == 0) {
R[0] = boot_tab[i].code; if (memcmp (gbuf, ((char *)rom) + (0x100 * boot_tab[i].bootdev), 2)) {
if (dptr->flags & DEV_MBUS) { r = mctl_populate_rom (boot_tab[i].bootcodefile);
R[1] = (NEXUSBASE + (TR_MBA0 * NEXUSSIZE)); if (r != SCPE_OK)
R[2] = unitno; return r;
vax750_bootdev = boot_tab[i].bootdev;
}
sprintf(dbuf, "%s%s", boot_tab[i].devname, gbuf + strlen(boot_tab[i].romdevalias));
dptr = find_unit (dbuf, &uptr);
if ((dptr == NULL) || (uptr == NULL))
return SCPE_ARG;
unitno = (int32) (uptr - dptr->units);
/* Page 2-16 of VAX750 Student Training suggests the following register state: */
R[1] = (NEXUSBASE + (TR_MBA0 * (1 << REG_V_NEXUS))); /* MBA Address */
R[2] = IOPAGEBASE; /* UBA I/O Page Address */
R[3] = unitno; /* Boot Device Unit Number */
R[5] = r5v; /* Boot Flags */
SP = 0x200;
PC = 0xFA02 + 0x100*vax750_bootdev;
} }
else { /* SCP device name specified use VMB to boot */
R[1] = ba; if ((unitno == -1) &&
R[2] = (ba & UBADDRMASK); (memcmp (gbuf, boot_tab[i].devname, strlen(boot_tab[i].devname)) == 0)) {
DIB *dibp;
uint32 ba;
sprintf(dbuf, "%s%s", boot_tab[i].devname, gbuf + strlen(boot_tab[i].devname));
dptr = find_unit (dbuf, &uptr);
if ((dptr == NULL) || (uptr == NULL))
return SCPE_ARG;
unitno = (int32) (uptr - dptr->units);
dibp = (DIB *) dptr->ctxt; /* get DIB */
if (dibp == NULL)
ba = 0;
else
ba = dibp->ba;
R[0] = boot_tab[i].code;
if (dptr->flags & DEV_MBUS) {
R[1] = (NEXUSBASE + (TR_MBA0 * (1 << REG_V_NEXUS)));
R[2] = unitno;
}
else {
R[1] = ba;
R[2] = (ba & UBADDRMASK);
}
R[3] = unitno;
R[4] = 0;
R[5] = r5v;
PC = SP = 0x200;
} }
R[3] = unitno; if (unitno == -1)
R[4] = 0; continue;
R[5] = r5v;
return SCPE_OK; return SCPE_OK;
} }
} }
else {
/* Page 2-16 of VAX750 Student Training suggests the following register state: */
unitno = 0;
R[0] = 0;
R[1] = (NEXUSBASE + (TR_MBA0 * (1 << REG_V_NEXUS))); /* MBA Address */
R[2] = IOPAGEBASE; /* UBA I/O Page Address */
R[3] = unitno; /* Boot Device Unit Number */
R[5] = r5v; /* Boot Flags */
SP = 0x200;
PC = 0xFA02 + 0x100*vax750_bootdev;
return SCPE_OK;
}
return SCPE_NOFNC; return SCPE_NOFNC;
} }
@ -651,13 +752,33 @@ t_stat cpu_boot (int32 unitno, DEVICE *dptr)
{ {
t_stat r; t_stat r;
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, FALSE, 0x200); if (PC == 0x200) { /* Use VMB directly to boot */
if (r != SCPE_OK) r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, FALSE, 0x200);
return r; if (r != SCPE_OK)
SP = PC = 512; return r;
}
else /* Boot ROM boot */
memcpy (&M[0xFA00>>2], rom, ROMSIZE);
return SCPE_OK; return SCPE_OK;
} }
t_stat vax750_set_bootdev (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if ((!cptr) || (!*cptr || (*cptr < 'A') || (*cptr > 'D')))
return SCPE_ARG;
vax750_bootdev = *cptr - 'A';
return SCPE_OK;
}
t_stat vax750_show_bootdev (FILE *st, UNIT *uptr, int32 val, void *desc)
{
fprintf(st, "bootdev=%c", 'A' + vax750_bootdev);
if (*((char *)rom) + (0x100 * vax750_bootdev))
fprintf(st, "(%c%cA0)", *(((char *)rom) + (0x100 * vax750_bootdev) + 1), *(((char *)rom) + (0x100 * vax750_bootdev)));
return SCPE_OK;
}
/* CMI reset */ /* CMI reset */
t_stat cmi_reset (DEVICE *dptr) t_stat cmi_reset (DEVICE *dptr)
@ -677,7 +798,7 @@ return "CPU/Memory interconnect";
t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc) t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc)
{ {
fprintf (st, "nexus=%d", val); fprintf (st, "nexus=%d, address=%X", val, NEXUSBASE + ((1 << REG_V_NEXUS) * val));
return SCPE_OK; return SCPE_OK;
} }
@ -770,7 +891,24 @@ t_stat cpu_model_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const cha
fprintf (st, "Initial memory size is 2MB.\n\n"); fprintf (st, "Initial memory size is 2MB.\n\n");
fprintf (st, "The simulator is booted with the BOOT command:\n\n"); fprintf (st, "The simulator is booted with the BOOT command:\n\n");
fprintf (st, " sim> BO{OT} <device>{/R5:flags}\n\n"); fprintf (st, " sim> BO{OT} <device>{/R5:flags}\n\n");
fprintf (st, "where <device> is one of:\n\n"); fprintf (st, "if <device> specifies a simh device name, VMB will be loaded and used to\n");
fprintf (st, "to start the system.\n");
fprintf (st, "If <device> specifies a traditional VAX 750 Console Device name the Console\n");
fprintf (st, "Boot ROM Boot Block Boot will be used to start the system.\n");
fprintf (st, "Boot ROM <device> names are one of:\n\n");
fprintf (st, " DUAn to boot from rqn\n");
fprintf (st, " DUn to boot from rqn\n");
fprintf (st, " DBAn to boot from rpn\n");
fprintf (st, " DBn to boot from rpn\n");
fprintf (st, " DRAn to boot from rpn\n");
fprintf (st, " DRn to boot from rpn\n");
fprintf (st, " DMAn to boot from hkn\n");
fprintf (st, " DMn to boot from hkn\n");
fprintf (st, " DLAn to boot from rln\n");
fprintf (st, " DLn to boot from rln\n");
fprintf (st, " DDAn to boot from td (TU58)\n");
fprintf (st, " DDn to boot from td (TU58)\n\n");
fprintf (st, "VMB boot <device> names are one of:\n\n");
fprintf (st, " RPn to boot from rpn\n"); fprintf (st, " RPn to boot from rpn\n");
fprintf (st, " HKn to boot from hkn\n"); fprintf (st, " HKn to boot from hkn\n");
fprintf (st, " RLn to boot from rln\n"); fprintf (st, " RLn to boot from rln\n");
@ -778,7 +916,6 @@ fprintf (st, " RQn to boot from rqn\n");
fprintf (st, " RQBn to boot from rqbn\n"); fprintf (st, " RQBn to boot from rqbn\n");
fprintf (st, " RQCn to boot from rqcn\n"); fprintf (st, " RQCn to boot from rqcn\n");
fprintf (st, " RQDn to boot from rqdn\n"); fprintf (st, " RQDn to boot from rqdn\n");
fprintf (st, " TQn to boot from tqn\n");
fprintf (st, " TDn to boot from tdn (TU58)\n\n"); fprintf (st, " TDn to boot from tdn (TU58)\n\n");
return SCPE_OK; return SCPE_OK;
} }

View file

@ -157,9 +157,13 @@
{ UNIT_MSIZE, (1u << 23) + (7u << 20), NULL, "15M", &cpu_set_size, NULL, NULL, "Set Memory to 15M bytes" }, \ { UNIT_MSIZE, (1u << 23) + (7u << 20), NULL, "15M", &cpu_set_size, NULL, NULL, "Set Memory to 15M bytes" }, \
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" } { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc); extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS \ #define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \ NULL, &cpu_show_model, NULL, "Display the simulator CPU Model" }, \
NULL, &cpu_show_model, NULL, "Display the simulator CPU Model" } { MTAB_XTD|MTAB_VDV, 0, "BOOTDEV", "BOOTDEV={A|B|C|D}", \
&vax750_set_bootdev, &vax750_show_bootdev, NULL, "Set Boot Device" }
extern t_stat vax750_set_bootdev (UNIT *uptr, int32 val, char *cptr, void *desc);
extern t_stat vax750_show_bootdev (FILE *st, UNIT *uptr, int32 val, void *desc);
/* Unibus I/O registers */ /* Unibus I/O registers */
@ -187,15 +191,15 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \ #define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \
(((uint32) (x)) < (REGBASE + REGSIZE))) (((uint32) (x)) < (REGBASE + REGSIZE)))
#define NEXUSBASE (REGBASE + 0x20000) #define NEXUSBASE (REGBASE + 0x20000)
#define NEXUSSIZE 0x2000
#define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS) #define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS)
#define NEXUS_GETOFS(x) (((x) >> REG_V_OFS) & REG_M_OFS) #define NEXUS_GETOFS(x) (((x) >> REG_V_OFS) & REG_M_OFS)
/* ROM address space in memory controllers */ /* ROM address space in memory controllers */
#define ROMAWIDTH 12 /* ROM addr width */ #define ROMAWIDTH 10 /* ROM addr width */
#define ROMSIZE (1u << ROMAWIDTH) /* ROM size */ #define ROMSIZE (1u << ROMAWIDTH) /* ROM size */
#define ROMBASE (REGBASE + (TR_MCTL << REG_V_NEXUS) + 0x400) #define ROMAMASK (ROMSIZE - 1) /* ROM addr mask */
#define ROMBASE (NEXUSBASE + 0x400)
#define ADDR_IS_ROM(x) ((((uint32) (x)) >= ROMBASE) && \ #define ADDR_IS_ROM(x) ((((uint32) (x)) >= ROMBASE) && \
(((uint32) (x)) < (ROMBASE + ROMSIZE))) (((uint32) (x)) < (ROMBASE + ROMSIZE)))

View file

@ -30,6 +30,14 @@
#include "vax_defs.h" #include "vax_defs.h"
#ifndef DONT_USE_INTERNAL_ROM
#include "vax_ka750_bin_old.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#undef BOOT_CODE_FILENAME
#undef BOOT_CODE_SIZE
#undef BOOT_CODE_ARRAY
#include "vax_ka750_bin_new.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif /* DONT_USE_INTERNAL_ROM */
/* Memory adapter register 0 */ /* Memory adapter register 0 */
#define MCSR0_OF 0x00 #define MCSR0_OF 0x00
@ -88,6 +96,8 @@ uint32 mcsr0 = 0;
uint32 mcsr1 = 0; uint32 mcsr1 = 0;
uint32 mcsr2 = 0; uint32 mcsr2 = 0;
uint32 rom[ROMSIZE/sizeof(uint32)]; /* boot ROM */
t_stat mctl_reset (DEVICE *dptr); t_stat mctl_reset (DEVICE *dptr);
const char *mctl_description (DEVICE *dptr); const char *mctl_description (DEVICE *dptr);
t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode); t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
@ -108,6 +118,7 @@ REG mctl_reg[] = {
{ HRDATAD (CSR0, mcsr0, 32, "ECC syndrome bits") }, { HRDATAD (CSR0, mcsr0, 32, "ECC syndrome bits") },
{ HRDATAD (CSR1, mcsr1, 32, "CPU error control/check bits") }, { HRDATAD (CSR1, mcsr1, 32, "CPU error control/check bits") },
{ HRDATAD (CSR2, mcsr2, 32, "Memory Configuration") }, { HRDATAD (CSR2, mcsr2, 32, "Memory Configuration") },
{ BRDATAD (ROM, rom, 16, 32, 256, "Bootstrap ROM") },
{ NULL } { NULL }
}; };
@ -159,7 +170,7 @@ switch (ofs) { /* case on offset */
} }
if (DEBUG_PRI (mctl_dev, MCTL_DEB_RRD)) if (DEBUG_PRI (mctl_dev, MCTL_DEB_RRD))
fprintf (sim_deb, ">>MCTL: reg %d read, value = %X\n", ofs, *val); fprintf (sim_deb, ">>MCTL: reg %d(%x) read, value = %X\n", ofs, pa, *val);
return SCPE_OK; return SCPE_OK;
} }
@ -190,7 +201,7 @@ switch (ofs) { /* case on offset */
} }
if (DEBUG_PRI (mctl_dev, MCTL_DEB_RWR)) if (DEBUG_PRI (mctl_dev, MCTL_DEB_RWR))
fprintf (sim_deb, ">>MCTL: reg %d write, value = %X\n", ofs, val); fprintf (sim_deb, ">>MCTL: reg %d(%x) write, value = %X\n", ofs, pa, val);
return SCPE_OK; return SCPE_OK;
} }
@ -199,6 +210,10 @@ return SCPE_OK;
void rom_wr_B (int32 pa, int32 val) void rom_wr_B (int32 pa, int32 val)
{ {
int32 rg = ((pa - ROMBASE) & ROMAMASK) >> 2;
int32 sc = (pa & 3) << 3;
rom[rg] = ((val & 0xFF) << sc) | (rom[rg] & ~(0xFF << sc));
return; return;
} }
@ -227,6 +242,18 @@ mcsr2 = MCSR2_INIT | (boards & board_mask) | ((large_slot_size == MEM_SIZE_256K)
return SCPE_OK; return SCPE_OK;
} }
t_stat mctl_populate_rom (const char *rom_filename)
{
#ifdef DONT_USE_INTERNAL_ROM
return cpu_load_bootcode (rom_filename, NULL, sizeof (rom), TRUE, 0);
#else
if (strcmp (rom_filename, "ka750_new.bin") == 0)
return cpu_load_bootcode ("ka750_new.bin", vax_ka750_bin_new, BOOT_CODE_SIZE, TRUE, 0);
else
return cpu_load_bootcode ("ka750_old.bin", vax_ka750_bin_old, BOOT_CODE_SIZE, TRUE, 0);
#endif
}
const char *mctl_description (DEVICE *dptr) const char *mctl_description (DEVICE *dptr)
{ {
return "Memory controller"; return "Memory controller";

View file

@ -56,8 +56,9 @@ extern DEVICE vh_dev;
extern DEVICE xu_dev, xub_dev; extern DEVICE xu_dev, xub_dev;
extern DEVICE dmc_dev; extern DEVICE dmc_dev;
extern UNIT cpu_unit;
extern void WriteB (uint32 pa, int32 val); extern void WriteB (uint32 pa, int32 val);
extern void rom_wr_B (int32 pa, int32 val);
extern UNIT cpu_unit;
DEVICE *sim_devices[] = { DEVICE *sim_devices[] = {
&cpu_dev, &cpu_dev,
@ -112,16 +113,24 @@ if (flag) /* dump? */
return SCPE_ARG; return SCPE_ARG;
origin = 0; /* memory */ origin = 0; /* memory */
limit = (uint32) cpu_unit.capac; limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */ if (sim_switches & SWMASK ('R')) { /* ROM? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r); origin = ROMBASE;
if (r != SCPE_OK) limit = ROMBASE + ROMSIZE;
return SCPE_ARG;
} }
else
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
while ((val = getc (fileref)) != EOF) { /* read byte stream */ while ((val = getc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */ if (origin >= limit) /* NXM? */
return SCPE_NXM; return SCPE_NXM;
WriteB (origin, val); /* memory */ if (sim_switches & SWMASK ('R')) /* ROM? */
rom_wr_B (origin, val); /* not writeable */
else
WriteB (origin, val); /* store byte */
origin = origin + 1; origin = origin + 1;
} }
return SCPE_OK; return SCPE_OK;

View file

@ -393,10 +393,10 @@ void WriteIO (uint32 pa, int32 val, int32 lnt)
{ {
if (lnt == L_BYTE) /* byte? DATOB */ if (lnt == L_BYTE) /* byte? DATOB */
WriteUb (pa, val, WRITEB); WriteUb (pa, val, WRITEB);
else if ((lnt == L_WORD) && ((pa & 1) == 0)) /* aligned word? */ else if (((lnt == L_WORD) || (lnt == L_LONG)) && ((pa & 1) == 0))/* aligned word? */
WriteUb (pa, val, WRITE); /* DATO */ WriteUb (pa, val, WRITE); /* DATO */
else { else {
sim_printf (">>UBA: invalid write mask, pa = %x, lnt = %d\n", pa, lnt); sim_printf (">>UBA: invalid write mask, pa = %x, lnt = %d, val = 0x%x\n", pa, lnt, val);
/* FIXME: set appropriate error bits */ /* FIXME: set appropriate error bits */
} }
SET_IRQL; /* update ints */ SET_IRQL; /* update ints */
@ -659,7 +659,7 @@ for (i = 0; i < IPL_HLVL; i++) {
int_req[i] = 0; int_req[i] = 0;
} }
for (i = 0; i < UBA_NMAPR; i++) for (i = 0; i < UBA_NMAPR; i++)
uba_map[i] = 0; uba_map[i] = UBAMAP_VLD|i;
uba_csr1 = 0; uba_csr1 = 0;
uba_csr2 = 0; uba_csr2 = 0;
uba_csr3 = 0; uba_csr3 = 0;

View file

@ -200,6 +200,7 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define REG_M_OFS 0x7FF #define REG_M_OFS 0x7FF
#define REGSIZE (1u << REGAWIDTH) /* REG length */ #define REGSIZE (1u << REGAWIDTH) /* REG length */
#define REGBASE 0x20000000 /* REG addr base */ #define REGBASE 0x20000000 /* REG addr base */
#define NEXUSBASE REGBASE /* NEXUS addr base */
#define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \ #define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \
(((uint32) (x)) < (REGBASE + REGSIZE))) (((uint32) (x)) < (REGBASE + REGSIZE)))
#define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS) #define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS)

View file

@ -751,7 +751,7 @@ return "Synchronous Backplane Interconnect";
t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc) t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc)
{ {
fprintf (st, "nexus=%d", val); fprintf (st, "nexus=%d, address=%X", val, NEXUSBASE + ((1 << REG_V_NEXUS) * val));
return SCPE_OK; return SCPE_OK;
} }

View file

@ -365,13 +365,19 @@ uint32 t;
t_stat r; t_stat r;
mb = NEXUS_GETNEX (pa) - TR_MBA0; /* get MBA */ mb = NEXUS_GETNEX (pa) - TR_MBA0; /* get MBA */
/*
The VAX 750 Boot ROMs have code which makes Non longword references
to MassBus register space. This code works on real hardware so even
though such references had potentially undefined behavior, in the
interest of closely modeling how hardware works we tolerate it here,
*/
#if !defined(VAX_750)
if ((pa & 3) || (lnt != L_LONG)) { /* unaligned or not lw? */ if ((pa & 3) || (lnt != L_LONG)) { /* unaligned or not lw? */
sim_printf (">>MBA%d: invalid adapter read mask, pa = 0x%X, lnt = %d\r\n", mb, pa, lnt); sim_printf (">>MBA%d: invalid adapter read mask, pa = 0x%X, lnt = %d\r\n", mb, pa, lnt);
#if defined(VAX_780)
sbi_set_errcnf (); /* err confirmation */ sbi_set_errcnf (); /* err confirmation */
#endif
return SCPE_OK; return SCPE_OK;
} }
#endif
if (mb >= MBA_NUM) /* valid? */ if (mb >= MBA_NUM) /* valid? */
return SCPE_NXM; return SCPE_NXM;
rtype = MBA_RTYPE (pa); /* get reg type */ rtype = MBA_RTYPE (pa); /* get reg type */

View file

@ -223,6 +223,7 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define REG_M_OFS 0x7FF #define REG_M_OFS 0x7FF
#define REGSIZE (1u << REGAWIDTH) /* REG length */ #define REGSIZE (1u << REGAWIDTH) /* REG length */
#define REGBASE 0x20000000 /* REG addr base */ #define REGBASE 0x20000000 /* REG addr base */
#define NEXUSBASE REGBASE /* NEXUS addr base */
#define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \ #define ADDR_IS_REG(x) ((((uint32) (x)) >= REGBASE) && \
(((uint32) (x)) < (REGBASE + REGSIZE))) (((uint32) (x)) < (REGBASE + REGSIZE)))
#define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS) #define NEXUS_GETNEX(x) (((x) >> REG_V_NEXUS) & REG_M_NEXUS)

View file

@ -311,7 +311,7 @@ return "SBI adapter";
t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc) t_stat show_nexus (FILE *st, UNIT *uptr, int32 val, void *desc)
{ {
fprintf (st, "nexus=%d", val); fprintf (st, "nexus=%d, address=%X", val, NEXUSBASE + ((1 << REG_V_NEXUS) * val));
return SCPE_OK; return SCPE_OK;
} }

80
VAX/vax_ka750_bin_new.h Normal file
View file

@ -0,0 +1,80 @@
#ifndef ROM_vax_ka750_bin_new_H
#define ROM_vax_ka750_bin_new_H 0
/*
VAX/vax_ka750_bin_new.h produced at Thu Aug 06 09:27:12 2015
from VAX/ka750_new.bin which was last modified at Tue Jul 28 12:12:03 2015
file size: 1024 (0x400) - checksum: 0xFFFE7BE5
This file is a generated file and should NOT be edited or changed by hand.
From ROM set: E40A9, E41A9, E42A9, E43A9 (Boots: A=DD, B=DB, C=DU
*/
#define BOOT_CODE_SIZE 0x400
#define BOOT_CODE_FILENAME "ka750_new.bin"
#define BOOT_CODE_ARRAY vax_ka750_bin_new
unsigned char vax_ka750_bin_new[] = {
0x44,0x44,0xC3,0x8F,0x00,0x02,0x00,0x00,0x5E,0x57,0xBB,0x3F,0x30,0xF4,0x02,0xBA,
0x3F,0xD4,0x54,0x9E,0xCE,0x00,0x01,0x5E,0xBB,0x8F,0x06,0x01,0x9F,0xCE,0x0C,0xFD,
0xDA,0x01,0x1E,0xD4,0x52,0x10,0x45,0xB0,0x8F,0x04,0x04,0x52,0x10,0x3E,0xD0,0x10,
0x52,0x10,0x47,0xDB,0x1D,0x52,0x10,0x4F,0xD1,0x10,0x52,0x13,0x01,0x00,0xE8,0x54,
0x1C,0xD4,0x58,0x9E,0xAF,0x72,0x56,0x16,0x66,0xE9,0x50,0xF1,0x9A,0x8F,0x40,0x6E,
0xBA,0x8F,0x07,0x01,0x9E,0xCE,0x00,0xFF,0x5E,0x17,0xCE,0x0C,0xFE,0x05,0x02,0x0A,
0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0xA0,0x52,0xAF,0xFA,
0xD8,0x00,0xAF,0xF6,0x10,0x04,0x9C,0x18,0x52,0x52,0xDB,0x1E,0x51,0xE1,0x07,0x51,
0xF9,0xDA,0x52,0x1F,0x05,0xD4,0x51,0xDB,0x1C,0x52,0xE1,0x07,0x52,0xF9,0xDB,0x1D,
0x52,0x18,0x02,0xD4,0x50,0x80,0x52,0x51,0xD8,0x00,0x51,0x05,0x10,0xE9,0x9A,0x52,
0x54,0x10,0xE4,0x90,0x52,0x85,0xF5,0x54,0xF8,0x90,0x51,0x54,0x10,0xD7,0x10,0xD7,
0x91,0x51,0x54,0x13,0x02,0xD4,0x50,0x05,0xBB,0x36,0xD0,0x01,0x50,0x90,0x53,0xAF,
0xA1,0xB0,0x58,0xAF,0xA3,0x9E,0xAF,0x96,0x55,0xB4,0xAF,0x9E,0xD0,0x07,0x54,0xB0,
0x85,0x52,0x10,0x98,0xF5,0x54,0xF8,0xD0,0xAE,0x14,0x55,0x10,0xA8,0xF5,0x52,0x04,
0x10,0xBA,0x11,0xF7,0xF5,0x52,0x13,0x9E,0xAE,0xE4,0x55,0x10,0xAF,0x95,0xA5,0xF7,
0x19,0x08,0xB1,0x8F,0x00,0x02,0xA5,0xFC,0x13,0x02,0xD4,0x50,0xBA,0x36,0x05,0xB2,
0x42,0x44,0xC3,0x8F,0x00,0x02,0x00,0x00,0x5E,0x57,0xBB,0x3F,0x16,0xE7,0x03,0xFD,
0x00,0x00,0xBA,0x3F,0x10,0x33,0xD6,0xA1,0x04,0xD4,0x58,0xC0,0x30,0x5E,0x10,0x48,
0xD4,0x50,0xD0,0x53,0x52,0x9E,0xEF,0x0B,0x00,0x00,0x00,0x56,0xC2,0x30,0x5E,0xB5,
0x59,0x12,0xE1,0x17,0xA7,0x0C,0xD0,0xAE,0x04,0x57,0x10,0x0D,0x10,0x2A,0xB5,0x59,
0x13,0x03,0xD4,0x50,0x05,0x9A,0x01,0x50,0x05,0x78,0x07,0x53,0x50,0xC0,0x51,0x50,
0xA0,0x8F,0x00,0x04,0x50,0x05,0xCB,0x8F,0xFF,0xFF,0x71,0xFF,0xA1,0x08,0x59,0x13,
0x01,0x00,0xE1,0x07,0xA0,0x04,0xEF,0x05,0x10,0xEC,0x9A,0x13,0x60,0x10,0xE7,0xC8,
0x8F,0x00,0x10,0x00,0x00,0xA0,0x24,0xEF,0x09,0x0F,0x57,0xC1,0x00,0x08,0xC8,0x8F,
0x00,0x00,0x00,0x80,0xC1,0x00,0x08,0xEF,0x00,0x09,0x57,0xA1,0x0C,0xCE,0x8F,0x00,
0x02,0x00,0x00,0xA1,0x10,0xBB,0x0F,0x3A,0xA0,0x18,0x08,0xEF,0x3A,0x00,0x00,0x00,
0x12,0x01,0x00,0x98,0xA1,0x08,0x53,0x98,0xA1,0x10,0x52,0xC4,0x53,0x52,0xC1,0x6E,
0x28,0x50,0x7B,0x52,0x58,0x60,0x58,0x7B,0x53,0x58,0x59,0x58,0xBA,0x0F,0x78,0x08,
0x59,0xA0,0x14,0xC0,0x58,0xA0,0x14,0x9A,0x39,0x60,0xE0,0x1F,0xA1,0x08,0xFB,0xAB,
0x8F,0x00,0x20,0xA1,0x08,0x59,0xD6,0xA1,0x04,0x05,0x10,0x11,0x12,0x14,0x15,0x16,
0x17,0x22,0x16,0x16,0x16,0x20,0x20,0x1F,0x20,0x32,0x13,0x13,0x13,0x05,0x05,0x0E,
0x13,0x48,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x96,
0x55,0x44,0xC3,0x8F,0x00,0x02,0x00,0x00,0x5E,0x57,0xBB,0x3F,0x16,0xE7,0x03,0xFD,
0x00,0x00,0xBA,0x3F,0xC0,0xAF,0x6C,0x5E,0xC1,0x8F,0x00,0xFA,0x00,0x00,0x57,0x54,
0x9E,0xAF,0xDD,0x51,0xD1,0x51,0x54,0x12,0x09,0xC0,0xAF,0x57,0x54,0xC0,0xAF,0x53,
0xAF,0x57,0xBB,0x20,0xD0,0x52,0x51,0xC0,0x8F,0x68,0x14,0x00,0x00,0x52,0xD0,0x04,
0x56,0xF5,0x56,0x01,0x00,0xB4,0x62,0xD0,0x0B,0x55,0x9E,0xAF,0x3A,0x58,0xB0,0xA2,
0x02,0x59,0x19,0xED,0xE1,0x55,0x59,0xF6,0xB0,0x88,0xA2,0x02,0xF3,0x0E,0x55,0xEE,
0xD4,0x55,0xD4,0x58,0xDD,0x57,0x10,0x27,0xE8,0x50,0x04,0xF5,0x56,0xD7,0x00,0xC0,
0x04,0x5E,0x9E,0xAF,0x1A,0x56,0xD0,0x11,0x50,0xBA,0x20,0xC2,0xAF,0x05,0x5E,0x17,
0xCE,0x0C,0xFE,0x00,0x01,0x00,0x00,0x00,0x80,0x04,0xFA,0x00,0x00,0x01,0x00,0xC3,
0x55,0xAE,0x04,0x57,0xC0,0xAF,0xF2,0x57,0x10,0x40,0xB0,0x04,0xA7,0x48,0xB5,0x62,
0xD5,0x67,0x19,0xFC,0x95,0xA7,0x16,0x12,0x30,0x10,0x2F,0xB0,0x09,0xA7,0x48,0xB5,
0x62,0xD5,0x67,0x19,0xFC,0x95,0xA7,0x16,0x12,0x1F,0x10,0x1E,0xB0,0x21,0xA7,0x48,
0xD0,0x58,0xA7,0x5C,0xD0,0x55,0xA7,0x50,0xD0,0x02,0xA7,0x4D,0xB5,0x62,0xD5,0x67,
0x19,0xFC,0x95,0xA7,0x16,0x12,0x02,0xD6,0x50,0x05,0xD0,0x57,0x59,0xD0,0x0E,0x50,
0x7C,0x89,0xF5,0x50,0xFB,0xB0,0x24,0xA7,0x3C,0xB0,0x53,0xA7,0x44,0xC1,0x8F,0x0C,
0x00,0x00,0x80,0x57,0x67,0xC1,0x8F,0x40,0x00,0x00,0x80,0x57,0xA7,0x04,0x05,0x2E,
0x53,0x43,0x00,0x9A,0x8F,0x40,0x5A,0xDA,0x5A,0x23,0xD0,0x01,0x54,0x30,0x10,0xFD,
0xDD,0x8F,0x05,0x23,0x00,0x00,0xDD,0x8F,0x8B,0x64,0x5C,0x4D,0xD0,0x06,0x55,0x9E,
0xE7,0x00,0xF6,0x00,0x00,0x7E,0xDD,0x55,0xDD,0x02,0xFA,0x6E,0xCF,0xB9,0x00,0xE8,
0x50,0x03,0x31,0x82,0x00,0xD6,0xAE,0x04,0xA0,0x8F,0x00,0x02,0xAE,0x08,0xFA,0x6E,
0xCF,0xA5,0x00,0xA0,0x0C,0x5E,0xE8,0x50,0x02,0x11,0x6C,0x9E,0xE7,0x00,0xF6,0x00,
0x00,0x51,0x9E,0xA1,0x0A,0x52,0x3C,0xA1,0x06,0x53,0xC0,0x0E,0x53,0x3C,0xA1,0x08,
0x54,0xEF,0x00,0x04,0xA2,0x01,0x56,0xD1,0x56,0x08,0x13,0x6A,0xD1,0x56,0x01,0x13,
0x59,0xD1,0x56,0x02,0x13,0x54,0xD1,0x56,0x04,0x12,0x3C,0xD1,0xA2,0x02,0x6E,0x12,
0x49,0xB1,0xA2,0x06,0xAE,0x04,0x12,0x42,0x3C,0xA2,0x08,0x56,0x9E,0xC7,0x00,0x02,
0x7E,0xDD,0x54,0xDD,0x02,0xFA,0x6E,0xCF,0x4E,0x00,0xE8,0x50,0x02,0x11,0x18,0xD7,
0x56,0xD1,0x56,0x00,0x13,0x1D,0xD6,0xAE,0x04,0xA0,0x8F,0x00,0x02,0xAE,0x08,0xFA,
0x6E,0xCF,0x34,0x00,0xE8,0x50,0xE8,0x9A,0x3F,0x5A,0xDA,0x5A,0x23,0x9E,0xC7,0xE4,
0x01,0x5E,0x05,0x9E,0xC7,0x00,0x02,0x55,0x17,0x65,0x3C,0xA2,0x08,0x56,0xC0,0x56,
0x54,0xC0,0x53,0x52,0x11,0x8B,0x3C,0xA1,0x02,0x55,0x13,0xDB,0xD7,0x55,0x78,0x01,
0x55,0x55,0xC0,0x06,0x55,0x31,0x37,0xFF,0x00,0x00,0xD4,0x53,0xD0,0xAC,0x04,0x58,
0xDD,0xAC,0x08,0x30,0xC2,0xFC,0xD5,0x8E,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x17,};
#endif /* ROM_vax_ka750_bin_new_H */

80
VAX/vax_ka750_bin_old.h Normal file
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@ -0,0 +1,80 @@
#ifndef ROM_vax_ka750_bin_old_H
#define ROM_vax_ka750_bin_old_H 0
/*
VAX/vax_ka750_bin_old.h produced at Thu Aug 06 09:33:02 2015
from VAX/ka750_old.bin which was last modified at Thu Aug 06 09:01:34 2015
file size: 1024 (0x400) - checksum: 0xFFFEBAA5
This file is a generated file and should NOT be edited or changed by hand.
From ROM set: 990A9, 948A9, 906A9, 905A9 (Boots: A=DD, B=DM, C=DL, D=DU
*/
#define BOOT_CODE_SIZE 0x400
#define BOOT_CODE_FILENAME "ka750_old.bin"
#define BOOT_CODE_ARRAY vax_ka750_bin_old
unsigned char vax_ka750_bin_old[] = {
0x44,0x44,0xC0,0x8F,0x00,0x01,0x00,0x00,0x5E,0xDD,0x58,0x9F,0xCE,0x04,0xFD,0xD4,
0x58,0x16,0xAF,0x21,0xE8,0x50,0x01,0x00,0x7C,0x51,0x9E,0xAF,0x32,0x56,0xD0,0x8F,
0x40,0x00,0x00,0x00,0x50,0xD5,0x8E,0xD0,0x8E,0x58,0xC2,0x8F,0x00,0x01,0x00,0x00,
0x5E,0x17,0xCE,0x0C,0xFE,0xDA,0x01,0x1E,0xD4,0x52,0x30,0x81,0x00,0xDB,0x1D,0x52,
0x3C,0x8F,0x04,0x04,0x52,0x10,0x77,0xDB,0x1D,0x57,0x91,0x57,0x10,0x12,0xF8,0xBB,
0x8F,0x60,0x00,0xD0,0xAE,0x0C,0x55,0xD4,0x59,0x9E,0xCF,0x85,0x00,0x50,0xD5,0x53,
0x13,0x04,0x9A,0x53,0xA0,0x04,0x9A,0x05,0x51,0x3C,0x80,0x52,0x10,0x49,0xF5,0x51,
0xF8,0x3C,0x58,0x52,0x10,0x41,0x3C,0x59,0x52,0x10,0x3C,0x10,0x53,0x97,0x52,0x12,
0x0F,0x9A,0x51,0x56,0x10,0x4C,0x90,0x51,0x85,0xF5,0x56,0xF8,0x10,0x42,0x11,0xEB,
0x3C,0x01,0x50,0xC2,0x8F,0x00,0x02,0x00,0x00,0x55,0xD1,0x55,0xAE,0x0C,0x12,0x10,
0x10,0x2E,0xD5,0x51,0x19,0x0A,0xD0,0x05,0x55,0x10,0x25,0xF5,0x55,0xFB,0x11,0x02,
0xD4,0x50,0xBA,0x8F,0x60,0x00,0x05,0xA0,0x52,0x59,0x1E,0x02,0xB6,0x59,0x10,0x05,
0x78,0x8F,0xF8,0x52,0x52,0xDB,0x1E,0x57,0xE1,0x07,0x57,0xF9,0xDA,0x52,0x1F,0x05,
0x10,0x00,0x9A,0x51,0x52,0xDB,0x1C,0x57,0xE1,0x07,0x57,0xF6,0xDB,0x1D,0x51,0x19,
0xCF,0x05,0x02,0x0A,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xB3,
0x4D,0x44,0xC0,0x8F,0x00,0x01,0x00,0x00,0x5E,0xBB,0x20,0xD0,0x52,0x51,0xC0,0x8F,
0x20,0x1F,0x00,0x00,0x52,0xD4,0x55,0xD4,0x58,0x16,0xAF,0x18,0xE8,0x50,0x01,0x00,
0x9E,0xAF,0x11,0x56,0xD0,0x01,0x50,0xBA,0x20,0xC2,0x8F,0x00,0x01,0x00,0x00,0x5E,
0x17,0xCE,0x0C,0xFE,0xBB,0x8F,0x40,0x00,0xB0,0x20,0xA2,0x08,0x10,0x73,0xB0,0x53,
0xA2,0x08,0xB0,0x01,0x62,0x10,0x6A,0xB3,0x8F,0x00,0x10,0xA2,0x08,0x12,0x5B,0xB3,
0x8F,0x80,0x00,0xA2,0x0A,0x13,0xE1,0xD4,0x56,0xB3,0x8F,0x00,0x01,0xA2,0x0A,0x13,
0x05,0xA8,0x8F,0x00,0x04,0x56,0xB0,0x20,0xA2,0x08,0x10,0x45,0xB0,0x53,0xA2,0x08,
0xA9,0x03,0x56,0x62,0x10,0x3B,0xD4,0x59,0x7B,0x8F,0x42,0x00,0x00,0x00,0x58,0x57,
0x58,0xB0,0x57,0xA2,0x10,0x7B,0x16,0x58,0x58,0x59,0xF0,0x58,0x08,0x08,0x59,0xB0,
0x59,0xA2,0x06,0xB0,0x55,0xA2,0x04,0xAE,0x8F,0x00,0x01,0xA2,0x02,0xA9,0x11,0x56,
0x62,0x10,0x0E,0x3C,0x01,0x50,0xB5,0x62,0x18,0x02,0xD4,0x50,0xBA,0x8F,0x40,0x00,
0x05,0xB3,0x8F,0x80,0x80,0x62,0x13,0xF9,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x16,
0x4C,0x44,0xC0,0x8F,0x00,0x01,0x00,0x00,0x5E,0xBB,0x20,0xD0,0x52,0x51,0xC0,0x8F,
0x00,0x19,0x00,0x00,0x52,0x78,0x08,0x53,0x55,0xB0,0x55,0x62,0x3C,0x62,0x55,0xE9,
0x55,0xFA,0xD4,0x55,0xD4,0x58,0x10,0x1B,0xE8,0x50,0x03,0x00,0x11,0xEE,0x9E,0xAF,
0x12,0x56,0xBA,0x20,0xC2,0x8F,0x00,0x01,0x00,0x00,0x5E,0xD0,0x02,0x50,0x01,0x17,
0xCE,0x0C,0xFE,0xBB,0x8F,0x5A,0x03,0x78,0x08,0x53,0x53,0xB0,0x0B,0xA2,0x04,0x3E,
0xA3,0x04,0x62,0xC4,0x02,0x58,0xD4,0x59,0x7B,0x8F,0x50,0x00,0x00,0x00,0x58,0x56,
0x58,0x7B,0x28,0x58,0x58,0x54,0x78,0x07,0x56,0x56,0xF0,0x58,0x06,0x01,0x56,0x10,
0x71,0x3E,0xA3,0x08,0x62,0x10,0x6B,0x3C,0x62,0x59,0xE0,0x0F,0x59,0x69,0x3C,0xA2,
0x06,0x50,0x8A,0x3F,0x50,0xB1,0x56,0x50,0x13,0x32,0xCB,0x8F,0x7F,0x00,0x00,0x00,
0x56,0x51,0xAA,0x8F,0x7F,0x00,0x50,0xC2,0x51,0x50,0x18,0x06,0xAE,0x50,0x50,0x88,
0x04,0x50,0x96,0x50,0xE1,0x06,0x56,0x03,0x88,0x10,0x50,0xB0,0x50,0xA2,0x04,0x3E,
0xA3,0x06,0x62,0x10,0x2D,0x3C,0x62,0x59,0xE0,0x0F,0x59,0x2B,0xA0,0x54,0x56,0xB0,
0x55,0xA2,0x02,0xB0,0x56,0xA2,0x04,0xB0,0x8F,0x00,0xFF,0xA2,0x06,0x3E,0xA3,0x0C,
0x62,0x10,0x0F,0x3C,0x62,0x59,0xE0,0x0F,0x59,0x0D,0xD0,0x01,0x50,0xBA,0x8F,0x5A,
0x03,0x05,0x95,0x62,0x18,0xFC,0x05,0xD4,0x50,0xBA,0x8F,0x5A,0x03,0x05,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3B,
0x55,0x44,0xC0,0xAF,0x71,0x5E,0xC3,0x8F,0x00,0x03,0x00,0x00,0x5E,0x57,0xC1,0x8F,
0x00,0xFA,0x00,0x00,0x57,0x54,0x9E,0xAF,0xE7,0x51,0xD1,0x51,0x54,0x12,0x09,0xC0,
0xAF,0x54,0x54,0xC0,0xAF,0x50,0xAF,0x54,0xBB,0x20,0xD0,0x52,0x51,0xC0,0x8F,0x68,
0x14,0x00,0x00,0x52,0xD0,0x02,0x56,0xF5,0x56,0x01,0x00,0xB4,0x62,0xD0,0x0B,0x55,
0x9E,0xAF,0x37,0x58,0xB0,0xA2,0x02,0x59,0x19,0xED,0xE1,0x55,0x59,0xF6,0xB0,0x88,
0xA2,0x02,0xF3,0x0E,0x55,0xEE,0xD4,0x55,0xD4,0x58,0xDD,0x57,0x10,0x24,0xE8,0x50,
0x01,0x00,0xC0,0x04,0x5E,0x9E,0xAF,0x1A,0x56,0xD0,0x11,0x50,0xBA,0x20,0xC2,0xAF,
0x05,0x5E,0x17,0xCE,0x0C,0xFE,0x00,0x01,0x00,0x00,0x00,0x80,0x04,0xFA,0x00,0x00,
0x01,0x00,0xC3,0x55,0xAE,0x04,0x57,0xC0,0xAF,0xF2,0x57,0x10,0x2F,0xB0,0x09,0xA7,
0x48,0xB5,0x62,0xD5,0x67,0x19,0xFC,0x95,0xA7,0x16,0x12,0x1F,0x10,0x1E,0xB0,0x21,
0xA7,0x48,0xD0,0x58,0xA7,0x5C,0xD0,0x55,0xA7,0x50,0xD0,0x02,0xA7,0x4D,0xB5,0x62,
0xD5,0x67,0x19,0xFC,0x95,0xA7,0x16,0x12,0x02,0xD6,0x50,0x05,0xD0,0x57,0x59,0xD0,
0x0E,0x50,0x7C,0x89,0xF5,0x50,0xFB,0xB0,0x24,0xA7,0x3C,0xB0,0x53,0xA7,0x44,0xC1,
0x8F,0x0C,0x00,0x00,0x80,0x57,0x67,0xC1,0x8F,0x40,0x00,0x00,0x80,0x57,0xA7,0x04,
0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x29,};
#endif /* ROM_vax_ka750_bin_old_H */

View file

@ -38,11 +38,13 @@
======================================================================================= =======================================================================================
*/ */
struct ROM_File_Descriptor { struct ROM_File_Descriptor {
const char *BinaryName; const char *IncludeFileName; size_t expected_size; unsigned int checksum; const char *ArrayName;} ROMs[] = { const char *BinaryName; const char *IncludeFileName; size_t expected_size; unsigned int checksum; const char *ArrayName; const char *Comments;} ROMs[] = {
{"VAX/ka655x.bin", "VAX/vax_ka655x_bin.h", 131072, 0xFF7673B6, "vax_ka655x_bin"}, {"VAX/ka655x.bin", "VAX/vax_ka655x_bin.h", 131072, 0xFF7673B6, "vax_ka655x_bin"},
{"VAX/ka620.bin", "VAX/vax_ka620_bin.h", 65536, 0xFF7F930F, "vax_ka620_bin"}, {"VAX/ka620.bin", "VAX/vax_ka620_bin.h", 65536, 0xFF7F930F, "vax_ka620_bin"},
{"VAX/ka630.bin", "VAX/vax_ka630_bin.h", 65536, 0xFF7F73EF, "vax_ka630_bin"}, {"VAX/ka630.bin", "VAX/vax_ka630_bin.h", 65536, 0xFF7F73EF, "vax_ka630_bin"},
{"VAX/ka610.bin", "VAX/vax_ka610_bin.h", 16384, 0xFFEF3312, "vax_ka610_bin"}, {"VAX/ka610.bin", "VAX/vax_ka610_bin.h", 16384, 0xFFEF3312, "vax_ka610_bin"},
{"VAX/ka750_new.bin", "VAX/vax_ka750_bin_new.h", 1024, 0xFFFE7BE5, "vax_ka750_bin_new", "From ROM set: E40A9, E41A9, E42A9, E43A9 (Boots: A=DD, B=DB, C=DU"},
{"VAX/ka750_old.bin", "VAX/vax_ka750_bin_old.h", 1024, 0xFFFEBAA5, "vax_ka750_bin_old", "From ROM set: 990A9, 948A9, 906A9, 905A9 (Boots: A=DD, B=DM, C=DL, D=DU"},
{"VAX/vmb.exe", "VAX/vax_vmb_exe.h", 44544, 0xFFC014BB, "vax_vmb_exe"}, {"VAX/vmb.exe", "VAX/vax_vmb_exe.h", 44544, 0xFFC014BB, "vax_vmb_exe"},
{"swtp6800/swtp6800/swtbug.bin", "swtp6800/swtp6800/swtp_swtbug_bin.h", 1024, 0xFFFE4FBC, "swtp_swtbug_bin"}, {"swtp6800/swtp6800/swtbug.bin", "swtp6800/swtp6800/swtp_swtbug_bin.h", 1024, 0xFFFE4FBC, "swtp_swtbug_bin"},
}; };
@ -196,7 +198,8 @@ int sim_make_ROM_include(const char *rom_filename,
int expected_size, int expected_size,
unsigned int expected_checksum, unsigned int expected_checksum,
const char *include_filename, const char *include_filename,
const char *rom_array_name) const char *rom_array_name,
const char *Comments)
{ {
FILE *rFile; FILE *rFile;
FILE *iFile; FILE *iFile;
@ -307,6 +310,8 @@ fprintf (iFile, " %s produced at %s", include_filename, ctime(&now));
fprintf (iFile, " from %s which was last modified at %s", rom_filename, ctime(&statb.st_mtime)); fprintf (iFile, " from %s which was last modified at %s", rom_filename, ctime(&statb.st_mtime));
fprintf (iFile, " file size: %d (0x%X) - checksum: 0x%08X\n", (int)statb.st_size, (int)statb.st_size, checksum); fprintf (iFile, " file size: %d (0x%X) - checksum: 0x%08X\n", (int)statb.st_size, (int)statb.st_size, checksum);
fprintf (iFile, " This file is a generated file and should NOT be edited or changed by hand.\n"); fprintf (iFile, " This file is a generated file and should NOT be edited or changed by hand.\n");
if (Comments)
fprintf (iFile, "\n %s\n\n", Comments);
fprintf (iFile, "*/\n"); fprintf (iFile, "*/\n");
fprintf (iFile, "#define BOOT_CODE_SIZE 0x%X\n", (int)statb.st_size); fprintf (iFile, "#define BOOT_CODE_SIZE 0x%X\n", (int)statb.st_size);
fprintf (iFile, "#define BOOT_CODE_FILENAME \"%s\"\n", load_filename); fprintf (iFile, "#define BOOT_CODE_FILENAME \"%s\"\n", load_filename);
@ -371,7 +376,7 @@ int status = 0;
if (argc == 1) { /* invoked without any arguments */ if (argc == 1) { /* invoked without any arguments */
for (i=0; i<sizeof(ROMs)/sizeof(ROMs[0]); ++i) for (i=0; i<sizeof(ROMs)/sizeof(ROMs[0]); ++i)
status += sim_make_ROM_include (ROMs[i].BinaryName, ROMs[i].expected_size, ROMs[i].checksum, ROMs[i].IncludeFileName, ROMs[i].ArrayName); status += sim_make_ROM_include (ROMs[i].BinaryName, ROMs[i].expected_size, ROMs[i].checksum, ROMs[i].IncludeFileName, ROMs[i].ArrayName, ROMs[i].Comments);
exit((status == 0) ? 0 : 2); exit((status == 0) ? 0 : 2);
} }
if ((0 == strcmp(argv[1], "/?")) || if ((0 == strcmp(argv[1], "/?")) ||
@ -388,7 +393,7 @@ else {
if (i == sizeof(ROMs)/sizeof(ROMs[0])) if (i == sizeof(ROMs)/sizeof(ROMs[0]))
status = sim_make_ROMs_entry (argv[1]); status = sim_make_ROMs_entry (argv[1]);
else else
status = sim_make_ROM_include (ROMs[i].BinaryName, ROMs[i].expected_size, ROMs[i].checksum, ROMs[i].IncludeFileName, ROMs[i].ArrayName); status = sim_make_ROM_include (ROMs[i].BinaryName, ROMs[i].expected_size, ROMs[i].checksum, ROMs[i].IncludeFileName, ROMs[i].ArrayName, ROMs[i].Comments);
} }
exit((status == 0) ? 0 : 2); exit((status == 0) ? 0 : 2);
} }