sigma: Fix breakpoint state restore
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@ -120,6 +120,7 @@
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114: RAD: device address must include unit identifier everywhere, for interrupt generation.
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115. MT: error handling not consistent.
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116: IO: dangling else in write direct mode 1 code causes incorrect behavior.
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117: CPU: sim_interval is decremented before breakpoint test, which is incorrect.
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Diagnostic Notes
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@ -25,6 +25,8 @@
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cpu central processor
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12-Jul-22 RMS Fix incorrect decrement on breakpoint (Ken Rector)
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The system state for the Sigma CPU is as follows:
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RF[0:15][0:31]<0:31> register blocks
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@ -476,6 +478,7 @@ while (reason == 0) { /* loop until stop */
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if (sim_brk_summ &&
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sim_brk_test (PC, SWMASK ('E'))) { /* breakpoint? */
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reason = STOP_IBKPT; /* stop simulation */
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sim_interval++; /* undo decrement */
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break;
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}
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if (PSW_QRX9 && (PC & PSW1_XA)) /* S9 real ext && ext? */
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