IBMPCXT: Initial check in of new experimental simulator for the IBM PC XT
This commit is contained in:
Bill Beech
Mark Pizzolato
parent
89a8c87e87
commit
cdb94a9d9f
3 changed files with 408 additions and 0 deletions
202
IBMPC-Systems/ibmpcxt/ibmpcxt.c
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202
IBMPC-Systems/ibmpcxt/ibmpcxt.c
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/* ibmpcxt.c: IBM PC Processor simulator
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Copyright (c) 2016, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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11 Jul 16 - Original file.
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NOTES:
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This software was written by Bill Beech, Jul 2016, to allow emulation of IBM PC
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Computer Systems.
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*/
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#include "system_defs.h"
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int32 nmiflg = 0; //mask NMI off
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uint8 dmapagreg0, dmapagreg1, dmapagreg2, dmapagreg3;
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extern uint16 port; //port called in dev_table[port]
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/* function prototypes */
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uint8 get_mbyte(uint32 addr);
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uint16 get_mword(uint32 addr);
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void put_mbyte(uint32 addr, uint8 val);
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void put_mword(uint32 addr, uint16 val);
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t_stat SBC_reset (DEVICE *dptr);
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uint8 enbnmi(t_bool io, uint8 data);
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uint8 dmapag(t_bool io, uint8 data);
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uint8 dmapag0(t_bool io, uint8 data);
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uint8 dmapag1(t_bool io, uint8 data);
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uint8 dmapag2(t_bool io, uint8 data);
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uint8 dmapag3(t_bool io, uint8 data);
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/* external function prototypes */
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extern t_stat i8088_reset (DEVICE *dptr); /* reset the 8088 emulator */
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extern uint8 xtbus_get_mbyte(uint32 addr);
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extern void xtbus_put_mbyte(uint32 addr, uint8 val);
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extern uint8 EPROM_get_mbyte(uint32 addr);
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extern uint8 RAM_get_mbyte(uint32 addr);
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extern void RAM_put_mbyte(uint32 addr, uint8 val);
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extern UNIT i8255_unit[];
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extern UNIT EPROM_unit;
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extern UNIT RAM_unit;
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extern t_stat i8237_reset (DEVICE *dptr, uint16 base);
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extern t_stat i8253_reset (DEVICE *dptr, uint16 base);
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extern t_stat i8255_reset (DEVICE *dptr, uint16 base);
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extern t_stat i8259_reset (DEVICE *dptr, uint16 base);
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extern t_stat EPROM_reset (DEVICE *dptr, uint32 base, uint32 size);
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extern t_stat RAM_reset (DEVICE *dptr, uint32 base, uint32 size);
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extern uint16 reg_dev(uint8 (*routine)(t_bool, uint8), uint16);
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/* SBC reset routine */
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t_stat SBC_reset (DEVICE *dptr)
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{
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sim_printf("Initializing IBM PC XT:\n");
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i8088_reset (NULL);
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i8237_reset (NULL, I8237_BASE_0);
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i8253_reset (NULL, I8253_BASE_0);
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i8255_reset (NULL, I8255_BASE_0);
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i8259_reset (NULL, I8259_BASE_0);
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EPROM_reset (NULL, ROM_BASE, ROM_SIZE);
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RAM_reset (NULL, RAM_BASE, RAM_SIZE);
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reg_dev(enbnmi, NMI_BASE);
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reg_dev(dmapag0, DMAPAG_BASE_0);
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reg_dev(dmapag1, DMAPAG_BASE_1);
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reg_dev(dmapag2, DMAPAG_BASE_2);
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reg_dev(dmapag3, DMAPAG_BASE_3);
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return SCPE_OK;
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}
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uint8 dmapag0(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg0 = data;
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//sim_printf("dmapag0: dmapagreg0=%04X\n", data);
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}
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}
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uint8 dmapag1(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg1 = data;
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//sim_printf("dmapag1: dmapagreg1=%04X\n", data);
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}
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}
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uint8 dmapag2(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg2 = data;
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//sim_printf("dmapag2: dmapagreg2=%04X\n", data);
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}
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}
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uint8 dmapag3(t_bool io, uint8 data)
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{
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//sim_printf("dmapag3: entered\n");
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg3 = data;
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//sim_printf("dmapag3: dmapagreg3=%04X\n", data);
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}
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}
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uint8 enbnmi(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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if (data & 0x80) {
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nmiflg = 1;
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//sim_printf("enbnmi: NMI enabled\n");
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} else {
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nmiflg = 0;
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//sim_printf("enbnmi: NMI disabled\n");
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}
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}
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}
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/* get a byte from memory - handle RAM, ROM, I/O, and Multibus memory */
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uint8 get_mbyte(uint32 addr)
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{
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/* if local EPROM handle it */
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if ((addr >= EPROM_unit.u3) && ((uint32)addr < (EPROM_unit.u3 + EPROM_unit.capac))) {
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return EPROM_get_mbyte(addr);
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}
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/* if local RAM handle it */
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if ((addr >= RAM_unit.u3) && ((uint16)addr < (RAM_unit.u3 + RAM_unit.capac))) {
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return RAM_get_mbyte(addr);
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}
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/* otherwise, try the multibus */
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return xtbus_get_mbyte(addr);
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}
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/* get a word from memory */
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uint16 get_mword(uint32 addr)
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{
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uint16 val;
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val = get_mbyte(addr);
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val |= (get_mbyte(addr+1) << 8);
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return val;
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}
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/* put a byte to memory - handle RAM, ROM, I/O, and Multibus memory */
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void put_mbyte(uint32 addr, uint8 val)
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{
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/* if local EPROM handle it */
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if ((addr >= EPROM_unit.u3) && ((uint32)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) {
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sim_printf("Write to R/O memory address %05X - ignored\n", addr);
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return;
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} /* if local RAM handle it */
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if ((i8255_unit[0].u5 & 0x02) && (addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) {
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RAM_put_mbyte(addr, val);
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return;
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} /* otherwise, try the multibus */
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xtbus_put_mbyte(addr, val);
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}
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/* put a word to memory */
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void put_mword(uint32 addr, uint16 val)
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{
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put_mbyte(addr, val & 0xff);
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put_mbyte(addr+1, val >> 8);
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}
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/* end of ibmpcxt.c */
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96
IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c
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96
IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c
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/* ibmpcxt_sys.c: IBM 5160 simulator
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Copyright (c) 2016, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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11 Jul 16 - Original file.
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*/
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#include "system_defs.h"
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extern DEVICE i8088_dev;
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extern REG i8088_reg[];
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extern DEVICE i8237_dev;
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extern DEVICE i8253_dev;
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extern DEVICE i8255_dev;
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extern DEVICE i8259_dev;
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extern DEVICE EPROM_dev;
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extern DEVICE RAM_dev;
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extern DEVICE xtbus_dev;
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/* bit patterns to manipulate 8-bit ports */
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#define i82XX_bit_0 0x01 //bit 0 of a port
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#define i82XX_bit_1 0x02 //bit 1 of a port
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#define i82XX_bit_2 0x04 //bit 2 of a port
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#define i82XX_bit_3 0x08 //bit 3 of a port
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#define i82XX_bit_4 0x10 //bit 4 of a port
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#define i82XX_bit_5 0x20 //bit 5 of a port
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#define i82XX_bit_6 0x40 //bit 6 of a port
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#define i82XX_bit_7 0x80 //bit 7 of a port
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#define i82XX_nbit_0 ~i8255_bit_0 //bit 0 of a port
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#define i82XX_nbit_1 ~i8255_bit_1 //bit 1 of a port
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#define i82XX_nbit_2 ~i8255_bit_3 //bit 2 of a port
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#define i82XX_nbit_3 ~i8255_bit_3 //bit 3 of a port
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#define i82XX_nbit_4 ~i8255_bit_4 //bit 4 of a port
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#define i82XX_nbit_5 ~i8255_bit_5 //bit 5 of a port
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#define i82XX_nbit_6 ~i8255_bit_6 //bit 6 of a port
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#define i82XX_nbit_7 ~i8255_bit_7 //bit 7 of a port
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/* SCP data structures
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sim_name simulator name string
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sim_PC pointer to saved PC register descriptor
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sim_emax number of words needed for examine
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sim_devices array of pointers to simulated devices
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sim_stop_messages array of pointers to stop messages
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*/
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char sim_name[] = "IBM PC XT";
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REG *sim_PC = &i8088_reg[0];
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int32 sim_emax = 4;
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DEVICE *sim_devices[] = {
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&i8088_dev,
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&EPROM_dev,
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&RAM_dev,
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&i8237_dev,
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&i8253_dev,
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&i8255_dev,
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&i8259_dev,
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&xtbus_dev,
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NULL
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};
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const char *sim_stop_messages[] = {
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"Unknown error",
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"Unknown I/O Instruction",
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"HALT instruction",
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"Breakpoint",
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"Invalid Opcode",
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"Invalid Memory",
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};
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110
IBMPC-Systems/ibmpcxt/system_defs.h
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110
IBMPC-Systems/ibmpcxt/system_defs.h
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/* system_defs.h: Intel iSBC simulator definitions
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
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||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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||||
Software is furnished to do so, subject to the following conditions:
|
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
|
||||
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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11 Jul 16 - Original file.
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*/
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#include <stdio.h>
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#include <ctype.h>
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#include "sim_defs.h" /* simulator defns */
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/* set the base I/O address and device count for the 8237 */
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#define I8237_BASE_0 0x000
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#define I8237_NUM 1
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/* set the base I/O address and device count for the 8253 */
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#define I8253_BASE_0 0x040
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#define I8253_NUM 1
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/* set the base I/O address and device count for the 8255 */
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#define I8255_BASE_0 0x060
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#define I8255_NUM 1
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/* set the base I/O address and device count for the 8259 */
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#define I8259_BASE_0 0x020
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#define I8259_NUM 1
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/* set the base I/O address for the NMI mask */
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#define NMI_BASE 0x0A0
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/* set the base I/O address and device count for the DMA page registers */
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#define DMAPAG_BASE_0 0x080
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#define DMAPAG_BASE_1 0x081
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#define DMAPAG_BASE_2 0x082
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#define DMAPAG_BASE_3 0x083
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#define DMAPAG_NUM 4
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/* set the base and size for the EPROM on the IBM PC XT*/
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#define ROM_BASE 0xF0000
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#define ROM_SIZE 0x10000
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/* set the base and size for the RAM on the IBM PC XT */
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#define RAM_BASE 0x00000
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#define RAM_SIZE 0x40000
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/* set INTR for CPU on the IBM PC XT */
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#define INT_R INT_1
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/* xtbus interrupt definitions */
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#define INT_0 0x01
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#define INT_1 0x02
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#define INT_2 0x04
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#define INT_3 0x08
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#define INT_4 0x10
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#define INT_5 0x20
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#define INT_6 0x40
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#define INT_7 0x80
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/* Memory */
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#define ADDRMASK16 0xFFFF
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#define ADDRMASK20 0xFFFFF
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#define MAXMEMSIZE20 0xFFFFF /* 8080 max memory size */
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#define MEMSIZE (i8088_unit.capac) /* 8088 actual memory size */
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#define ADDRMASK (MAXMEMSIZE - 1) /* 8088 address mask */
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#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE)
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/* debug definitions */
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#define DEBUG_flow 0x0001
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#define DEBUG_read 0x0002
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#define DEBUG_write 0x0004
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#define DEBUG_level1 0x0008
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#define DEBUG_level2 0x0010
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#define DEBUG_reg 0x0020
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#define DEBUG_asm 0x0040
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#define DEBUG_all 0xFFFF
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/* Simulator stop codes */
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#define STOP_RSRV 1 /* must be 1 */
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#define STOP_HALT 2 /* HALT */
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#define STOP_IBKPT 3 /* breakpoint */
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#define STOP_OPCODE 4 /* Invalid Opcode */
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#define STOP_IO 5 /* I/O error */
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#define STOP_MEM 6 /* Memory error */
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