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SDS: Fix clock pulse interrupt bug

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The single-instruction Clock Pulse interrupt (75 octal) may be a MIN or SKR instruction. The function rtc_inst increments (MIN) or decrements (SKR) the operand and tests for zero and generates a Clock Sync interrupt (74 octal) if so. However, the SDS 940 reference manual is incorrect; in the SKR case, the test should be if the result is negative.
This commit is contained in:
Mark Emmer 2014-03-02 22:22:20 -06:00
parent 5270c44117
commit d5acbc6f7a
1 changed files with 1 additions and 1 deletions
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SDS/sds_cpu.c
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@ -1589,7 +1589,7 @@ if ((r = Read (va, &dat))) /* get operand */
dat = AddM24 (dat, val); /* mem +/- 1 */
if ((r = Write (va, dat))) /* rewrite */
return r;
if (dat == 0) /* set clk sync int */
if ((op == MIN && dat == 0) || (dat & SIGN)) /* set clk sync int */
int_req = int_req | INT_RTCS;
return SCPE_OK;
}