- Add new CP and CR devices
- COC: Zero delay from SIO to INIT state Detect and UEN on 0xFF order
- COC: Moved SIO int pending test to devices
- DK: Zero delay from SIO to INIT state
- DP: Added case points for RDEES, dp_aio_status
- DP: Zero delay from SIO to INIT state
- defs: Added chaining modifier flag
- defs: Fixed DVT_NODEV definition
- defs: Added chan_chk_dvi definition
- io: Added chaining modifier flag
- LP: Zero delay from SIO to INIT state
- LP: Added INIT test for illegal command
- LP: Moved SIO interrupt test to devices
- MT: Zero delay from SIO to INIT state
- PT: Zero delay from SIO to INIT state
- PT: Moved SIO interrupt test to devices
- RAD: Zero delay from SIO to INIT state
- RAD: Fixed nx unit test
- RAD: Fixed write protect test
- TT: Zero delay from SIO to INIT state
- TT: Moved SIO int pending test to devices
- Periodic "python cmake/generate.py" to sync with makefile changes.
- Ensure that AIO_CCDEFS (makefile) and USES_AIO (CMake generate.py) are
present for PDP-10 simulators. Otherwise, user gets a warning message
when the simulator starts about network support and asynchronous I/O.
Adds the following devices to AltairZ80:
TUART0: Cromemco FDC controller TUART console port at I/O address 0x00.
TUART1: Cromemco TU-ART port A at I/O address 0x20.
TUART2: Cromemco TU-ART port B at I/I address 0x50.
These devices are fully TMXR capable.
Fix divide of 0 on KS10 processor.
Fix write access for auxiliary processor memory.
Updated support new PIDP10 panel.
Allow eight Unibux ports on the TEN device.
Added GE DATANET-760 device to PDP6
Removed USER mode restriction for idle detection.
Added Data Disc 6600 Television Display System.
Josh's Altair/IMSAI Replacement (JAIR) is a single board computer
(SBC) for the S100 bus. I created this device to assist a friend
with getting IMP and CBBS working on his JAIR. Without having a
JAIR myself, AltairZ80 to the rescue!
The following devices are added:
JAIR - The main JAIR board I/O and ROM
JAIRS0 - Serial Port 0 (COM1)
JAIRS1 - Serial Port 1 (COM2)
JAIRP - Parallel Port
This was a bit challenging because the JAIR uses an on-board SD
card with FAT file system to hold its BIOS and CP/M disk images.
The ATTACH command is used to mount SD card images to the
simulator. The simulator emulates the SD card interface for
read/writing SD card sectors. These images are easily mounted on
a Mac making moving files around easy. I do not know about Windows.
These same images can be written to an SD card and used with real
JAIR hardware, which may be useful for JAIR owners.
The serial and parallel ports fully support TMXR. Host serial ports
and sockets may be attached to these devices.
I am working on a GitHub repository containing an SD card image and
init script that will boot CP/M 2.2 on the JAIR simulator.
Is this device one that should be added to AltairZ80?
Issue #294: "apple silicon build problem(s?)": If the "--flavor/-f" flag
is not specified on the command line, then complain loudly, print help
and exit. The script used to default to "Unix Makefiles".
Updates:
- Add missing "-DHAVE_LIBPNG" compiler command line define when the PNG
library is detected/present for screen capture support.
- Add "clang64" to the list of MinGW64 platforms for which the
.travis/deps.sh script can install build dependencies.
- Add PThread4W_FOUND to the condition that sets async I/O for Win32
when using vcpkg for build dependencies.
- Add vs2022-x64, vs2019-x64 and vs2017-x64 build environments to
build 64-bit Windows executables.
- Use simulator AIO only where needed by the simulator (i.e., the
simulator calls/uses AIO_CHECK_EVENT in sim_instr())
- Add "USES_AIO" flag to add_simulator() to mark a simulator that
acutally uses asynchronous I/O.
- Build "_aio" SIMH core library variants that have AIO turned on,
link with the "_aio" variant when a simulator sets USES_AIO.
- Emit a warning message when WITH_ASYNC is False (CMake configuration
option) to notify the user/developer that some functionality will be
crippled.
Affected simulator builds: 3b2 family, PDP-6, PDP-11, VAX family,
IMLAC and TT2500. The makefile and cmake/generate.py also updated
to remain in sync with CMake.
N.B.: Simulators still link with the underlying platform's threading
library. SEL32 requires pthreads or equivalent threading library,
independent of AIO.
- cmake/cmake-builder.sh
- New "--no-aio" flag: Build simulators without async I/O.
- New "--no-aio-intrinsics" flag: Don't build async I/O using compiler
compare-exchange, atomic load intrinsics.
- cmake/cmake-builder.ps1
- New "-noaio" flag: Build simulators without async I/O.
- New "-noaiointrinsics" flag: Don't build async I/O using compiler
compare-exchange, atomic load intrinsics.
CMake 3.28.1 INTERFACE_LINK_LIBRARIES behavior change: The file name
must now be an absolute path. Relative paths no longer accepted.
Internally, SIMH enforces this if CMAKE_VERSION >= 3.19, when REAL_PATH
was first implemented.
This PR adds support for the Processor Technology VDM-1 display adapter and Sol-20 computer system. The VDM-1 was integrated into the Sol-20 but has been separated out into its own device.
This PR adds the following devices to the AltairZ80 simulator:
VDM1 - Processor Technology VDM-1 display adapter
SOL20 - Processor Technology SOL20 with SOLOS ROMs
SOL20K - SOL20 Keyboard (callback from VDM1)
SOL20T - SOL20 Tape (reads/writes cassette file images)
SOL20S - SOL20 Serial Port (TMXR capable)
SOL20P - SOL20 Printer Port (TMXR capable)
- Builds x86 and x64 regular snapshots.
x64: Mon Wed Fri
x86: Tue Thu Sat
ARM: Mon Thu Sun (ARM not enabled)
- Builds x64 on closed pull request, Release
- Manual trigger allows selection of ref, platform,
architecture, config, disposition
- Releases and daily snapshots are deployed automagically
- VS Project 2022 files updated for ARM, but not setup for
cross-builds (BuildROMs) or tested on ARM (no hardware)
- Fix makefile tests for cygwin
The GCC documentation explicitly says not to use that option
when -flto is used, and since that is the only place where
the makefile was using it, remove it to conform to the
documented rules.
When building compiler optimized binaries with the gcc or clang compilers,
invoking GNU make with LTO=1 on the command line will cause the build
to use Link Time Optimization to maximally optimize the results.
Link Time Optimization can report errors which aren't otherwise detected
and will also take significantly longer to complete.
This change allows CI builds to fail without detailed viewing of build output
for gcc and clang builds (all modern compilers). Thus forcing PR submitters
to find these problems before PRs are merged. This is done by compiling
with -Werror for these compilers.
We don't know how to do this for other compilers which may be able to use
the makefile, so warnings there will still proceed to build successfully.
This avoids infecting SIMH with the GPL license, since readline,
very surprisingly, is GPL rather than LGPL.
The replacement package is "editline", which has a useable license.
This commit introduces dozens of changes to make the 3B2-700 simulator
fully functional and ready for wider use. In addition to 3B2-700
availability, this commit includes a tremendous amount of refactoring
of the 3B2-400 and common code to make the project structure easier to
maintain and reason about.
One final important change: ROM files are no longer included in the
source code. 3B2 ROM images must be obtained separately and loaded
into the simulator before boot.
Changes:
- The 3b2 target has been aliased to 3b2-400
- The formerly named 3b2-600 project has become 3b2-700
- SCSI QIC tape support has been added to sim_scsi.c
- Header files have been reworked to reduce complexity of includes
- Common code has been consolidated
- Timer code has been unified
- General cleanup of codebase
- Fixed condition codes m6800.c from Roberto Sancho Villa
- Add additional FDC lfd-400 from Roberto Sancho Villa
- Add additional OS's (FLEX 1.0, FDOS 1.0, DOS68, MiniDOS, and MiniDOS-MPX)
to software support
- Add additional disk formats to software support dc-4.c from Roberto
Sancho Villa
- Add CPU history
- Fix LOAD/DUMP to support binary and hex
- Fix fprintf_sym to disassemble 6800 code correctly
- Add EXAMINE/DEPOSIT to CPU Memory
- Fixed disasm to space the register
- Add SET_FLAG(IF) to IRQ – fixed error in handling IRQ from
Roberto Sancho Villa
These devices start disabled and will be that way in essentially all
working systems, but there apparently was a DECnet Phase V
support for this device, so it is added to all systems. The DPV
should now be readily testable.
As mentioned in #1152. That PR will fix the DUP device.
This commit is explicitly released from any license restriction
mentioned in the LICENSE.txt of the github.com/simh/simh
master branch changes.
