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Author SHA1 Message Date
Howard M. Harte
023cd3b387 AltairZ80: Add support for NMI interrupts. 2023-01-29 10:19:07 -08:00
Howard M. Harte
11e555bb20 AltairZ80: Fix width of vectorInterrupt pseudo register. 2023-01-29 10:19:07 -08:00
Richard Cornwell
1921b58996 KA10: Fixed TM10A to request first word at issue of write instruction. 2023-01-21 23:07:58 -05:00
Richard Cornwell
b487b3a7c2 KA10: Fixed issue with ITS KA quantum clock interrupt. 
Start of support for PiDP10 front panel.
      Moved interrupt checking from check_irq_level to clear_interrupt.
      Pending interrupts now saved in IOB_PI.
      Cleanup of KL10 Timer interrupts.
      Minor code cleanup.
 2023-01-18 21:11:49 -05:00
Richard Cornwell
1294ef1e83 KA10: Fixed IMP address determination for KS, code cleanup. 2023-01-18 18:02:14 -05:00
Richard Cornwell
cd40b302e6 KA10: Fixed Chaosnet devices to work properly under ITS. 2023-01-18 18:01:32 -05:00
Seth Morabito
da6dcef801 3b2: Fix for clock drift when idling 
When the 3B2 simulator was set to allow idling, there was significant
clock drift related to the primary timer unit. It turns out that the
simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack`
incorrectly. They are not needed with the structure of system timers in
the 3B2 architecture.
 2023-01-18 12:50:35 -05:00
Howard M. Harte
dcd3e48048 AltairZ80: ADCS6: Initialize extended UDATA in reset routine. 
As pointed out by @markpizz , the only allowed macro to initialize UNIT
structures is the UDATA macro.

Setting additional UNIT data structure items should be set through explicit
initialization code in the DEVICE reset routine.
 2023-01-18 12:43:34 -05:00
Patrick Linstruth
1a1366650c AltairZ80: Adds -H switch to LOAD command for loading Intel hex files 2023-01-17 20:08:39 -08:00
Peter Schorn
ce791138b5 SCP: Remove dead code in sim_sanity_check_register_declarations 2022-12-05 12:16:52 -05:00
Howard M. Harte
74197bfb77 AltairZ80: SIO: Allow keyboard interrupts from configurable SIO port. 2022-12-05 12:16:00 -05:00
Howard M. Harte
9dd2fe1615 AltairZ80: ADC Super-Six: add Z80-CTC support. 2022-12-05 12:16:00 -05:00
Howard M. Harte
4359a80670 AltairZ80: wd179x: Add support for raw disk images. 
Support standard 8-inch SSSD raw disk images, in addition to .imd.
 2022-12-05 12:16:00 -05:00
Jim Fehlinger
78ebfb418b IBM1130: cr_attach() [ibm1130_cr.c]: replace bad pointer 2022-12-02 09:59:57 -05:00
Patrick Linstruth
92e40cb1c8 SCP: Add VM-specific messages to %TSTATUS% expansion 
Clean up variable expansion help
 2022-11-30 12:27:19 -05:00
Paul Koning
068b0f37b4 DISK: rename CreateVirtualDisk 
This fixes issue #52, name conflict when building in MinGW.
 2022-11-29 12:04:56 -05:00
Paul Koning
9dea1cecd1 PDP9 VAX SEL32: Adjust test limits 
Adjust the instruction limits for three simulators so they pass
on Apple M1 systems.
 2022-11-28 11:01:33 -05:00
Mark Pizzolato
f06ba22c6c SCELBI: Add missing array bound in sim_stop_messages array 
Somehow this simulator got missed when this change was made for all
other simulators.
 2022-11-27 17:15:42 -05:00
Patrick Linstruth
3ec3e3aa8f AltairZ80: Fix HALT stop code conflict with ON ERROR 
AltairZ80 uses 0 for the VM-specific HLT instruction stop code.
SCP defines SCPE_OK as 0.
SCP uses 0 to mean all errors ("ON ERROR").

The command "ON 0" will generate "%SIM-ERROR: Invalid argument: 0".

This PR changes the HALT stop code from 0 to 5.
 2022-11-27 17:14:57 -05:00
Tony Lawrence
e062e2d7c1 PDP11: Remove dead code in RL11 2022-11-27 14:39:58 -05:00
Tony Lawrence
57837528ae SCP: Word order in "set def" error 2022-11-27 14:39:58 -05:00
Tony Lawrence
3364fe6f19 SIMH: VSCode patterns added to ignore list 2022-11-27 14:39:58 -05:00
Mark Pizzolato
5250eb866d SCP: Update HELP SET ON to also describe INHERIT and NOINHERIT options 
Add missing help information reported in #130
 2022-11-27 14:39:12 -05:00
Howard M. Harte
60599a9f62 AltairZ80: HDC-1001: Fix MSVC /W4 warnings. 2022-11-27 14:38:05 -05:00
Howard M. Harte
75f11a8e3d AltairZ80: wd179x: Code cleanup and fix MSVC /W4 warnings. 2022-11-27 14:38:05 -05:00
Howard M. Harte
7cca92ce28 AltairZ80: SIO: Support 32-bits for setFCBAddressCmd. 
The M68K requires more than 16-bits for the FCB address.  Expand to
32-bits.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
87581b865f AltairZ80: M68K: Add support for additional 68000 variants 
68000, 68010, 68020, 68030, 68040 and LC/EC variants.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
6cd89205a3 AltairZ80: M68K: Add support for memory-mapped I/O. 
Allows the M68K CPU to take advantage of additional AltairZ80 peripherals.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
7094222ada AltairZ80: SCP300F: Add support for MS-DOS 2.00. 
* Add support for 8259 interrupt controller.
* Add support for Cromemco and Tarbell Monitor ROMs.
* To allow port 0xFE to be used by the simh_dev.
* Use the CPU's SR instead of a SCP300F-specific one.
* 9513 RTC support.
 2022-11-27 14:38:05 -05:00
Tony Lawrence
a06ab20512 TIMER: Support 1ms timer resolution in Cygwin 2022-11-23 11:24:31 -05:00
Patrick Linstruth
8b181a360c AltairZ80: PMMI device DTR/RTS default changes and support for sockets 2022-11-23 11:23:20 -05:00
Patrick Linstruth
e2d422c2d3 AltairZ80: Add support for Morrow Micro Decision 
Moved MMD and MMDM devices under Morrow Devices comment.
 2022-11-23 11:22:51 -05:00
Patrick Linstruth
7a5432d9e2 AltairZ80: Add "MEM" and "REG" simulator-specific commands 
sim> mem df00
DF00 C3 5C E2 C3 58 E2 7F 00 43 6F 70 79 72 69 67 68 .\..X...Copyrigh
DF10 74 20 31 39 37 39 20 28 63 29 20 62 79 20 44 69 t 1979 (c) by Di
DF20 67 69 74 61 6C 20 52 65 73 65 61 72 63 68 20 20 gital Research
DF30 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00     ............
DF40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
DF50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
DF60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ....s...ub...m..
DF70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ..I..tT...e.....
DF80 00 00 00 00 00 00 00 00 08 DF 00 00 5F 0E 02 C3 d....4...l.._0.r
DF90 05 00 C5 CD 8C DF C1 C9 3E 0D CD 92 DF 3E 0A C3 .d..M...>....>..
DFA0 92 DF 3E 20 C3 92 DF C5 CD 98 DF E1 7E B7 C8 23 ..> ..a.....~..#
DFB0 E5 CD 8C DF E1 C3 AC DF 0E 0D C3 05 00 5F 0E 0E ...r........._..
DFC0 C3 05 00 CD 05 00 32 EE E6 3C C9 0E 0F C3 C3 DF ...K..2..<..'.s.
DFD0 AF 32 ED E6 11 CD E6 C3 CB DF 0E 10 C3 C3 DF 0E .2...a...p.P....
DFE0 11 C3 C3 DF 0E 12 C3 C3 DF 11 CD E6 C3 DF DF 0E ...r...0..v.....
DFF0 13 C3 05 00 CD 05 00 B7 C9 0E 14 C3 F4 DF 11 CD .....a.l........

sim> reg
C0Z1M0E1I1 A=02 B=007F D=DF06 H=EA0E S=EA37 P=FA6B ANI 01h
sim> set on
sim> on error reg
sim> s

Step expired, PC: 0FA6D (JZ 0FA69h)
C0Z1M0E1I1 A=00 B=007F D=DF06 H=EA0E S=EA37 P=FA6D JZ 0FA69h
sim> s

Step expired, PC: 0FA69 (IN 10h)
C0Z1M0E1I1 A=00 B=007F D=DF06 H=EA0E S=EA37 P=FA69 IN 10h
sim> s

Step expired, PC: 0FA6B (ANI 01h)
C0Z1M0E1I1 A=02 B=007F D=DF06 H=EA0E S=EA37 P=FA6B ANI 01h
 2022-11-23 11:22:12 -05:00
Howard M. Harte
33aad32550 AltairZ80: TDD: Remove unused variable. 2022-11-19 13:48:34 -05:00
Howard M. Harte
f578ce76a7 AltairZ80: DJHDC: Conditionalize interrupt support. 2022-11-19 13:48:34 -05:00
Tony Lawrence
47908cc371 PDP11: More correction in RK help text (per Paul Koning) 2022-11-18 10:39:49 -05:00
Tony Lawrence
45f6fbaaa4 PDP11: Correct wording for RK MTAB entries and help text 2022-11-18 10:39:49 -05:00
Howard M. Harte
256183232a AltairZ80: Add DJHDC to VS project. 2022-11-15 12:21:58 -05:00
Howard M. Harte
70c2038d5c AltairZ80: Add DJHDC to makefile. 2022-11-15 12:21:58 -05:00
Howard M. Harte
61a520a978 AltairZ80: Morrow HDC-DMA Hard Disk Controller. 2022-11-15 12:21:58 -05:00
Howard M. Harte
bc9dc13f7c AltairZ80: Add Tarbell Double-Density to Visual Studio Project. 2022-11-15 12:21:58 -05:00
Howard M. Harte
4d84c563c2 AltairZ80: Add Tarbell Double-Density controller to makefile. 2022-11-15 12:21:58 -05:00
Howard M. Harte
f77485ca99 AltairZ80: Add Tarbell Double-Density FDC 
This controller is based the wd179x, adding a couple of Tarbell-specific
registers.
 2022-11-15 12:21:58 -05:00
Mark Pizzolato
6c398df0ae simulator tests: Fix test setup to tolerate very busy or slow host systems 
Adjust the RUNLIMIT to specify instructions instead of wall clock time.

On an unfettered system, the sel32 test completes after some 588 million
instructions.  On a slow host system, the system clock tick processing will
add to the total instructions executed.  Increase the limit to 750 million
instructions.
 2022-11-13 11:07:46 -05:00
Mark Pizzolato
756ac0d2a1 BUILDROMS: Fix potential compiler warnings 2022-11-13 11:07:46 -05:00
Paul Koning
2de790dede BESM6: fix warning 
This fixes a warning with some compilers.
 2022-11-10 10:47:49 -05:00
Seth Morabito
f6cf886454 3b2: Improved sim_load procedure 
The previous implementation of sim_load was riddled with little errors.
This change fixes those errors, improves user feedback, and limits the
allowable flags to '-r' and '-o'.
 2022-11-10 10:47:24 -05:00
Howard M. Harte
3719b46524 AltairZ80: SIO: Fix warning for type mismatch. 
Fix warning introduced in PR#108
 2022-11-10 10:45:46 -05:00
Howard M. Harte
71913f26eb AltairZ80: SIO: Add setFCBAddressCmd to simh_dev. 
* Allows setting the FCB address used to send filenames between the host
  and guest operating systems.
* Increment the SIMH device version to SIMH005.
 2022-11-07 09:22:14 -05:00
Jan-Benedict Glaw
5727609e40 STUB: Fix "non-void function does not return a value" warning 
Found with Debian clang version 15.0.3-2 and LTO=1.
 2022-11-07 09:14:23 -05:00