This change cleans up warnings issued when compiled with
-Wall.
- Removed unused functions and variables.
- Moved static declarations out of headers and into source files
- Added braces around initialization where suggested.
Previously, tmxr_set_line_unit() and tmxr_set_line_output_unit()
were being called in the attach routine. These probably belong
in the reset routine instead.
Adds a skeleton framework for CIO ("Common I/O") feature cards. The
first feature card to be implemented will be the "PORTS" serial MUX.
Part of this support involved reworking IRQ handling in the CPU. It
now respects both IRQ Vector and IPL.
This change also removes all 'assert(0)' calls from the simulator and
replaces them with generic "Simulator Error" halts. These should only
happen if there's a genuine logic error lurking somewhere.
This change is a major refactor of how DMA and the DUART interact.
DMA implementation can now be overridden by individual devices that
require DMA. Disk and Floppy both continue to use a generic DMA
implementation, but the DUART code replaces the generic DMA with its
own implementation that correctly rate-limits TX. Among other things,
this allows the simulator to work correctly with real serial
terminals. This functionality has been tested on an AT&T 5620 "Blit"
terminal, which can run the 'layers' windowing software from the
simulator.
- Add "SHOW STACK" support to CPU
- An off-by-one error in checking SDT length was fixed.
- not-present co-processor R/W should not set Bus timeout bit
The 3B2 emulator did not have support for traps, rendering debugging
under the simulator fairly useless. This change adds support for
trap handling. The 'sdb' UNIX debugger under SVR3 should now work
correctly.
Two critical issues are fixed with this commit:
1. The MMU cache was being corrupted by writing the 'Last Used'
bit into the wrong half of the PD cache (low word vs. high word)
2. The MMU cache was being too aggressively flushed on SRAMA
write, because the wrong length was being used. In addition,
the code was walking off the end of the cache array when
flushing any section other than section 0, potentially causing
memory corruption.
This commit adds support for the following emulated hard disks:
HD30 30 MB CDC Wren 94155-36
HD72 73 MB CDC Wren II 94156-86
HD72C 72 MB Fujitsu M2243AS
HD135 161 MB Maxtor XT1190
This commit improves the integrated disk (ID) controller's behavior,
enabling full support for up to two 72MB (emulated WREN II)
integrated winchester disks.
- An overflow bug was causing INSFW and EXTFW to fail
on Windows hosts compiled with Microsoft Visual Studio.
This commit fixes the issue and causes 3B2 diagnostics
to pass under win32.
- This change adds support for storing time between boots in the Time
of Day clock. An effort has been made to keep the Time of Day clock
in sync with the wall clock between boots, so that user-set time
advances properly between boots.
- Added a couple of custom help routines for TOD and NVRAM.
I will be filling in more help routines as time permits.
Clock reset was not being handled gracefully at all, leading some
diagnostic tests not to pass, or not to pass consistently.
This change will "kick" the system clock whenever the timer divider is
reset, so the new divider is picked up immediately.
