From actual monitor code, sequence used to read drum:
EOD* 10000B Alert Interlace
GDAC3: EOD 14202 I/O control mode EOD (mode 1)
A=0 High order memory address bits
Hicount=2 (Word count=04000=2KW)
POT GDBCL+2 Low-order memory address bits.
RRF (EOD 2226) Read RAD file (mode 0)
Problem is that RRF is clearing the interlace information saved by the previous POT and sets up for a new POT. That is, in sds_io.c, mod 0 of op_eomd always assumes that a POT will follow if the channel is C or greater. Have to add tests of chan_flag. If interlace is active, do not capture new information from this EOM/EOD.
Also removed superfluous trailing blanks from lines in file.
The single-instruction Clock Pulse interrupt (75 octal) may be a MIN or SKR instruction. The function rtc_inst increments (MIN) or decrements (SKR) the operand and tests for zero and generates a Clock Sync interrupt (74 octal) if so. However, the SDS 940 reference manual is incorrect; in the SKR case, the test should be if the result is negative.
1. When transitioning from monitor to user mode with the trap enabled, the trap was latching the monitor address of the transferring branch rather than the user-mode address of the branch target.
2. When executing a BRU, BRX or BRM in monitor mode, if the effective address was in user mode, the code neglected to transition the machine to user mode. And after doing so, it is necessary to check for an armed monitor-to-user trap.
Also removed superfluous trailing blanks from lines in file.
Finishing the last DECtape device which was missed when this functionality was added to pdp11_dt, pdp18b_dt and pdp8_dt
in commits: 2934112a70 and c9e8121c16
Cleaned up the pdp11, pdp18b and other pdp8 implementations to make backporting cleaner.
Made sure that buffer flushing happens correctly when simulation returns to the sim> prompt.
Now all DDCMP capable devices KDP, DUP and DMC/DMR have access to packet corruption generation to simulate real world imperfect data lines for protocol testing.
Also, always process initialization commands without regard to whether the DMC/DMR line is attached and return diag error status if the line isn't attached.
Note: This excludes the possibility of there being a -C breakpoint type. Since there are potentially 26 different breakpoint types, this exclusion is not likely to have a significant impact.
The interrupt acknowledgment logic for the transmit interrupt inadvertently cleared the device interrupt pending flag even when other devices potentially had pending interrupts.
Added line specific indications in the debug output for packet trace debugging.
The simulated memory address block from 0x8000 thru 0x8FFF is defined to have address 0x8000 - 0x801F mapped to I/O ports and 0x8020 - 0x8FFF as NO RAM ALLOWED. Code has been added to behave reasonably when references are made to 0x8020 - 0x8FFF.
