- This change introduces a full refactor of the interrupt subsystem
for the system board (SBD) and the I/O bus (CIO). Interrupt decode
should now be significantly faster, and not require an expensive
calculation on every step.
- The TIMER device has been split into Rev 2 and Rev 3
implementations.
- The optional 3B2/400 Debug Monitor ROMs can now be booted by passing
the "DEMON" argument to the 3B2/400 simulator BOOT command. Any
of the following will cause the Debug Monitor ROM to be booted
instead of the standard 3B2/400 ROM:
sim> BOOT DEMON
sim> BOOT CPU DEMON
sim> BOOT DEMON CPU
This change signficantly improves header hygiene in the 3B2 project by
moving global symbols out of 3b2_defs.h and into the appropriate
individual module header files.
Each compilation unit now includes:
- its appropriate matching .h file
- any other .h files necessary for linting and compilation
Each header file in turn includes 3b2_defs.h, which contains truly
global symbols, and which pulls in sim_defs.h and exports global
devices.
Refactor in preparation for the addition of a Rev 3 simulator for the
3B2/1000 system.
This change also includes a full cleanup of the rat's-nest of includes
and externs that plagued the 3B2 simulator and made it difficult to
understand and maintain. Headers are now required in the following
order:
compilation unit -> "3b2_defs.h" -> {... dependencies ...}
Finally, HELP has been added to the CPU device.
This change cleans up warnings issued when compiled with
-Wall.
- Removed unused functions and variables.
- Moved static declarations out of headers and into source files
- Added braces around initialization where suggested.
Previously, tmxr_set_line_unit() and tmxr_set_line_output_unit()
were being called in the attach routine. These probably belong
in the reset routine instead.
This change is a major refactor of how DMA and the DUART interact.
DMA implementation can now be overridden by individual devices that
require DMA. Disk and Floppy both continue to use a generic DMA
implementation, but the DUART code replaces the generic DMA with its
own implementation that correctly rate-limits TX. Among other things,
this allows the simulator to work correctly with real serial
terminals. This functionality has been tested on an AT&T 5620 "Blit"
terminal, which can run the 'layers' windowing software from the
simulator.
The 3B2 emulator did not have support for traps, rendering debugging
under the simulator fairly useless. This change adds support for
trap handling. The 'sdb' UNIX debugger under SVR3 should now work
correctly.
Two critical issues are fixed with this commit:
1. The MMU cache was being corrupted by writing the 'Last Used'
bit into the wrong half of the PD cache (low word vs. high word)
2. The MMU cache was being too aggressively flushed on SRAMA
write, because the wrong length was being used. In addition,
the code was walking off the end of the cache array when
flushing any section other than section 0, potentially causing
memory corruption.
This commit improves the integrated disk (ID) controller's behavior,
enabling full support for up to two 72MB (emulated WREN II)
integrated winchester disks.
Clock reset was not being handled gracefully at all, leading some
diagnostic tests not to pass, or not to pass consistently.
This change will "kick" the system clock whenever the timer divider is
reset, so the new divider is picked up immediately.
